JP2007508620A5 - - Google Patents

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Publication number
JP2007508620A5
JP2007508620A5 JP2006533965A JP2006533965A JP2007508620A5 JP 2007508620 A5 JP2007508620 A5 JP 2007508620A5 JP 2006533965 A JP2006533965 A JP 2006533965A JP 2006533965 A JP2006533965 A JP 2006533965A JP 2007508620 A5 JP2007508620 A5 JP 2007508620A5
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JP
Japan
Prior art keywords
bus
master
bus master
resource
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006533965A
Other languages
English (en)
Japanese (ja)
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JP2007508620A (ja
Filing date
Publication date
Priority claimed from US10/682,571 external-priority patent/US20050080961A1/en
Application filed filed Critical
Publication of JP2007508620A publication Critical patent/JP2007508620A/ja
Publication of JP2007508620A5 publication Critical patent/JP2007508620A5/ja
Pending legal-status Critical Current

Links

JP2006533965A 2003-10-09 2004-09-22 マルチマスタ共用資源システム中で使用するための通信ステアリング Pending JP2007508620A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/682,571 US20050080961A1 (en) 2003-10-09 2003-10-09 Communication steering for use in a multi-master shared resource system
PCT/US2004/031053 WO2005038563A2 (en) 2003-10-09 2004-09-22 Communication steering for use in a multi-master shared resource system

Publications (2)

Publication Number Publication Date
JP2007508620A JP2007508620A (ja) 2007-04-05
JP2007508620A5 true JP2007508620A5 (enExample) 2007-11-08

Family

ID=34422548

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006533965A Pending JP2007508620A (ja) 2003-10-09 2004-09-22 マルチマスタ共用資源システム中で使用するための通信ステアリング

Country Status (7)

Country Link
US (2) US20050080961A1 (enExample)
EP (1) EP1673698A2 (enExample)
JP (1) JP2007508620A (enExample)
KR (1) KR101111466B1 (enExample)
CN (1) CN100555256C (enExample)
TW (1) TWI349202B (enExample)
WO (1) WO2005038563A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050080961A1 (en) * 2003-10-09 2005-04-14 Bedwell Ryan D. Communication steering for use in a multi-master shared resource system
US7865641B2 (en) * 2006-09-29 2011-01-04 Qimonda Ag Synchronization and scheduling of a dual master serial channel
US8601194B2 (en) * 2011-02-08 2013-12-03 Red Hat Israel, Ltd. On-demand interrupt vector allocation based on activity detection
WO2012117435A1 (en) * 2011-02-28 2012-09-07 Hitachi, Ltd. Storage apparatus and data processing method of the same
US20140164659A1 (en) * 2012-12-06 2014-06-12 Wasim Quddus Regulating access to slave devices
JP7169942B2 (ja) * 2019-06-17 2022-11-11 ルネサスエレクトロニクス株式会社 半導体装置及びその動作方法

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US5669002A (en) * 1990-06-28 1997-09-16 Digital Equipment Corp. Multi-processor resource locking mechanism with a lock register corresponding to each resource stored in common memory
US5280585A (en) * 1990-09-28 1994-01-18 Hewlett-Packard Company Device sharing system using PCL macros
JPH04318654A (ja) * 1991-02-13 1992-11-10 Hewlett Packard Co <Hp> マイクロプロセッサへの割り込みのリダイレクションシステム
US5467295A (en) * 1992-04-30 1995-11-14 Intel Corporation Bus arbitration with master unit controlling bus and locking a slave unit that can relinquish bus for other masters while maintaining lock on slave unit
US5640571A (en) * 1995-03-01 1997-06-17 Intel Corporation Interrupt steering for a computer system
US5872980A (en) * 1996-01-25 1999-02-16 International Business Machines Corporation Semaphore access control buffer and method for accelerated semaphore operations
US6308239B1 (en) * 1996-11-07 2001-10-23 Hitachi, Ltd. Interface switching apparatus and switching control method
JP3008896B2 (ja) * 1997-06-16 2000-02-14 日本電気株式会社 共有バス型マルチプロセッサシステムの割り込み負荷分散システム
JP3287283B2 (ja) * 1997-10-20 2002-06-04 日本電気株式会社 Ｐｃｉバスの割り込みステアリング回路
US6163829A (en) * 1998-04-17 2000-12-19 Intelect Systems Corporation DSP interrupt control for handling multiple interrupts
JP4236729B2 (ja) * 1998-05-07 2009-03-11 株式会社リコー データ処理装置
US6101557A (en) * 1998-05-29 2000-08-08 International Business Machines Corporation Method and system for remote function control and delegation within multifunction bus supported devices
US6092210A (en) * 1998-10-14 2000-07-18 Cypress Semiconductor Corp. Device and method for synchronizing the clocks of interconnected universal serial buses
US6408347B1 (en) * 1998-12-10 2002-06-18 Cisco Technology, Inc. Integrated multi-function adapters using standard interfaces through single a access point
US6295571B1 (en) * 1999-03-19 2001-09-25 Times N Systems, Inc. Shared memory apparatus and method for multiprocessor systems
JP3641169B2 (ja) * 1999-08-06 2005-04-20 株式会社エヌ・ティ・ティ・ドコモ Ｕｓｂ対応電子機器
US6466998B1 (en) * 1999-08-25 2002-10-15 Intel Corporation Interrupt routing mechanism for routing interrupts from peripheral bus to interrupt controller
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US6877057B2 (en) * 2002-01-25 2005-04-05 Dell Products L.P. Information handling system with dynamic interrupt allocation apparatus and methodology
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KR20030095828A (ko) * 2002-06-14 2003-12-24 삼성전자주식회사 주변기기 인터페이스 장치 및 그에 적합한 우선 순위 제어방법
US20040205280A1 (en) * 2003-04-10 2004-10-14 Jeansonne Jeffrey K. End-point sharing of communication bus interface
US20050080961A1 (en) * 2003-10-09 2005-04-14 Bedwell Ryan D. Communication steering for use in a multi-master shared resource system
US20050080966A1 (en) * 2003-10-09 2005-04-14 Cruz Arnaldo R. Communication steering for use in a multi-master shared resource system
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