JP2007335487A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2007335487A
JP2007335487A JP2006163137A JP2006163137A JP2007335487A JP 2007335487 A JP2007335487 A JP 2007335487A JP 2006163137 A JP2006163137 A JP 2006163137A JP 2006163137 A JP2006163137 A JP 2006163137A JP 2007335487 A JP2007335487 A JP 2007335487A
Authority
JP
Japan
Prior art keywords
electrically insulating
insulating substrate
semiconductor element
semiconductor device
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006163137A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007335487A5 (enExample
Inventor
Tomoe Sasaki
智江 佐々木
Toshiyuki Asahi
俊行 朝日
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2006163137A priority Critical patent/JP2007335487A/ja
Publication of JP2007335487A publication Critical patent/JP2007335487A/ja
Publication of JP2007335487A5 publication Critical patent/JP2007335487A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
JP2006163137A 2006-06-13 2006-06-13 半導体装置およびその製造方法 Pending JP2007335487A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006163137A JP2007335487A (ja) 2006-06-13 2006-06-13 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006163137A JP2007335487A (ja) 2006-06-13 2006-06-13 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2007335487A true JP2007335487A (ja) 2007-12-27
JP2007335487A5 JP2007335487A5 (enExample) 2009-07-09

Family

ID=38934700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006163137A Pending JP2007335487A (ja) 2006-06-13 2006-06-13 半導体装置およびその製造方法

Country Status (1)

Country Link
JP (1) JP2007335487A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009260084A (ja) * 2008-04-17 2009-11-05 Dainippon Printing Co Ltd 部品内蔵配線板
KR101551177B1 (ko) 2009-04-21 2015-09-09 엘지이노텍 주식회사 재배선층을 구비한 부품내장형 인쇄회로기판 및 이의 제조방법

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000058592A (ja) * 1998-06-04 2000-02-25 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP2001144212A (ja) * 1999-11-16 2001-05-25 Ibiden Co Ltd 半導体チップ

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000058592A (ja) * 1998-06-04 2000-02-25 Matsushita Electric Ind Co Ltd 半導体装置とその製造方法
JP2001144212A (ja) * 1999-11-16 2001-05-25 Ibiden Co Ltd 半導体チップ

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009260084A (ja) * 2008-04-17 2009-11-05 Dainippon Printing Co Ltd 部品内蔵配線板
KR101551177B1 (ko) 2009-04-21 2015-09-09 엘지이노텍 주식회사 재배선층을 구비한 부품내장형 인쇄회로기판 및 이의 제조방법

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