JP2007287834A - 電子部品の実装方法および装置 - Google Patents
電子部品の実装方法および装置 Download PDFInfo
- Publication number
- JP2007287834A JP2007287834A JP2006111850A JP2006111850A JP2007287834A JP 2007287834 A JP2007287834 A JP 2007287834A JP 2006111850 A JP2006111850 A JP 2006111850A JP 2006111850 A JP2006111850 A JP 2006111850A JP 2007287834 A JP2007287834 A JP 2007287834A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- substrate
- semiconductor chip
- pressure
- pressurizing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 24
- 239000000758 substrate Substances 0.000 claims abstract description 110
- 230000007246 mechanism Effects 0.000 claims abstract description 51
- 238000002788 crimping Methods 0.000 claims description 35
- 238000003384 imaging method Methods 0.000 claims description 30
- 238000004140 cleaning Methods 0.000 claims description 6
- 238000002360 preparation method Methods 0.000 claims description 4
- 239000004065 semiconductor Substances 0.000 abstract description 102
- 238000010438 heat treatment Methods 0.000 description 14
- 238000003825 pressing Methods 0.000 description 13
- 238000004519 manufacturing process Methods 0.000 description 6
- 238000007789 sealing Methods 0.000 description 6
- 239000000853 adhesive Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 229920005989 resin Polymers 0.000 description 5
- 239000011347 resin Substances 0.000 description 5
- 229920001187 thermosetting polymer Polymers 0.000 description 4
- 238000012423 maintenance Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 230000007723 transport mechanism Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 229920001971 elastomer Polymers 0.000 description 2
- 239000000806 elastomer Substances 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000011144 upstream manufacturing Methods 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000003822 epoxy resin Substances 0.000 description 1
- 239000010419 fine particle Substances 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 230000007774 longterm Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 239000012044 organic layer Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920000647 polyepoxide Polymers 0.000 description 1
- 239000010979 ruby Substances 0.000 description 1
- 229910001750 ruby Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- 125000005931 tert-butyloxycarbonyl group Chemical group [H]C([H])([H])C(OC(*)=O)(C([H])([H])[H])C([H])([H])[H] 0.000 description 1
- 230000032258 transport Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Abstract
【解決手段】半導体チップ11を本圧着する前に、半導体チップ11を撮像カメラ22fで撮像し、その後、撮像カメラの認識結果に応じて第2の圧着部22の動作を行うようにした。これにより、多数個取り基板10f上に配置された半導体チップ11に対して正しい対向位置に第2のヘッド22aの加圧面Pを平行移動させた後、半導体チップ11の多数個取り基板10fに対する加圧動作を行うことができ、よって、半導体チップ11に対する加圧面Pの位置精度を向上させることができる。
【選択図】図8
Description
10a 開口部
10b バンプランド
10c ボンディング電極
10d 配線
10e デバイス領域
10f 多数個取り基板(基板)
10g 表面
10h 裏面
11 半導体チップ(電子部品)
11a パッド
11b 主面
12 BOC(半導体装置)
13 ダイボンドテープ
14 ワイヤ
15 封止体
16 はんだボール
20 チップマウンタ(電子部品の実装装置)
21 第1の圧着部(配置機構)
21a 第1のヘッド
21b 第1の加熱ステージ
21c,22c 加圧体
21d,22d コイルスプリング
21e,22e 傾斜調整機構
21f,22f 撮像カメラ
21g,22g XYステージ
22 第2の圧着部(加圧機構)
22a 第2のヘッド
22b 第2の加熱ステージ
23 ガイドレール
24 ヘッドクリーナ
24a クリーニングマット
H ヒータ
P 加圧面
Claims (5)
- 基板上に電子部品の実装を行う電子部品の実装方法であって、
前記電子部品を準備する電子部品準備工程と、
前記電子部品を搭載する基板を準備する基板準備工程と、
前記基板の所定箇所に配置機構によって前記電子部品を配置する配置工程と、
前記配置機構によって配置された前記電子部品を、前記基板における前記電子部品の実装面に対して平行移動可能な加圧機構によって前記基板に向けて加圧して圧着する圧着工程とを有し、
前記圧着工程は、前記電子部品を加圧する前に前記電子部品を撮像カメラで撮像し、その後、前記撮像カメラの認識結果に応じて前記加圧機構の動作を行うことを特徴とする電子部品の実装方法。 - 請求項1記載の電子部品の実装方法において、前記圧着工程は、前記加圧機構の動作を複数の前記電子部品のうち一つずつ行うことを特徴とする電子部品の実装方法。
- 基板上に電子部品の実装を行う電子部品の実装装置であって、
前記電子部品を前記基板上の所定箇所に配置する配置機構と、
前記基板における前記電子部品の実装面に対して平行移動自在に設けられ、前記配置機構により配置された前記電子部品を前記基板に向けて加圧する加圧面を有する加圧機構と、
前記加圧機構に設けられ、前記配置機構により配置された前記電子部品を撮像する撮像カメラとを有し、
前記加圧機構を、前記撮像カメラの認識結果に応じて動作するようにしたことを特徴とする電子部品の実装装置。 - 請求項3記載の電子部品の実装装置において、前記加圧機構は、少なくとも一つの前記電子部品に対応する一つの前記加圧面を有することを特徴とする電子部品の実装装置。
- 請求項3または4記載の電子部品の実装装置において、前記加圧機構に隣接して前記加圧面をクリーニングするヘッドクリーナを設けることを特徴とする電子部品の実装装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006111850A JP4991180B2 (ja) | 2006-04-14 | 2006-04-14 | 電子部品の実装方法および装置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2006111850A JP4991180B2 (ja) | 2006-04-14 | 2006-04-14 | 電子部品の実装方法および装置 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012061015A Division JP5512723B2 (ja) | 2012-03-16 | 2012-03-16 | 電子部品の実装方法および装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007287834A true JP2007287834A (ja) | 2007-11-01 |
JP4991180B2 JP4991180B2 (ja) | 2012-08-01 |
Family
ID=38759338
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006111850A Active JP4991180B2 (ja) | 2006-04-14 | 2006-04-14 | 電子部品の実装方法および装置 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP4991180B2 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009200203A (ja) * | 2008-02-21 | 2009-09-03 | Panasonic Corp | ダイボンディング装置及びダイボンディング方法 |
JP2010225956A (ja) * | 2009-03-25 | 2010-10-07 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
WO2014024343A1 (ja) * | 2012-08-08 | 2014-02-13 | パナソニック株式会社 | 実装方法 |
JP6999841B1 (ja) | 2021-01-21 | 2022-01-19 | キヤノンマシナリー株式会社 | ボンディング方法およびボンディング装置使用方法 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04159734A (ja) * | 1990-10-23 | 1992-06-02 | Nec Corp | コレットのクリーニング方法及びダイボンディング装置 |
JPH09232342A (ja) * | 1996-02-20 | 1997-09-05 | Nec Corp | ダイボンディング装置 |
JPH11126869A (ja) * | 1997-10-22 | 1999-05-11 | Rohm Co Ltd | 積層チップの製造方法 |
JP2002083827A (ja) * | 2000-06-28 | 2002-03-22 | Sharp Corp | 半導体レーザー装置の製造方法および半導体レーザー装置の製造装置 |
JP2002313822A (ja) * | 2001-04-09 | 2002-10-25 | Hitachi Ltd | チップマウント方法および半導体装置の製造方法 |
JP2003313822A (ja) * | 2002-04-22 | 2003-11-06 | Nippon Steel Corp | 鋼製立体ラーメン高架橋の構築方法 |
JP2004193364A (ja) * | 2002-12-11 | 2004-07-08 | Shibuya Kogyo Co Ltd | ボンディング装置 |
JP2005093838A (ja) * | 2003-09-19 | 2005-04-07 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
JP2005191073A (ja) * | 2003-12-24 | 2005-07-14 | Elpida Memory Inc | マウント方法及び装置 |
-
2006
- 2006-04-14 JP JP2006111850A patent/JP4991180B2/ja active Active
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04159734A (ja) * | 1990-10-23 | 1992-06-02 | Nec Corp | コレットのクリーニング方法及びダイボンディング装置 |
JPH09232342A (ja) * | 1996-02-20 | 1997-09-05 | Nec Corp | ダイボンディング装置 |
JPH11126869A (ja) * | 1997-10-22 | 1999-05-11 | Rohm Co Ltd | 積層チップの製造方法 |
JP2002083827A (ja) * | 2000-06-28 | 2002-03-22 | Sharp Corp | 半導体レーザー装置の製造方法および半導体レーザー装置の製造装置 |
JP2002313822A (ja) * | 2001-04-09 | 2002-10-25 | Hitachi Ltd | チップマウント方法および半導体装置の製造方法 |
JP2003313822A (ja) * | 2002-04-22 | 2003-11-06 | Nippon Steel Corp | 鋼製立体ラーメン高架橋の構築方法 |
JP2004193364A (ja) * | 2002-12-11 | 2004-07-08 | Shibuya Kogyo Co Ltd | ボンディング装置 |
JP2005093838A (ja) * | 2003-09-19 | 2005-04-07 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
JP2005191073A (ja) * | 2003-12-24 | 2005-07-14 | Elpida Memory Inc | マウント方法及び装置 |
Cited By (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2009200203A (ja) * | 2008-02-21 | 2009-09-03 | Panasonic Corp | ダイボンディング装置及びダイボンディング方法 |
JP2010225956A (ja) * | 2009-03-25 | 2010-10-07 | Renesas Technology Corp | 半導体集積回路装置の製造方法 |
WO2014024343A1 (ja) * | 2012-08-08 | 2014-02-13 | パナソニック株式会社 | 実装方法 |
JP2014036103A (ja) * | 2012-08-08 | 2014-02-24 | Panasonic Corp | 実装方法 |
US9508679B2 (en) | 2012-08-08 | 2016-11-29 | Panasonic Intellectual Property Management Co., Ltd. | Mounting method |
JP6999841B1 (ja) | 2021-01-21 | 2022-01-19 | キヤノンマシナリー株式会社 | ボンディング方法およびボンディング装置使用方法 |
WO2022158122A1 (ja) * | 2021-01-21 | 2022-07-28 | キヤノンマシナリー株式会社 | ボンディング方法およびボンディング装置使用方法 |
JP2022112206A (ja) * | 2021-01-21 | 2022-08-02 | キヤノンマシナリー株式会社 | ボンディング方法およびボンディング装置使用方法 |
Also Published As
Publication number | Publication date |
---|---|
JP4991180B2 (ja) | 2012-08-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US8314493B2 (en) | Method for manufacturing a package-on-package type semiconductor device | |
US5631191A (en) | Method for connecting a die to electrically conductive traces on a flexible lead-frame | |
US6722028B2 (en) | Method of making electronic device | |
US20020041025A1 (en) | Semiconductor device and method of manufacturing the same | |
JP2005093838A (ja) | 半導体集積回路装置の製造方法 | |
JP2007273628A (ja) | 半導体装置の製造方法 | |
KR20060101385A (ko) | 반도체 장치 및 그 제조 방법 | |
US10847434B2 (en) | Method of manufacturing semiconductor device, and mounting apparatus | |
CN102386112A (zh) | 半导体器件的制造方法 | |
JP4991180B2 (ja) | 電子部品の実装方法および装置 | |
JPH07240435A (ja) | 半導体パッケージの製造方法、半導体の実装方法、および半導体実装装置 | |
US20080185717A1 (en) | Semiconductor device including bump electrodes | |
TWI607516B (zh) | Semiconductor device manufacturing method and manufacturing apparatus | |
KR20030091830A (ko) | 집적 회로의 접속 방법 및 그 조립체 | |
US11476217B2 (en) | Method of manufacturing an augmented LED array assembly | |
JP5512723B2 (ja) | 電子部品の実装方法および装置 | |
JP2004247534A (ja) | 半導体装置 | |
JP4796610B2 (ja) | 半導体集積回路装置の製造方法 | |
US20110115099A1 (en) | Flip-chip underfill | |
US20020182778A1 (en) | Flexible package fabrication method | |
JP2007142128A (ja) | 半導体装置およびその製造方法 | |
JP2007250906A (ja) | 半導体装置及びその製造方法 | |
JP2008311347A (ja) | 半導体モジュール及びその製造方法 | |
JP3619752B2 (ja) | 半導体装置の製造方法 | |
KR100666990B1 (ko) | Bga 패키지 및 그 제조방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090406 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20100401 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20100528 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111025 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20111221 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20120117 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20120316 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20120410 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20120507 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 4991180 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20150511 Year of fee payment: 3 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |