JP2006320766A - Pachinko game machine - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To secure the transmission of data to individual control boards from the main control board at the closing of a power source. <P>SOLUTION: The security checking time T1 of the main control board exceeds the security checking time T2 of subcontrol boards while the security checking operation of the main control board is executed more slowly than that of the subcontrol boards. So, when the CPU of the main control board starts the execution of controlling games following the program loaded in a ROM, the individual CPUs of the subcontrol boards already execute the respective controls of the games. As a result, even if the CPU of the main control board transmits the data to the individual subcontrol boards immediately after the closing of the power source, the data can be received exactly by the individual control boards, which have executed the respective duty controls. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a pachinko gaming machine, and more particularly to a pachinko gaming machine provided with a main control board that controls the progress of the game and a prize ball control board.

  The pachinko gaming machine is configured to pay out a predetermined number of game balls as prize balls when the launched game balls win a prize opening. The game balls won in each winning opening on the game board surface are temporarily stopped in the safe ball tank, and the stopped game balls are detected one by one by a sensor, and a predetermined number of prize balls are driven by a motor or the like. After paying out to the player by the device, the detected game ball is discharged from the safe ball tank. In this conventional pachinko machine, the winning game balls are stopped in the safe ball tank, and after the prize balls are paid out, they are discharged out of the machine. Since it was stopped in the ball tank, it had the effect of not giving a disadvantage to the player.

However, the conventional pachinko gaming machine has the following problems.
(1) Since it is necessary to provide a safe ball tank, the configuration becomes bulky and complicated.
(2) When a power outage or the like occurs, the data on the number of premium balls to be paid out disappears, so the maximum number of premium balls is paid out, and the correct premium ball is not paid out. For example, even if 5 or 10 premium balls are to be paid out for one winning ball, 15 premium balls are paid out.

In order to solve these problems, in recent years, a prize ball control board for paying out prize balls is provided, and data corresponding to the number of prizes to be paid out is stored in the memory of the prize ball control board, and this memory is backed up by a battery. Proposals have been made. As an invention related to the proposal, there is an invention shown in “Ball Game Machine” of Japanese Patent Application Laid-Open No. 11-300018 (Japanese Patent Application No. 10-126693). This proposal has an excellent effect that the mechanism of the pachinko machine can be simplified and an accurate prize ball can be paid out.
Japanese Patent Laid-Open No. 11-300018

  However, in the pachinko gaming machine or the like equipped with the above-mentioned prize ball control board, there is room for improvement in the reset release of the main control board and the prize ball control board when the power is turned on and the detection of power failure of the prize ball control board.

The pachinko gaming machine according to claim 1,
A main control board (30) that controls the progress of the game based on the behavior of the game balls on the game board surface, and a prize ball control board (31) that pays out a predetermined number of game balls as prize balls when a winning state occurs. A pachinko machine,
The main control board (30) which is equipped with a CPU (61) and transmits winning data to the prize ball control board (31);
A CPU (63) and a RAM are mounted. The received winning data is added to the unpaid data in the RAM. The ball cutting motor (29b) is driven and controlled to pay out a winning ball. The prize ball control board (31) having a function of detecting a payout by a prize ball payout switch (29a), a function of subtracting the unpaid data by executing a payout, and a function of storing and holding the unpaid data in the event of a power failure. In the pachinko machine equipped,
The main control board (30) and the prize ball control board (31) are supplied with 12V power from the power board (55),
The main control board (30) and the prize ball control board (31) generate a 5V power source for driving the IC from the supplied 12V power source,
The main control board (30) and the prize ball control board (31) release the reset by monitoring the voltage obtained by dividing the supplied 12V power by a resistor,
The prize ball control board (31) detects a power failure by comparing the 12V power supply with the 5V power supply.

A pachinko gaming machine according to claim 2,
In the pachinko gaming machine according to claim 1,
The main control board (30) and the prize ball control board (31) drive the IC with a 5V power source generated from a 12V power source supplied from the power source board (55),
The winning ball control board (31) stores and holds the unpaid data during a power failure by a backup 5V power supply supplied from the power supply board (55).

  Hereinafter, preferred embodiments of the present invention will be described with reference to the drawings. The embodiments of the present invention are not limited to the following examples, and it goes without saying that various forms can be adopted as long as they belong to the technical scope of the present invention.

  As shown in FIG. 1, the pachinko gaming machine 10 according to the present embodiment mainly includes a rectangular outer frame 11 and a front frame 12, and a known card reader 13 is provided on the left side of the outer frame 11. The front frame 12 is rotatably attached to the outer frame 11 by hinges 14 at the upper and lower left ends. An upper plate 15 is provided below the front frame 12, and a lending button 16, a settlement button 17 and a balance display unit 18 are provided on the upper plate 15. When a prepaid card is inserted into the card slot 19 of the card reader 13, the stored balance is displayed on the balance display unit 18, and when the lending button 16 is pressed, the game balls are lent out and the game balls are drawn from the payout opening of the upper plate 15. Discharged.

  A window-shaped metal frame 20 is removably attached to the front frame 12 with respect to the front frame 12. A plate glass 21 is double fitted in the metal frame 20. A game board 22 is stored behind the plate glass 21. A lower plate 23 is provided at the lower part of the front frame 12 of the upper plate 15, and a firing handle 24 is attached to the right side of the lower plate 23.

  A rotation ring (not shown) is held on the outer periphery of the launch handle 24, and the game ball can be launched onto the game board 22 by rotating clockwise. The upper plate 15 and the lower plate 23 are connected to each other, and are configured to guide the game ball to the lower plate 23 when the upper plate 15 is full of game balls.

  FIG. 2 is a back view of the pachinko gaming machine 10 viewed from the back side. As shown in the drawing, a mechanism board 26 to which the above-described game board 22 is detachably attached is housed in the above-described outer frame 13. The mechanism panel 26 is provided with a ball tank 27, a guide rod 28, and a payout device 29 from above. With this configuration, if there is a winning game ball at the winning opening on the game board 22, a predetermined number of gaming balls can be discharged from the ball tank 27 to the above-described upper plate 15 through the guide rod 28 by the payout device 29. .

  A main control board 30 and a prize ball control board 31 are detachable from the mechanism board 26, a special symbol display device 32 is provided on the game board 22, a launch control board 33 is provided at the lower left part of the front frame, and a special symbol display device is provided. External connection terminal boards 50 are respectively attached to the left side of 32.

It should be noted that the structure related to the payout of game balls with the mechanism panel 26 as the center is the same as the conventional structure, and the detailed description thereof is omitted.
Next, the game board 22 will be described with reference to FIG. As shown in FIG. 3, the game board 22 has an LCD panel unit (hereinafter referred to as “LCD”) 32a constituting a special symbol display device 32 at the center, and a normal electric accessory serving as a first type starting port at the lower part thereof. 36, the normal symbol display device 37 on the upper part of the LCD 35, the normal symbol operation gates 38 and 39 on the left and right of the LCD 35 used for starting the fluctuation of the symbol displayed on the normal symbol display device 37, and the big prize opening 40 on the lower part of the ordinary electric accessory 36. Further, an out port 41 at the bottom of the board surface, other various winning ports, a windmill, a game nail (not shown), and the like are provided.

  With this configuration, when the above-described launch handle 24 is rotated, the launch motor 33a driven by the launch control board 33 is driven, and the game ball on the upper plate 15 is launched onto the game board 22 via the guide rail. . If the launched game ball wins each winning hole, the game ball is taken into the back of the board as a safe ball, and if not won, it is taken into the back of the board through the out port 41 as well.

  Next, the electrical configuration of the pachinko gaming machine 10 described above will be described with reference to the block diagram of FIG. As shown in the figure, the electric circuit of the pachinko gaming machine 10 includes the main control board 30, the prize ball control board 31, the special symbol display device 32, the launch control board 33, the lamp control board 34, the sound control board 35, and the like. Has been. In this circuit diagram, a so-called relay board or the like is not shown in order to exchange signals.

  The main control board 30 is configured as a logic operation circuit centered on an 8-bit one-chip microcomputer incorporating a ROM that stores a game control program and a RAM that serves as a work area for operations and the like. An external input / output circuit for inputting / outputting with various actuators is also provided.

  On the input side of the main control board 30, there are a first type start port switch 36a, normal symbol operation switches 38a and 39a, an accessory continuous operation switch (hereinafter simply referred to as "V switch") 40a, a count switch 40b, a full tank A switch 43, a supply switch 44, a plurality of other prize opening switches 52, and the like are connected.

On the output side, a special prize opening solenoid 40c, a V solenoid 40b, a normal accessory solenoid 36b, an external connection terminal board 50, and the like are connected.
The first type start switch 36a is in the normal electric accessory 36 on the game board 22 described above, the normal symbol operation switches 38a and 39a are in the normal symbol operation gates 38 and 39, respectively, and the V switch 40a is in the special winning opening 40. In the same area, the count switch 40b is also in the big winning opening 40, the full switch 43 is in the lower plate 16, the replenishing switch 44 is in the ball tank 27, and the other winning opening switch 52 is the ordinary electric accessory 36 and the big winning opening 40. It is attached to each winning opening on the board other than.

  Here, the V switch 40a wins the prize winning opening 40 when the game ball that has won the prize winning opening 40 has passed the special device operating area (hereinafter referred to as "special area"). For all game balls, the full tank switch 43 indicates that the game ball is full in the lower plate 16, the supply switch 44 indicates that there is a game ball in the ball tank 27, and the other prize opening switch 52. Is for detecting that a game ball has won a prize on each of the winning holes on the board other than the ordinary electric accessory 36 and the big winning hole 40.

  The large winning opening solenoid 40c connected to the output side is used for the large winning opening 40, the V solenoid is used for a special area in the large winning opening 40, and the ordinary accessory solenoid 36b is used for opening and closing the ordinary electric accessory 36. It is.

  The special symbol display device 32 includes the LCD 32a described above, a symbol display device control board (hereinafter simply referred to as “design control board” (hereinafter also referred to as “image control board”)) 32b, a backlight, It is composed of an accessory unit 32c such as an inverter board.

Similar to the main control board 30 described above, the symbol control board 32b is configured as a logic operation circuit centered on an 8-bit one-chip microcomputer.
The prize ball control board 31 pays out a game ball as a prize ball to the player when a winning is obtained by driving and controlling the ball cutting motor 29b in accordance with a command command from the main control board 30, and the prepaid card unit described above. 13 and the CR adjustment display substrate 42 and the like are also controlled, and are configured as a logical operation circuit using a microcomputer. The CR adjustment display board 42 includes the lending button 16, the adjustment button 17, and the balance display portion 18 of the upper plate 15 described above.

  A prize ball payout switch 29 a is connected to the input side of the prize ball control board 31. The prize ball payout switch 29a is provided below the ball cutting motor 29b in the payout device 29, and detects a game ball paid out by the ball cutting motor 29b.

  The launch control board 33 drives and controls the launch motor 33a in accordance with the amount of rotation of the launch handle 24 operated by the player. When the player presses the launch stop switch 24b, the launch control board 33 stops firing or launches. When the touch switch 24a built in the handle 24 is in an on state, the touch lamp 45 is turned on. The touch switch 24 a is built in the firing handle 24 and detects that the player is touching the firing handle 24.

  The lamp control board 34 is mainly composed of driving elements such as transistors. Upon receiving a command from the main control board 30, the lamp control board 34 receives a normal symbol display device 37, lamps such as jackpot lamps and error lamps, and various lamps such as LEDs. It is intended to light up the display.

The sound control board 35 includes a sound source IC, an amplifier, and the like, and is used to drive and control the speaker 46 in response to a command from the main control board 30.
A circuit for one-way communication so that the transmission to the special symbol display device 32, the prize ball control board 31, the launch control board 33, the lamp control board 34, and the sound control board 35 can be transmitted only from the main control board 30. It is configured as.

  As shown in FIG. 5, various power sources are supplied to the main control board 30, the prize ball control board 31, the symbol control board 32b, the launch control board 33, the lamp control board 34, the sound control board 35, and the like. Has been. The power supply circuit 55 is configured to generate a backup power supply of DC5V from a 24V AC power supply using DC32V, DC12V, and a capacitor. Each board such as the main control board 30, the prize ball control board 31, and the symbol control board 32b generates DC 5V for driving the IC from the supplied DC 12V power source.

  Here, as shown in the figure, the DC 12 V power supplied from the power circuit 55 is connected to the reset (RES) terminal of the CPU 61 via the voltage monitoring circuit 60 of the main control board 30. Similarly, the DC12V power supplied from the power supply circuit 55 is connected to the reset (XRES) terminal of the CPU 63 via the voltage monitoring circuit 62 of the prize ball control board 31, and the XNMI terminal of the CPU 63 via the backup voltage monitoring circuit 64. It is connected to the.

  The 5V backup power supply of the power supply circuit is connected to the backup terminal (VBB) of the CPU 63. Similarly, DC12V power supplied from the power supply circuit 55 is connected to the reset (RES) terminal of the CPU 66 via the voltage monitoring circuit 65 of the symbol control board 32b.

As shown in FIG. 6, the voltage monitoring circuit 60 of the main control board 30 includes a voltage monitoring IC 11, resistors R17, R18 and R19, a bypass capacitor C10, and the like.
The VSB terminal that is the input terminal of the voltage monitoring IC 11 is supplied with a DC12V power source divided by the resistors R17 and R18, and the RESET terminal that is the output terminal is pulled up to DC5V by the resistor R19. It is connected to the RES terminal which is an input terminal of the CPU 61.

Although not shown, the voltage monitoring circuit 65 has the same configuration as the voltage monitoring circuit 60.
As shown in FIG. 7, the voltage monitoring circuit 62 of the prize ball control board 31 includes a voltage monitoring IC 8, resistors R38, R39 and 40, bypass capacitors C22 and C23, and the like.

  The VS terminal that is the input terminal of the voltage monitoring IC 8 is supplied with a DC12V power source divided by the resistors R39 and R40, and the RESET terminal that is the output terminal is pulled up to DC5V by the resistor R38. The CPU 63 is connected to an XRES terminal that is an input terminal.

The backup voltage monitoring circuit 64 includes a comparator IC1A, resistors R41 to R45, and the like.
The negative input terminal of the comparator IC1A is supplied with a DC5V power source divided by resistors R43 and R44, and the positive input terminal is supplied with a DC12V power source divided by resistors R41 and R42 for output. The terminal is pulled up to DC5V by a resistor R45 and is connected to an XNMI terminal which is an input terminal of the CPU 63.

  With the above-described configuration, each CPU starts operating on the main control board 30 when the power is supplied to the pachinko gaming machine 10 and the sub-control boards other than the main control board such as the prize ball control board 31 and the symbol control board 32b. A state is demonstrated according to the timing chart shown in FIG.

  When the pachinko gaming machine 10 is powered on, the power board 55 generates DC 32V, DC 12V, and DC 5V, which is a battery backup power source (VBB). The generated DC 12V power is supplied to each control board as shown in FIG.

Here, as shown in FIG. 8, when the power is turned on (point P1), the voltage of the DC12V power supply gradually rises from 0V to 12V in a parabolic manner.
When the voltage of the DC12V power supply that gradually rises to the reference value LV2, the outputs of the voltage monitoring circuit 62 of the winning ball control board 31 and the voltage monitoring circuit 65 of the symbol control board 32b change from low level to high level, and the reset of the CPU 63 is released, and the CPU 63 Starts the security check operation (point P2).

When the power supply voltage of DC12V is the reference value LV2, the output of the voltage monitoring circuit 60 of the main control board 30 maintains a low level state.
When the power supply voltage of DC12V rises from the reference value LV2 to the reference value LV1, the output of the voltage monitoring circuit 60 changes from the low level to the high level, the reset of the CPU 61 is released, and the CPU 61 starts the security check operation (point P3).

  The security check time T1 of the CPU 61 of the main control board 30 is designed to be equal to or longer than the security check time T2 of each CPU of the sub control boards such as the CPU 63 of the prize ball control board 31 and the CPU 66 of the symbol control board 32b. Has been.

  As is well known, the security check is a function for checking whether or not the contents of the ROM in which the CPU 61, 63 and 66, which are one-chip microcomputers, have written the progress of the game, are legitimate.

  The security check time T1 of the main control board 30 is equal to or longer than the security check time T2 of the sub control board 30 and the security check operation of the CPU 61 of the main control board 30 is executed later than the security check operation of the sub control board 30.

  Thus, when the CPU 61 of the main control board 30 starts executing the game control according to the program written in the ROM, each CPU of the sub-control board has already executed the game control.

  As a result, even if the CPU 61 of the main control board 30 transmits data to each sub-control board immediately after the power is turned on, each sub-control board is executing the original control, so that the data can be reliably received. .

  In this specific example, the security check time T1 is about 439 ms, and the time from when the CPU 61 of the main control board 30 executes power supply to the game control is about 529 ms to 549 ms. Further, the security check time T2 is about 200 ms, and the time from when the CPU 63 of the prize ball control board 31 which is one of the sub-control boards is turned on to control the game is about 202 ms to 203 ms.

Next, the operation when the power supply to the pachinko gaming machine 10 is cut off will be described according to the timing chart shown in FIG.
When the power supply to the pachinko gaming machine 10 is interrupted (point P6), the DC12V power supply voltage decreases substantially linearly after that, but then decreases substantially linearly to 0V after a predetermined time.

  When the reference voltage LV1 is reached (point P7) in the course of gradually decreasing linearly (point P7), the output voltage of the voltage monitoring circuit 60 of the main control board 30 changes from high level to low level, and the CPU 61 is reset.

  Thereafter, as the time elapses, the power supply voltage of DC12V gradually decreases and reaches the reference voltage LV3 (point P8), and the output voltage of the backup voltage monitoring circuit 64 of the prize ball control board 31 changes from the high level to the low level. As a result, the XNMI terminal of the CPU 63 of the prize ball control board 31 becomes low level, and a non-maskable interrupt is applied to the CPU 63.

  When the power supply voltage of DC12V further decreases from the reference voltage LV3 and reaches the reference voltage LV2 (point P9), each sub-control board such as the voltage monitoring circuit 62 of the prize ball control board 31 and the voltage monitoring circuit 65 of the symbol control board 32b. The output voltage of the voltage monitoring circuit changes from high level to low level. As a result, the CPU of each sub control board is brought into a reset state.

  Here, the RAM of the prize ball control board 31 is backed up by a battery, and the data stored in the RAM is retained for a predetermined time (in the present embodiment, about 1 hour 20 minutes to about 3 hours 30 minutes) even when the power is turned off. The

  Incidentally, as described above, the XNMI terminal is made valid before the CPU 63 of the prize ball control board 31 is reset. As a result, the CPU 63 prohibits writing by prohibiting access to the RAM. Accordingly, the contents of the RAM in an unstable state that is in the reset state are not backed up by the battery, but the contents of the stable RAM before the reset can be backed up by the battery.

  As described above, when the power is turned off, the CPU 61 of the main control board 30 is first set to the reset state, and then each CPU of the sub control board is set to the reset state. Thereby, there is an effect that each sub control board receives the data transmitted before the CPU 61 of the main control board 30 is turned off.

  In this specific example, the reference voltage LV1 is 9.39V to 10.21V, the reference voltage LV3 is 8.00V to 9.23V, and the reference voltage LV2 is designed to be 7.20V to 7.75V. Has been.

  The configuration for transmitting the winning data from the main control board 30 to the prize ball control board 31 is substantially the same as the configuration shown in “Ball Game Machine” of Japanese Patent Application No. 10-126693, and therefore a brief description. Keep on.

  The main control board 30 includes a first type start port switch 36a provided in the ordinary electric accessory 36, a count switch 40b provided in the big prize opening 40, and a plurality of other prizes provided respectively in the other prize openings. When it is detected by the mouth detection switch 52 that there is a winning, a process of incrementing (+1) the data PD1, PD2, PD3 is executed.

  The data PD1 corresponds to a winning opening that makes five winning balls for each winning ball. The data PD2 corresponds to a winning opening for performing ten winning balls for the winning ball 1. The data PD3 corresponds to a winning opening for making 15 winning balls for the winning ball 1.

This increment processing is executed for a predetermined time, and after the predetermined time has elapsed, the data PD1, PD2, and PD3 are transmitted to the prize ball control board 31 and cleared to zero when transmitted.
On the other hand, the prize ball control board 31 that has received the transmitted data PD1 to PD3 adds the received data PD1 to the unpaid data MPD1, the data PD2 to the unpaid data MPD2, and the data PD3 to the unpaid data MPD3. .

  If the value of each data of the unpaid data MPD1 to MPD3 is not zero, the CPU 63 of the winning ball control board 31 controls the driving of the ball cutting motor 29b to pay out the winning ball. Decrement (-1) and the same processing is executed until the value becomes zero.

  That is, if the value of the unpaid data MPD1 is not zero, the ball cutting motor 29b is driven and controlled to pay out five game balls as award balls, and then the value of the unpaid data MPD1 is decremented. The fact that five game balls have been paid out is detected by the prize ball payout SW 29a. Similarly, if the value of the unpaid data MPD2 is not zero, the ball cutting motor 29b is driven to pay out 10 gaming balls as prize balls, and then the value of the unpaid data MPD1 is decremented. If the value of the unpaid data MPD3 is not zero, the ball cutting motor 29b is driven and controlled to pay out 15 game balls as prize balls, and then the value of the unpaid data MPD1 is decremented.

The data of the unpaid data MPD1 to MPD3 is stored in a built-in RAM of the CPU 63 which is a one-chip microcomputer.
As described above, the battery backup power of DC5V is supplied from the power supply board 55 to the VBB terminal of the CPU 63. Therefore, even if the power supply to the pachinko gaming machine 10 is stopped due to a temporary power failure, when the power failure is resolved and power is supplied again, the CPU 63 receives the prize ball according to the values of the unpaid data MPD1 to MPD3 stored. Payout control can be executed.

  Thereby, an unexpected disadvantage is not given to a player. Further, as described above, before the power is turned off and the reset state is entered, the CPU 63 is subjected to a forced interrupt by XNMI to execute a process for prohibiting access to the RAM. As a result, it is possible to preferentially ensure that the data stored and retained by the battery backup is stored as normal data by prohibiting the writing to the RAM when the DC5V power supply that is in the reset state is unstable. It also has an effect.

  Here, in this specific example, the order of data transmitted from the main control board 30 is stored in addition to the unpaid data MPD1 to MPD3, and the payout of prize balls is executed in the order transmitted from the main control board 30. Is adopted. As a result, the payout of prize balls can be executed in the order of winning in each winning opening.

  On the other hand, after the power failure recovery, as shown in the flowchart of FIG. 10, first, it is determined whether or not the contents of the RAM in the predetermined area are normal (step S100), and then whether or not the data of the unpaid data MPD3 is zero ( In step S110, it is determined whether the data of unpaid data MPD2 is zero (step S120) and whether the data of unpaid data MPD1 is zero (step S130). As a result of the determination, if each data is not zero, the payout is executed until the data with a large number of prize balls becomes zero, and the process proceeds to the payout of the next data with a small number of prize balls (steps S140 to S160). ).

  As a result, according to this specific example, the payout of the winning balls is normally executed in accordance with the order of winning to each winning opening, and after the recovery due to the power failure, the payout is made from the winning to the winning opening having a large number of winning balls. As a result, after the power failure is restored, the player can quickly obtain a prize ball and can give the player a sense of security.

  In the processing in step S100, when XNMI is enabled and access to the RAM is prohibited, data such as 55 (H) or AA (H) is written in a predetermined area of the RAM, and the written data is restored after the power failure is restored. This is a process for determining whether or not the backed up data is normal by determining whether or not it has changed. When the data is changing, it can be regarded as a runaway CPU.

  In addition to the prize ball control, the prize ball control board 31 executes the ball lending control when the lending button 16 is pressed. In this ball lending control, even if a power failure occurs during ball lending, the remaining number of balls or the number of balls already paid out can be stored and retained, giving the player an unexpected disadvantage. There is no.

1 is an external perspective view showing a pachinko gaming machine 10 adopting the present invention. It is the back view which looked at the pachinko gaming machine 10 from the back. 2 is a front view showing a configuration of a game board 22 of the pachinko gaming machine 10. FIG. 2 is a block diagram showing an electrical configuration of a pachinko gaming machine 10. FIG. 3 is a block diagram showing a configuration for supplying power from a power supply board 55. FIG. 3 is a circuit diagram showing a configuration of a voltage monitoring circuit 60 of a main control board 30. FIG. FIG. 3 is a circuit diagram showing configurations of a voltage monitoring circuit 62 and a backup voltage monitoring circuit 64 of a prize ball control board 31. It is a timing chart which shows the operation state of CPU61 of the main control board 30 at the time of power activation, and CPU of each sub control board. 4 is a timing chart showing operation states of the CPU 61 of the main control board 30 and the CPUs of the sub control boards when power is turned off and off. It is a flowchart which shows the process performed by "power failure recovery routine".

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Pachinko machine, 22 ... Game board, 24 ... Launch handle, 24a ... Touch switch 30 ... Main control board, 31 ... Prize ball control board, 32 ... Special symbol display device, 32a ... LCD panel unit (LCD), 32b ... Symbol display device control board (design control board), 33 ... Launch control board, 34 ... Lamp control board, 35 ... Sound control board, 36 ... Ordinary electric accessory (start port), 36a ... First type start switch, 37 ... Normal symbol display device, 40 ... Large winning opening, 40a ... Equipment continuous operation switch (VSW), 40b ... Ten count switch (count SW), 52 ... Other winning opening switch, 55 ... Power supply board, 60, 62, 65 ... Voltage monitoring circuit 61, 63, 66 ... CPU (one-chip microcomputer), 64 ... Backup voltage monitoring circuit.

Claims (2)

A main control board (30) that controls the progress of the game based on the behavior of the game balls on the game board surface, and a prize ball control board (31) that pays out a predetermined number of game balls as prize balls when a winning state occurs. A pachinko machine,
The main control board (30) which is equipped with a CPU (61) and transmits winning data to the prize ball control board (31);
A CPU (63) and a RAM are mounted. The received winning data is added to the unpaid data in the RAM. The ball cutting motor (29b) is driven and controlled to pay out a winning ball. The prize ball control board (31) having a function of detecting a payout by a prize ball payout switch (29a), a function of subtracting the unpaid data by executing a payout, and a function of storing and holding the unpaid data in the event of a power failure. In the pachinko machine equipped,
The main control board (30) and the prize ball control board (31) are supplied with 12V power from the power board (55),
The main control board (30) and the prize ball control board (31) generate a 5V power source for driving the IC from the supplied 12V power source,
The main control board (30) and the prize ball control board (31) release the reset by monitoring the voltage obtained by dividing the supplied 12V power by a resistor,
The winning ball control board (31) detects a power failure by comparing the 12V power supply with the 5V power supply. In the pachinko gaming machine according to claim 1,
The main control board (30) and the prize ball control board (31) drive the IC with a 5V power source generated from a 12V power source supplied from the power source board (55),
The pachinko gaming machine, wherein the prize ball control board (31) stores and holds the unpaid data in the event of a power failure by a backup 5V power supply supplied from the power supply board (55).

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