JP2006310755A - 半導体装置の製造方法 - Google Patents
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
- G03F7/40—Treatment after imagewise removal, e.g. baking
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
- H01L21/31133—Etching organic layers by chemical means
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67028—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
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- H01L21/67034—Apparatus for fluid treatment for cleaning followed by drying, rinsing, stripping, blasting or the like for drying
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
- H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
- H10B12/03—Making the capacitor or connections thereto
- H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
- H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
- H10B12/318—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor the storage electrode having multiple segments
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Abstract
【解決手段】被加工膜またはレジストによるパタンを基板上に形成する工程と、少なくとも水を含む液体である洗浄液でパタンを洗浄する工程と、パタンを洗浄した後、基板上に残留する洗浄液の表面に親水性基および疎水性基を有する両親媒性物質を展開させる工程と、両親媒性物質を展開させた後、基板上の洗浄液を除去するための乾燥工程とを有するものである。
【選択図】図2
Description
被加工膜またはレジストによるパタンを基板上に形成する工程と、
少なくとも水を含む液体である洗浄液で前記パタンを洗浄する工程と、
前記パタンを洗浄した後、前記基板上に残留する前記洗浄液の表面に親水性基および疎水性基を有する両親媒性物質を展開させる工程と、
前記両親媒性物質を展開させた後、前記基板上の前記洗浄液を除去するための乾燥工程と、
を有するものである。
101 被加工膜
108 レジストパタン
110 純水
124 単分子膜
52 不純物拡散層
53 素子分離部
54 ゲート絶縁膜
56 ゲート電極
58 第1の層間絶縁膜
60a、60b 第1のプラグ
62 第2の層間絶縁膜
64 ビット配線
66 第2のプラグ
68 エッチングストッパ絶縁膜
70 下部電極
72 容量絶縁膜
74 上部電極
75 キャパシタ
76 絶縁膜
Claims (18)
- 被加工膜またはレジストによるパタンを基板上に形成する工程と、
少なくとも水を含む液体である洗浄液で前記パタンを洗浄する工程と、
前記パタンを洗浄した後、前記基板上に残留する前記洗浄液の表面に親水性基および疎水性基を有する両親媒性物質を展開させる工程と、
前記両親媒性物質を展開させた後、前記基板上の前記洗浄液を除去するための乾燥工程と、
を有する半導体装置の製造方法。 - 前記被加工膜によるパタンは、絶縁膜または導体膜からなるパタンである請求項1記載の半導体装置の製造方法。
- 前記被加工膜によるパタンは、円筒状のキャパシタ用下部電極からなるパタンである請求項1記載の半導体装置の製造方法。
- 前記パタンを洗浄した後、前記両親媒性物質を展開させる工程前に、該両親媒性物質の量に対応して前記洗浄液のペーハー(pH)値を調整する請求項1から3のいずれか1項記載の半導体装置の製造方法。
- 前記両親媒性物質を展開させる工程は、該両親媒性物質の量を前記基板の主表面の面積に対応して制御する請求項1から4のいずれか1項記載の半導体装置の製造方法。
- 前記両親媒性物質を展開させる工程は、該両親媒性物質の量を前記洗浄液の温度および大気圧の少なくともいずれかの条件に対応して制御する請求項1から5のいずれか1項記載の半導体装置の製造方法。
- 前記両親媒性物質を展開させる工程は、該両親媒性物質を含む溶液を前記洗浄液に供給する処理を有し、
前記両親媒性物質を含む溶液における前記両親媒性物質の濃度で該両親媒性物質の量を制御する請求項1から6のいずれか1項記載の半導体装置の製造方法。 - 前記両親媒性物質の濃度が10E−5〜10E−7mol/mlである請求項7記載の半導体装置の製造方法。
- 前記両親媒性物質は単分子または2分子である請求項1から8のいずれか1項記載の半導体装置の製造方法。
- 前記乾燥工程は、スピン乾燥を含む請求項1から9のいずれか1項記載の半導体装置の製造方法。
- 前記スピン乾燥は、所定の回転数で前記基板を回転させた後、該所定の回転数よりも速い回転数で前記基板を回転させる請求項10記載の半導体装置の製造方法。
- 前記乾燥工程は、前記基板を水平方向から傾ける処理を行った後、スピン乾燥を行う請求項1から11のいずれか1項記載の半導体装置の製造方法。
- 前記乾燥工程は、前記スピン乾燥を行っている間に前記基板に残留する洗浄液に前記両親媒性物質を追加供給する請求項1から12のいずれか1項記載の半導体装置の製造方法。
- 前記乾燥工程は、加熱乾燥を含む請求項1から13のいずれか1項記載の半導体装置の製造方法。
- 前記乾燥工程は、前記洗浄液および前記両親媒性物質の沸点のうちいずれか高い方の温度で前記基板を加熱する工程を少なくとも含む請求項1から14のいずれか1項記載の半導体装置の製造方法。
- 前記乾燥工程は、前記基板を加熱する工程を含み、
前記パタンが前記レジストからなる場合の前記加熱する工程は、100℃から240℃の温度範囲で加熱するものである請求項1から14のいずれか1項記載の半導体装置の製造方法。 - 前記乾燥工程は、前記基板を加熱する工程を含み、
前記パタンが前記被加工膜からなる場合の前記加熱する工程は、100℃から600℃の温度範囲で加熱するものである請求項1から14のいずれか1項記載の半導体装置の製造方法。 - 前記乾燥工程は、前記基板を加熱する工程を含み、
前記パタンが前記被加工膜からなる場合の前記加熱する工程は、250℃から350℃の温度範囲で加熱するものである請求項1から15のいずれか1項記載の半導体装置の製造方法。
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JP2006001353A JP4237184B2 (ja) | 2005-03-31 | 2006-01-06 | 半導体装置の製造方法 |
TW095111100A TW200700928A (en) | 2005-03-31 | 2006-03-30 | Semiconductor device manufacturing method for preventing patterns from inclining in drying process |
US11/393,800 US7763549B2 (en) | 2005-03-31 | 2006-03-31 | Semiconductor device manufacturing method for preventing patterns from inclining in drying process |
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Cited By (3)
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WO2011040423A1 (ja) * | 2009-10-02 | 2011-04-07 | 三菱瓦斯化学株式会社 | 金属微細構造体のパターン倒壊抑制用処理液及びこれを用いた金属微細構造体の製造方法 |
JP2016106414A (ja) * | 2010-12-28 | 2016-06-16 | セントラル硝子株式会社 | ウェハの洗浄方法 |
JP2016149543A (ja) * | 2011-01-12 | 2016-08-18 | セントラル硝子株式会社 | 保護膜形成用薬液 |
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JP4743340B1 (ja) | 2009-10-28 | 2011-08-10 | セントラル硝子株式会社 | 保護膜形成用薬液 |
US8440573B2 (en) * | 2010-01-26 | 2013-05-14 | Lam Research Corporation | Method and apparatus for pattern collapse free wet processing of semiconductor devices |
US10727044B2 (en) | 2017-09-21 | 2020-07-28 | Honeywell International Inc. | Fill material to mitigate pattern collapse |
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- 2006-01-06 JP JP2006001353A patent/JP4237184B2/ja active Active
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Cited By (5)
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WO2011040423A1 (ja) * | 2009-10-02 | 2011-04-07 | 三菱瓦斯化学株式会社 | 金属微細構造体のパターン倒壊抑制用処理液及びこれを用いた金属微細構造体の製造方法 |
JPWO2011040423A1 (ja) * | 2009-10-02 | 2013-02-28 | 三菱瓦斯化学株式会社 | 金属微細構造体のパターン倒壊抑制用処理液及びこれを用いた金属微細構造体の製造方法 |
US9334161B2 (en) | 2009-10-02 | 2016-05-10 | Mitsubishi Gas Chemical Company, Inc. | Processing liquid for suppressing pattern collapse of fine metal structure and method for producing fine metal structure using same |
JP2016106414A (ja) * | 2010-12-28 | 2016-06-16 | セントラル硝子株式会社 | ウェハの洗浄方法 |
JP2016149543A (ja) * | 2011-01-12 | 2016-08-18 | セントラル硝子株式会社 | 保護膜形成用薬液 |
Also Published As
Publication number | Publication date |
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US7763549B2 (en) | 2010-07-27 |
US20060223318A1 (en) | 2006-10-05 |
TW200700928A (en) | 2007-01-01 |
JP4237184B2 (ja) | 2009-03-11 |
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