JP2006303006A - Power module - Google Patents

Power module Download PDF

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JP2006303006A
JP2006303006A JP2005119670A JP2005119670A JP2006303006A JP 2006303006 A JP2006303006 A JP 2006303006A JP 2005119670 A JP2005119670 A JP 2005119670A JP 2005119670 A JP2005119670 A JP 2005119670A JP 2006303006 A JP2006303006 A JP 2006303006A
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power
lead frame
power semiconductor
power module
control board
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Akira Sasaki
亮 佐々木
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Yaskawa Electric Corp
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Yaskawa Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

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Abstract

<P>PROBLEM TO BE SOLVED: To provide a compact power module which can be reduced in switching loss and switching surge. <P>SOLUTION: The power module comprises a plurality of power semiconductor elements, a power circuit 22 for driving the power semiconductor elements, and a drive circuit 21 comprising a plurality of control elements for controlling the power semiconductor elements with a lead frame 8 pasted to a control substrate 6 which constitutes the driving circuit. The lead frame may be processed into such a shape that portions against which electrodes of the power semiconductor elements abut are formed into a projecting shape. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

本発明は、インバータやサーボアンプなどに使用するパワーモジュールに関するものである。   The present invention relates to a power module used for an inverter or a servo amplifier.

従来のパワーモジュールとして、金属ベース上にセラミック基板を介してパワー半導体素子が実装されているパワー基板と、ゲート駆動ＩＣが実装された制御基板が同一平面上に実装され、素子間の電気的な接続をワイヤボンディングで行っているものがある。
図５は、この従来のパワーモジュールを示す断面図である。図において、１はＩＧＢＴ、２はダイオード、３はセラミック基板、４は金属ベース、５はゲート駆動ＩＣ、６は制御基板、７はアルミワイヤである。なお、９は制御信号端子、１０はパワー入出力端子である。ドライブ回路２１は、セラミック基板３にＩＧＢＴ１、ダイオード２を配置し、パワー回路２２は制御基板６にゲート駆動ＩＣ５を配置し、金属ベース４にこれらが搭載された構成になっている。
また、ドライブ素子（ゲート駆動ＩＣ）を小型化するために機能を分割してＦＣとして重ねているものがある（例えば、特許文献１参照）。さらに、パワー半導体素子を実装している配線基板の主面から裏面にビアホールを設け電気的および熱的に接続し、放熱性を向上させているものもある（例えば、特許文献２参照）。さらに、また、スイッチング半導体素子のエミッタ電極が接続される基板の主面電極を複数本のビアホールを通じて内層配線に接続し、複数本のビアホールを通じて基板裏面の電極に電気的に接続し、スイッチング特性を向上させているものもある（例えば、特許文献３参照）。
このような従来のパワーモジュールは、制御基板およびパワー基板の配置を配線基板あるいはベース基板と同一平面に搭載するようになっており、電気的接続はワイヤボンディングあるいは配線基板上のパターンで接続するようになっている。
特開２００２−２６２３７号公報（第４−５頁、図１） 特開２００４−２９６６２７号公報（第３−４頁、図１０） 特開２００４−３１９５５０号公報（第３−４頁、図９） As a conventional power module, a power substrate on which a power semiconductor element is mounted on a metal base via a ceramic substrate and a control board on which a gate drive IC is mounted are mounted on the same plane, Some are connected by wire bonding.
FIG. 5 is a cross-sectional view showing this conventional power module. In the figure, 1 is an IGBT, 2 is a diode, 3 is a ceramic substrate, 4 is a metal base, 5 is a gate drive IC, 6 is a control substrate, and 7 is an aluminum wire. Reference numeral 9 is a control signal terminal, and 10 is a power input / output terminal. In the drive circuit 21, the IGBT 1 and the diode 2 are arranged on the ceramic substrate 3, and in the power circuit 22, the gate drive IC 5 is arranged on the control substrate 6, and these are mounted on the metal base 4.
In addition, in order to reduce the size of the drive element (gate drive IC), there is one in which functions are divided and overlapped as FC (for example, see Patent Document 1). In addition, there is a case where via holes are provided from the main surface to the back surface of the wiring board on which the power semiconductor element is mounted so as to be electrically and thermally connected to improve heat dissipation (see, for example, Patent Document 2). Furthermore, the main surface electrode of the substrate to which the emitter electrode of the switching semiconductor element is connected is connected to the inner layer wiring through a plurality of via holes, and is electrically connected to the electrode on the back surface of the substrate through the plurality of via holes, so that the switching characteristics are improved. Some have improved (for example, refer patent document 3).
In such a conventional power module, the arrangement of the control board and the power board is mounted on the same plane as the wiring board or the base board, and the electrical connection is made by wire bonding or a pattern on the wiring board. It has become.
JP 2002-26237 A (page 4-5, FIG. 1) JP 2004-296627 A (page 3-4, FIG. 10) JP 2004-319550 A (page 3-4, FIG. 9)

ところが、従来のパワーモジュールでは、金属ベース上にセラミック基板を介してパワー半導体素子が実装されているパワー基板とゲート駆動ＩＣが実装された制御基板が同一平面上に実装されており、素子間の電気的な接続をワイヤボンディングで行っていたため、ボンディングループの形成に必要な空間を確保する必要があり小形化が困難であるという問題があった。また、ワイヤは電気的にインピーダンスが高く、パワー半導体素子のスイッチングサージやスイッチングロスが大きいという問題があった。
本発明はこのような問題を鑑みてなされたものであり、制御基板およびパワー基板を三次元的に最短に配置し、小形で、スイッチングロスやスイッチングサージを低減できるパワーモジュールを提供することを目的とする。 However, in the conventional power module, the power substrate on which the power semiconductor element is mounted on the metal base via the ceramic substrate and the control board on which the gate drive IC is mounted are mounted on the same plane, Since the electrical connection is performed by wire bonding, there is a problem that it is necessary to secure a space necessary for forming a bonding loop and it is difficult to reduce the size. Further, the wire has a problem that the impedance is high electrically, and the switching surge and switching loss of the power semiconductor element are large.
The present invention has been made in view of such problems, and an object of the present invention is to provide a power module capable of reducing a switching loss and a switching surge in a small size by arranging a control board and a power board in the three-dimensional shortest. And

上記問題を解決するため、本発明は次のように構成したものである。
請求項１記載の発明は、複数のパワー半導体素子と、この複数のパワー半導体素子を駆動するパワー回路と、前記複数のパワー半導体素子を制御する複数の制御素子からなるドライブ回路とを備えたパワーモジュールにおいて、前記ドライブ回路を構成する制御基板にリードフレームを貼り合わせたものである。
請求項２に記載の発明は、前記リードフレームが、前記パワー半導体素子の電極が当接する部分を凸状に加工したものである。
請求項３に記載の発明は、前記制御基板は、基板を貫通する内部ビアホールを設け、ゲート駆動ＩＣと前記リードフレームとの間の電気的接続を最短に配置したものである。
請求項４に記載の発明は、前記制御基板を前記パワー基板の上方に配置し、前記ゲート駆動ＩＣと前記パワー半導体素子との間の電気的接続を最短距離になるよう三次元的に配置したものである。 In order to solve the above problems, the present invention is configured as follows.
According to a first aspect of the present invention, there is provided a power including a plurality of power semiconductor elements, a power circuit for driving the plurality of power semiconductor elements, and a drive circuit including a plurality of control elements for controlling the plurality of power semiconductor elements. In the module, a lead frame is bonded to a control board constituting the drive circuit.
According to a second aspect of the present invention, the lead frame is obtained by processing a portion where the electrode of the power semiconductor element abuts into a convex shape.
According to a third aspect of the present invention, the control board is provided with an internal via hole penetrating the board, and the electrical connection between the gate drive IC and the lead frame is arranged in the shortest.
According to a fourth aspect of the present invention, the control substrate is disposed above the power substrate, and the electrical connection between the gate drive IC and the power semiconductor element is three-dimensionally disposed so as to have the shortest distance. Is.

請求項１に記載の発明によると、制御基板にリードフレームを貼り付けて接続するので、スイッチングロスやスイッチングサージを低減することができる。
請求項２に記載の発明によると、制御基板とパワー基板の基板間隔を自由に設計することができ、かつ小形化できる。
請求項３に記載の発明によると、制御基板内の主面から裏面への配線距離を最短にすることができ、ゲート駆動ＩＣとリードフレーム間のインピーダンスを減らすことができる。
請求項４に記載の発明によると、制御基板のゲート駆動ＩＣとパワー基板のパワー半導体素子間の配線を最短にすることができ、信号ラインのインピーダンスを減らすことができる。 According to the first aspect of the present invention, since the lead frame is attached to the control board and connected, the switching loss and the switching surge can be reduced.
According to the second aspect of the present invention, the board interval between the control board and the power board can be designed freely and can be reduced in size.
According to the invention described in claim 3, the wiring distance from the main surface to the back surface in the control board can be minimized, and the impedance between the gate drive IC and the lead frame can be reduced.
According to the fourth aspect of the present invention, the wiring between the gate driving IC of the control board and the power semiconductor element of the power board can be minimized, and the impedance of the signal line can be reduced.

以下、本発明の実施の形態について図面を用いて説明する。   Hereinafter, embodiments of the present invention will be described with reference to the drawings.

図１は、本発明の第１実施例を示すパワーモジュールの断面図である。図において、８はリードフレーム、１１はＭＰＵ、１２はビアホールである。その他の符号は従来と同じであるため省略する。
ドライブ回路２１は、制御基板６とゲート駆動ＩＣ５とＭＰＵ１１とリードフレーム８と制御信号端子９により形成されておりＰＷＭ制御を行う。パワー回路２２は、パワー半導体素子としてＩＧＢＴ１とダイオード２とセラミック基板３と金属ベース４とパワー入出力端子１０により形成されている。ドライブ回路２１とパワー回路２２の電気的接続は制御基板６のリードフレーム８で接続するようになっている。
本発明が従来例と異なる部分は、制御基板とパワー基板の電気的接続をリードフレームにより行なっている部分である。 FIG. 1 is a cross-sectional view of a power module showing a first embodiment of the present invention. In the figure, 8 is a lead frame, 11 is an MPU, and 12 is a via hole. The other symbols are the same as in the prior art, and are omitted.
The drive circuit 21 is formed by the control board 6, the gate drive IC 5, the MPU 11, the lead frame 8, and the control signal terminal 9, and performs PWM control. The power circuit 22 is formed by an IGBT 1, a diode 2, a ceramic substrate 3, a metal base 4, and a power input / output terminal 10 as power semiconductor elements. The drive circuit 21 and the power circuit 22 are electrically connected by the lead frame 8 of the control board 6.
The portion of the present invention that differs from the conventional example is a portion in which the control board and the power board are electrically connected by a lead frame.

ドライブ回路２１は、図１に示すように、ビアホール１２を備えた制御基板６の主面にＭＰＵ１１とゲート駆動ＩＣ５を実装しており、ＭＰＵ１１にて上位指令を受けてＰＷＭ信号へ変換しゲート駆動ＩＣ５へ出力するようになっている。ゲート駆動ＩＣ５はＰＷＭ信号を増幅した後にパワー半導体素子へ出力するようになっている。増幅されたＰＷＭ信号は制御基板６のビアホール１２を介して基板裏面のリードフレーム８を通ってパワー半導体素子に電気的に接続されており、ＰＷＭ信号によりパワー半導体素子がスイッチングを行うようになっている。   As shown in FIG. 1, the drive circuit 21 has an MPU 11 and a gate drive IC 5 mounted on the main surface of the control board 6 having the via hole 12. It outputs to IC5. The gate driving IC 5 amplifies the PWM signal and outputs it to the power semiconductor element. The amplified PWM signal is electrically connected to the power semiconductor element via the lead frame 8 on the back surface of the substrate through the via hole 12 of the control substrate 6, and the power semiconductor element is switched by the PWM signal. Yes.

本実施のリードフレーム配線は、図２と図３に示すようにゲート配線８ａとソース配線８ｂで構成されている。図２は、リードフレーム配線を示す平面図、図３は、リードフレーム配線の接続を示す部分拡大断面図である。図において、１ａはＩＧＢＴのソース電極、１ｂはＩＧＢＴのゲート電極、２ａはダイオードのソース電極、８ａはリードフレームのゲート配線、８ｂはリードフレームのソース配線である。パワー入出力端子１０は、Ｐ端子１０ａ、Ｎ端子１０ｂ、Ｕ相端子１０ｃ、Ｖ相端子１０ｄ、Ｗ相端子１０ｅからなる。なお、１３はランド、１４ははんだである。
ゲート配線８ａは、ＩＧＢＴ１のゲート電極１ｂの電極幅に合わせてゲート電極側の配線幅が細くなるように、また制御基板６とＩＧＢＴ１の電極面のクリアランスを調整するためにＩＧＢＴ側に凸になるように加工されている。ソース配線８ｂは、ＩＧＢＴ１のソース電極１ｂとダイオード２のソース電極２ａとＰ端子１０ａを電気的に接続するように配線している。電極に接続する部分の配線幅は電極幅に合わせた幅で加工されておりＰ端子１０ａ側の配線幅は電極側よりも大きく加工されている。ソース電極２ａに接続する部分は制御基板６とソース電極２ａ面とのクリアランスを調整するためにソース電極２ａ側に凸になるように加工されている。リードフレーム８とゲート電極１ｂやソース電極とははんだ１４により接合するようになっている。同様にＮ端子１０ｂ、Ｕ相端子１０ｃ、Ｖ相端子１０ｄ、Ｗ相端子１０ｅのリードフレーム配線はＰ端子１０ａのリードフレーム配線と同じ形状に加工されており、それぞれＩＧＢＴ１とダイオード２を電気的に接続している。また、ＩＧＢＴ１とダイオード２のチップ高さが異なる場合はリードフレーム配線の電極と接合する凸部分の高さを変えることにより対応することが可能である。 The lead frame wiring of this embodiment is composed of a gate wiring 8a and a source wiring 8b as shown in FIGS. FIG. 2 is a plan view showing the lead frame wiring, and FIG. 3 is a partially enlarged sectional view showing the connection of the lead frame wiring. In the figure, 1a is an IGBT source electrode, 1b is an IGBT gate electrode, 2a is a diode source electrode, 8a is a lead frame gate wiring, and 8b is a lead frame source wiring. The power input / output terminal 10 includes a P terminal 10a, an N terminal 10b, a U phase terminal 10c, a V phase terminal 10d, and a W phase terminal 10e. Note that 13 is a land, and 14 is solder.
The gate wiring 8a is convex to the IGBT side so that the wiring width on the gate electrode side becomes narrower according to the electrode width of the gate electrode 1b of the IGBT 1 and the clearance between the control substrate 6 and the electrode surface of the IGBT 1 is adjusted. It is processed as follows. The source wiring 8b is wired so as to electrically connect the source electrode 1b of the IGBT 1, the source electrode 2a of the diode 2, and the P terminal 10a. The wiring width of the portion connected to the electrode is processed with a width corresponding to the electrode width, and the wiring width on the P terminal 10a side is processed larger than that on the electrode side. A portion connected to the source electrode 2a is processed to be convex toward the source electrode 2a side in order to adjust the clearance between the control substrate 6 and the surface of the source electrode 2a. The lead frame 8 is joined to the gate electrode 1b and the source electrode by solder 14. Similarly, the lead frame wiring of the N terminal 10b, U phase terminal 10c, V phase terminal 10d, and W phase terminal 10e is processed into the same shape as the lead frame wiring of the P terminal 10a, and the IGBT 1 and the diode 2 are electrically connected to each other. Connected. Further, when the chip heights of the IGBT 1 and the diode 2 are different, it can be dealt with by changing the height of the convex portion joined to the electrode of the lead frame wiring.

この第一実施形態によれば、制御基板とパワー基板の電気的な接続を制御基板に貼り付けたリードフレームで接続するようにしており、リードフレームのパワー半導体素子の電極に接合する部分を凸状に加工している。また、制御基板内の主面から裏面への配線を制御基板を貫通するビアホールで接続している。また、制御基板をパワー基板の上面に三次元的に配置している。このため、制御基板とパワー基板の基板間隔を自由に設計することができ、ゲート駆動ＩＣとパワー半導体素子間の配線距離を三次元的に最短にすることができ、ゲート駆動ＩＣとリードフレーム間のインピーダンスを減らすことができる。このため、パワーモジュールを三次元的に小型化できるとともに、パワー半導体素子のスイッチングサージやスイッチングロスを低減できるなどスイッチング特性を向上させることができる。また、リードフレームの幅を大きくできるため、パワー半導体素子の電極面からリードフレームを介して熱伝導性を向上させることができるため、パワー半導体素子の温度上昇を低減することができる。   According to the first embodiment, the electrical connection between the control board and the power board is connected by the lead frame attached to the control board, and the portion of the lead frame that is joined to the electrode of the power semiconductor element is convex. It is processed into a shape. Further, the wiring from the main surface to the back surface in the control board is connected by a via hole penetrating the control board. Further, the control board is three-dimensionally arranged on the upper surface of the power board. Therefore, the distance between the control board and the power board can be designed freely, the wiring distance between the gate drive IC and the power semiconductor element can be minimized in three dimensions, and the distance between the gate drive IC and the lead frame can be reduced. Impedance can be reduced. For this reason, the power module can be reduced in size three-dimensionally, and switching characteristics can be improved, for example, switching surge and switching loss of the power semiconductor element can be reduced. In addition, since the width of the lead frame can be increased, the thermal conductivity can be improved from the electrode surface of the power semiconductor element through the lead frame, so that the temperature rise of the power semiconductor element can be reduced.

図４は、本発明の第２実施例を示すパワーモジュールの断面図である。図４において、制御基板６とＭＰＵ１１とリードフレーム８と制御信号端子９とセラミックコンデンサ１５によりドライブ回路２１を形成する。ゲート駆動ＩＣ５とＩＧＢＴ１とダイオード２とセラミック基板３と金属ベース４とパワー入出力端子１０によりパワー回路２２を形成する。ドライブ回路２１とパワー回路２２の電気的接続は制御基板６のリードフレーム８で接続するようになっている。   FIG. 4 is a cross-sectional view of a power module showing a second embodiment of the present invention. In FIG. 4, a control circuit 6, MPU 11, lead frame 8, control signal terminal 9 and ceramic capacitor 15 form a drive circuit 21. A power circuit 22 is formed by the gate drive IC 5, IGBT 1, diode 2, ceramic substrate 3, metal base 4, and power input / output terminal 10. The drive circuit 21 and the power circuit 22 are electrically connected by the lead frame 8 of the control board 6.

ここで、上位指令からＰＷＭ信号変換を行いパワー半導体をスイッチングする方法については第一の実施例と同じであるため説明を省略する。図４において制御基板６の主面にはセラミックコンデンサ１５とＭＰＵ１１のみが実装されており、ゲート駆動ＩＣ５がパワー回路２２のセラミック基板３に実装されていることが特徴である。   Here, the method for switching the power semiconductor by performing the PWM signal conversion from the higher order command is the same as that in the first embodiment, and thus the description thereof is omitted. In FIG. 4, only the ceramic capacitor 15 and the MPU 11 are mounted on the main surface of the control board 6, and the gate drive IC 5 is mounted on the ceramic board 3 of the power circuit 22.

ゲート駆動ＩＣ５をセラミック基板３に実装したことにより、制御基板６にはＭＰＵ１１から出力される低電圧のＰＷＭ制御信号が伝送されるようになっている。リードフレーム配線はゲート駆動ＩＣ５の電極部分が接続できるような形状に加工されており、ゲート駆動ＩＣ５で増幅されたＰＷＭ信号出力はリードフレームのみで伝送されるようになっている。   By mounting the gate drive IC 5 on the ceramic substrate 3, a low voltage PWM control signal output from the MPU 11 is transmitted to the control substrate 6. The lead frame wiring is processed into a shape that can connect the electrode portion of the gate drive IC 5, and the PWM signal output amplified by the gate drive IC 5 is transmitted only by the lead frame.

この第２実施形態によれば、パワー基板にゲート駆動ＩＣを実装するようになっており、ゲート駆動ＩＣで増幅されたＰＷＭ信号出力はリードフレームのみで伝送されるようになっている。このため、スイッチング特性に影響を与えるゲート駆動ＩＣとパワー半導体素子の間のインピーダンスを減らすことができる。このため、パワー半導体素子のスイッチングサージやスイッチングロスをより低減できる。また、比較的発熱が大きなゲート駆動ＩＣの熱をセラミック基板とリードフレームの両面から熱伝導させることができるため、パワーモジュール全体の温度上昇を低減することができる。   According to the second embodiment, the gate drive IC is mounted on the power board, and the PWM signal output amplified by the gate drive IC is transmitted only by the lead frame. For this reason, the impedance between the gate drive IC and the power semiconductor element that affects the switching characteristics can be reduced. For this reason, the switching surge and switching loss of a power semiconductor element can be reduced more. Further, since the heat of the gate drive IC that generates a relatively large amount of heat can be conducted from both sides of the ceramic substrate and the lead frame, the temperature rise of the entire power module can be reduced.

リードフレームを基板に貼り付け電極との接続部分を凸状に加工しているため、電極部分に弾性があり、モータとアンプを一体化する場合のアンプの主回路電極としても適用できる。   Since the lead frame is attached to the substrate and the connection portion with the electrode is processed into a convex shape, the electrode portion has elasticity, and can be applied as the main circuit electrode of the amplifier when the motor and the amplifier are integrated.

本発明の第１実施例を示すパワーモジュールの断面図Sectional drawing of the power module which shows 1st Example of this invention 図１のリードフレーム配線を示す平面図Plan view showing the lead frame wiring of FIG. 図１のリードフレーム配線の接続を示す部分拡大断面図Partial enlarged sectional view showing the connection of the lead frame wiring of FIG. 本発明の第２実施例を示すパワーモジュールの断面図Sectional drawing of the power module which shows 2nd Example of this invention 従来のパワーモジュールを示す断面図Sectional view showing a conventional power module

符号の説明Explanation of symbols

１ ＩＧＢＴ
１ａ ＩＧＢＴのソース電極
１ｂ ＩＧＢＴのゲート電極
２ ダイオード
２ａ ダイオードのソース電極
３ セラミック基板
４ 金属ベース
５ ゲート駆動ＩＣ
６ 制御基板
７ アルミワイヤ
８ リードフレーム
８ａ リードフレームのゲート配線
８ｂ リードフレームのソース配線
９ 制御信号端子
１０ パワー入出力端子
１０ａ Ｐ端子
１０ｂ Ｎ端子
１０ｃ Ｕ相端子
１０ｄ Ｖ相端子
１０ｅ Ｗ相端子
１１ ＭＰＵ
１２ ビアホール
１３ ランド
１４ はんだ
１５ セラミックコンデンサ
２１ ドライブ回路
２２ パワー回路 1 IGBT
1a IGBT source electrode 1b IGBT gate electrode 2 Diode 2a Diode source electrode 3 Ceramic substrate 4 Metal base 5 Gate drive IC
6 Control board 7 Aluminum wire 8 Lead frame 8a Lead frame gate wiring 8b Lead frame source wiring 9 Control signal terminal 10 Power input / output terminal 10a P terminal 10b N terminal 10c U phase terminal 10d V phase terminal 10e W phase terminal 11 MPU
12 Via hole 13 Land 14 Solder 15 Ceramic capacitor 21 Drive circuit 22 Power circuit

Claims (4)

複数のパワー半導体素子と、この複数のパワー半導体素子を駆動するパワー回路と、前記複数のパワー半導体素子を制御する複数の制御素子からなるドライブ回路とを備えたパワーモジュールにおいて、
前記ドライブ回路を構成する制御基板にリードフレームを貼り合せたことを特徴とするパワーモジュール。 In a power module comprising a plurality of power semiconductor elements, a power circuit for driving the plurality of power semiconductor elements, and a drive circuit comprising a plurality of control elements for controlling the plurality of power semiconductor elements,
A power module, wherein a lead frame is bonded to a control board constituting the drive circuit. 前記リードフレームは、前記パワー半導体素子の電極が当接する部分を凸状に加工していることを特徴とする請求項１記載のパワーモジュール。   The power module according to claim 1, wherein the lead frame is formed by projecting a portion where the electrode of the power semiconductor element abuts. 前記制御基板は、基板を貫通する内部ビアホールを設け、ゲート駆動ＩＣと前記リードフレームとの間の電気的接続を最短に配置していることを特徴とする請求項１記載のパワーモジュール。   2. The power module according to claim 1, wherein the control board is provided with an internal via hole penetrating the board, and an electrical connection between the gate driving IC and the lead frame is arranged in the shortest. 前記制御基板を前記パワー基板の上方に配置し、前記ゲート駆動ＩＣと前記パワー半導体素子との間の電気的接続を最短距離になるよう三次元的に配置したことを特徴とする請求項３記載のパワーモジュール。   4. The control board is disposed above the power board, and the electrical connection between the gate driving IC and the power semiconductor element is three-dimensionally arranged to be the shortest distance. Power module.
JP2005119670A 2005-04-18 2005-04-18 Power module Pending JP2006303006A (en)

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