JP2016092346A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2016092346A
JP2016092346A JP2014228669A JP2014228669A JP2016092346A JP 2016092346 A JP2016092346 A JP 2016092346A JP 2014228669 A JP2014228669 A JP 2014228669A JP 2014228669 A JP2014228669 A JP 2014228669A JP 2016092346 A JP2016092346 A JP 2016092346A
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power semiconductor
main circuit
spring
semiconductor device
semiconductor element
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JP6256309B2 (en
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岡 誠次
Seiji Oka
誠次 岡
美子 玉田
Yoshiko TAMADA
美子 玉田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/71Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L2224/72Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips

Abstract

PROBLEM TO BE SOLVED: To provide a power semiconductor device which secures electrical connection with a surface of a power semiconductor device without using a joint material such as a solder, and has high reliability.SOLUTION: A power semiconductor device 100 includes: a heat dissipation substrate 1; a power semiconductor element provided on the heat dissipation substrate 1; a printed circuit board 5 arranged so as to face the power semiconductor element; and a conductive spring 4 for a main circuit that is a plate that has a plurality of projections, is a waveform and has elasticity, and of which both ends are joined to the printed circuit board and the plurality of projections are provided between the power semiconductor element and the printed circuit board 5 so as to be electrically connected to each of the power semiconductor element and the printed circuit board 5.SELECTED DRAWING: Figure 1

Description

本発明は、インバータ等に使用される電力用半導体素子が搭載された電力用半導体装置に関するものである。   The present invention relates to a power semiconductor device on which a power semiconductor element used for an inverter or the like is mounted.

従来の電力用半導体装置は、例えば回路基板と、その回路基板に搭載された電力用半導体素子(電流を制御する半導体素子)と、回路基板の上方に設けられたプリント基板と、半導体素子とプリント基板の一部とを電気的に接続する可撓性端子とを備えたものなどがある。可撓性端子として、可撓性を有するコイルばねまたは板ばねを用い、可撓性端子の下端は、半導体素子の電極面にはんだ等の接合材を用いて接合されているものが開示されている(例えば、特許文献1参照)。   A conventional power semiconductor device includes, for example, a circuit board, a power semiconductor element (semiconductor element for controlling current) mounted on the circuit board, a printed board provided above the circuit board, the semiconductor element and the printed circuit board. Some include a flexible terminal that electrically connects a part of the substrate. A flexible coil spring or leaf spring is used as the flexible terminal, and the lower end of the flexible terminal is bonded to the electrode surface of the semiconductor element using a bonding material such as solder. (For example, refer to Patent Document 1).

特開2014―107378号公報(段落0012〜0019、図1)JP 2014-107378 A (paragraphs 0012 to 0019, FIG. 1)

このような電力用半導体装置にあっては、プリント基板と電力用半導体素子は、可撓性を有するコイルばねを用いて接続し、はんだ等の接合材でコイルばねと接合されている。高温の電力用半導体素子の表面にはんだ等の接合材によるコイルばねとの接合部が存在すると、熱による膨張収縮を繰り返すと接合部での応力が増大し、剥離等が発生していた。それゆえ、信頼性に問題があった。   In such a power semiconductor device, the printed circuit board and the power semiconductor element are connected using a coil spring having flexibility, and are joined to the coil spring by a joining material such as solder. When a joint portion with a coil spring made of a joining material such as solder exists on the surface of a high-temperature power semiconductor element, when expansion and contraction due to heat are repeated, stress at the joint portion increases and peeling or the like occurs. Therefore, there was a problem with reliability.

本発明は、上述のような問題を解決するためになされたもので、はんだ等の接合材を用いることなく電力用半導体素子の表面との電気的な接続を確保でき、信頼性が高い電力用半導体装置を提供することを目的とする。   The present invention has been made to solve the above-described problems, and can ensure electrical connection with the surface of a power semiconductor element without using a bonding material such as solder, and has high reliability for power. An object is to provide a semiconductor device.

本発明に係る電力用半導体装置は、放熱基板と、放熱基板上に設けられた電力用半導体素子と、電力用半導体素子に対向するよう配設されたプリント基板と、複数の突出部を有する波形の弾性を有する板であり、プリント基板に両端部が接合され、複数の突出部が電力用半導体素子およびプリント基板とそれぞれ電気的に接続するよう、電力用半導体素子とプリント基板との間に設けられた導電性の主回路用ばねと、を備えたものである。   A power semiconductor device according to the present invention includes a heat dissipation substrate, a power semiconductor element provided on the heat dissipation substrate, a printed circuit board disposed to face the power semiconductor element, and a waveform having a plurality of protrusions. It is a plate having elasticity of, provided between the power semiconductor element and the printed circuit board so that both ends are joined to the printed circuit board and the plurality of protrusions are electrically connected to the power semiconductor element and the printed circuit board, respectively. And a conductive main circuit spring.

本発明に係る電力用半導体装置によれば、電力用半導体素子との電気的な接続に際し、はんだ等の接合材を用いることなく主回路用ばねが電力用半導体素子の表面との電気的な接続を確保でき、信頼性が高い電力用半導体装置を得ることができる。   According to the power semiconductor device of the present invention, the main circuit spring is electrically connected to the surface of the power semiconductor element without using a bonding material such as solder when electrically connecting to the power semiconductor element. And a highly reliable power semiconductor device can be obtained.

本発明の実施の形態1に係る電力用半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device for electric power which concerns on Embodiment 1 of this invention. 本発明の実施の形態1に係る主回路用ばねの外観図である。It is an external view of the spring for main circuits which concerns on Embodiment 1 of this invention. 本発明の実施の形態2に係る電力用半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device for electric power which concerns on Embodiment 2 of this invention. 本発明の実施の形態3に係る電力用半導体装置の要部断面図である。It is principal part sectional drawing of the semiconductor device for electric power which concerns on Embodiment 3 of this invention. 本発明の実施の形態3に係る主回路用ばねの外観図である。It is an external view of the spring for main circuits which concerns on Embodiment 3 of this invention. 本発明の実施の形態4に係る主回路用ばねの外観図である。It is an external view of the spring for main circuits which concerns on Embodiment 4 of this invention. 本発明の実施の形態4に係る主回路用ばねの変形例の外観図である。It is an external view of the modification of the spring for main circuits which concerns on Embodiment 4 of this invention. 本発明の実施の形態5に係る主回路用ばねの長手方向断面図である。It is longitudinal direction sectional drawing of the spring for main circuits which concerns on Embodiment 5 of this invention. 本発明の実施の形態6に係る電力用半導体装置の要部断面図である。It is principal part sectional drawing of the power semiconductor device which concerns on Embodiment 6 of this invention. 本発明の実施の形態7に係るプリント基板周囲の要部断面図である。It is principal part sectional drawing of the surroundings of the printed circuit board which concerns on Embodiment 7 of this invention.

実施の形態1.
本発明の実施の形態1に係る電力用半導体装置を図1および図2により説明する。図において、同一の符号を付したものは、同一またはこれに相当するものであり、このことは、明細書の全文において共通することである。
Embodiment 1 FIG.
A power semiconductor device according to a first embodiment of the present invention will be described with reference to FIGS. In the drawings, the same reference numerals are the same or equivalent, and this is common throughout the entire specification.

図1は本発明の実施の形態1に係る電力用半導体装置100の要部断面図である。図1に示すように、本発明の実施の形態1に係る電力用半導体装置100は、放熱基板1、電力用半導体素子、プリント基板5、主回路用ばね4、信号用ばね3、筐体7、および押圧蓋6を備えている。   FIG. 1 is a cross-sectional view of a main part of a power semiconductor device 100 according to Embodiment 1 of the present invention. As shown in FIG. 1, a power semiconductor device 100 according to Embodiment 1 of the present invention includes a heat dissipation board 1, a power semiconductor element, a printed board 5, a main circuit spring 4, a signal spring 3, and a housing 7. And a pressing lid 6.

放熱基板1は、金属板1a、第一絶縁層1b、および配線パターン1cで構成されている。図1に示すように、金属板1a、第一絶縁層1b、および配線パターン1cが順に積層されて設けられている。金属板1aおよび配線パターン1cは、銅またはアルミニウム等の金属材料が用いられ、電力用半導体素子の電流容量により金属板1aおよび配線パターン1cの厚みは適宜決定される。第一絶縁層1bは、絶縁性と放熱性を兼ね備える必要があるため、熱伝導率が良好なアルミナ、窒化アルミニウム、若しくは窒化ホウ素等のセラミック絶縁材料、または無機フィラーを充填した有機絶縁材料が用いられる。   The heat dissipation substrate 1 is composed of a metal plate 1a, a first insulating layer 1b, and a wiring pattern 1c. As shown in FIG. 1, the metal plate 1a, the 1st insulating layer 1b, and the wiring pattern 1c are laminated | stacked and provided in order. The metal plate 1a and the wiring pattern 1c are made of a metal material such as copper or aluminum, and the thicknesses of the metal plate 1a and the wiring pattern 1c are appropriately determined depending on the current capacity of the power semiconductor element. Since the first insulating layer 1b needs to have both insulating properties and heat dissipation properties, a ceramic insulating material such as alumina, aluminum nitride, or boron nitride having good thermal conductivity, or an organic insulating material filled with an inorganic filler is used. It is done.

電力用半導体素子は放熱基板1上に設けられており、放熱基板1の配線パターン1c上にはんだ等の接合材で実装されている。また、電力用半導体素子として、自己消孤型半導体素子2aと還流用ダイオード2b等がある。本発明の実施の形態1では、図1に示すように自己消孤型半導体素子2aと還流用ダイオード2bが設けられている。   The power semiconductor element is provided on the heat dissipation substrate 1 and is mounted on the wiring pattern 1c of the heat dissipation substrate 1 with a bonding material such as solder. Further, as power semiconductor elements, there are a self-extinguishing semiconductor element 2a, a reflux diode 2b, and the like. In the first embodiment of the present invention, as shown in FIG. 1, a self-extinguishing semiconductor element 2a and a reflux diode 2b are provided.

プリント基板5は、放熱基板1上に設けられた電力用半導体素子に対向するよう配設されている。プリント基板5の、電力用半導体素子に対向する第二絶縁層5cの面には、主電流が流れる主回路配線用電極パターン5aと、電力用半導体素子の制御信号用の制御信号用電極パターン5bとが、エッチング等で形成されている。主回路配線用電極パターン5aおよび制御信号用電極パターン5bに用いる金属材料は、銅またはアルミニウムが用いられ、大電流が流れる場合には銅が好んで用いられる。主回路配線用電極パターン5aおよび制御信号用電極パターン5bの厚みは、電力用半導体装置100の電流容量により適宜決定される。また、第二絶縁層5cは、エポキシ樹脂またはポリイミド樹脂等の熱硬化性樹脂が一般的に用いられ、補強部材としてガラス繊維を用いる場合が多い。一方、第二絶縁層5cは、セラミック等の無機絶縁層としても良い。   The printed circuit board 5 is disposed so as to face the power semiconductor element provided on the heat dissipation board 1. On the surface of the second insulating layer 5c facing the power semiconductor element of the printed circuit board 5, a main circuit wiring electrode pattern 5a through which a main current flows and a control signal electrode pattern 5b for a control signal of the power semiconductor element Are formed by etching or the like. The metal material used for the main circuit wiring electrode pattern 5a and the control signal electrode pattern 5b is copper or aluminum, and copper is preferably used when a large current flows. The thicknesses of the main circuit wiring electrode pattern 5 a and the control signal electrode pattern 5 b are appropriately determined by the current capacity of the power semiconductor device 100. The second insulating layer 5c is generally made of a thermosetting resin such as an epoxy resin or a polyimide resin, and glass fibers are often used as a reinforcing member. On the other hand, the second insulating layer 5c may be an inorganic insulating layer such as ceramic.

主回路用ばね4は、複数の突出部4aを有する波形の弾性を有する導電性の板である。主回路用ばね4は、プリント基板5に両端部4bが接合され、複数の突出部4aが電力用半導体素子およびプリント基板5とそれぞれ電気的に接続するよう、電力用半導体素子とプリント基板5との間に設けられている。また、主回路用ばね4は、複数の突出部4aの内の一部の突出部4aが自己消孤型半導体素子2a、および還流用ダイオード2bで構成された電力用半導体素子とそれぞれ接続する。   The main circuit spring 4 is a conductive plate having a wave-like elasticity having a plurality of protrusions 4a. The main circuit spring 4 is connected to the printed circuit board 5 at both ends 4b, and the plurality of protrusions 4a are electrically connected to the power semiconductor element and the printed circuit board 5, respectively. It is provided between. Further, the main circuit spring 4 is connected to a power semiconductor element in which a part of the plurality of protrusions 4a includes a self-extinguishing semiconductor element 2a and a return diode 2b.

本発明の実施の形態1に係る電力用半導体装置100では図1より、主回路用ばね4は放熱基板1側に突出した3つの突出部4aおよびプリント基板5側に突出した2つの突出部4aを有する。放熱基板1側に突出した3つの突出部4aは、それぞれ自己消孤型半導体素子2a、還流用ダイオード2b、および放熱基板1の配線パターン1cと電気的に接続している。また、プリント基板5側に突出した2つの突出部4aはプリント基板5の主回路配線用電極パターン5aと電気的に接続している。主回路用ばね4を用いることで、自己消孤型半導体素子2a、還流用ダイオード2b、放熱基板1の配線パターン1c、およびプリント基板5の主回路配線用電極パターン5aを個別に配線して電気的に接続するのではなく、一括で電気的に接続することができる。よって、自己消孤型半導体素子2a、還流用ダイオード2b、配線パターン1c、および主回路配線用電極パターン5aを個別に配線する必要がないため組立性に優れる。なお、主回路用ばね4の両端部4bは平面状になっており、主回路配線用電極パターン5aにはんだ等の接合材で接合され、固定されている。   In the power semiconductor device 100 according to the first embodiment of the present invention, as shown in FIG. 1, the main circuit spring 4 has three protruding portions 4a protruding toward the heat dissipation substrate 1 and two protruding portions 4a protruding toward the printed circuit board 5. Have The three protrusions 4a protruding toward the heat radiating substrate 1 are electrically connected to the self-extinguishing semiconductor element 2a, the reflux diode 2b, and the wiring pattern 1c of the heat radiating substrate 1, respectively. Further, the two protruding portions 4 a protruding toward the printed circuit board 5 are electrically connected to the main circuit wiring electrode pattern 5 a of the printed circuit board 5. By using the main circuit spring 4, the self-quenching semiconductor element 2 a, the reflux diode 2 b, the wiring pattern 1 c of the heat dissipation board 1, and the main circuit wiring electrode pattern 5 a of the printed board 5 are individually wired to be electrically It is possible to make electrical connection in a lump instead of connecting them collectively. Accordingly, it is not necessary to individually wire the self-extinguishing type semiconductor element 2a, the return diode 2b, the wiring pattern 1c, and the main circuit wiring electrode pattern 5a, so that the assemblability is excellent. Both end portions 4b of the main circuit spring 4 are planar, and are bonded and fixed to the main circuit wiring electrode pattern 5a with a bonding material such as solder.

また、主回路用ばね4は、複数の突出部4aの少なくとも1つが放熱基板1と電気的に接続していてもよい。本発明の実施の形態1に係る電力用半導体装置100では、主回路用ばね4の複数の突出部4aのうち、放熱基板1側に突出した1つの突出部4aが放熱基板1と電気的に接続している。これにより、はんだ等の接合材を用いることなく、主回路用ばね4は放熱基板1と電気的な接続を得ることができ、高い接続信頼性を得ることができる。   Further, the main circuit spring 4 may have at least one of the plurality of projecting portions 4 a electrically connected to the heat dissipation substrate 1. In the power semiconductor device 100 according to the first embodiment of the present invention, among the plurality of protrusions 4a of the main circuit spring 4, one protrusion 4a protruding toward the heat dissipation board 1 is electrically connected to the heat dissipation board 1. Connected. Thereby, the main circuit spring 4 can obtain an electrical connection with the heat dissipation board 1 without using a bonding material such as solder, and high connection reliability can be obtained.

図2は、本発明の実施の形態1に係る主回路用ばね4の外観図である。図2に示すように、主回路用ばね4は波形の弾性を有する板であり、複数の突出部4aを有している。主回路用ばね4の複数の突出部4aは、電力用半導体素子を含む放熱基板の形状に応じてそれぞれ突出度合が異なっていても良い。本発明の実施の形態1では放熱基板1側に突出した3つの突出部4aおよびプリント基板5側に突出した2つの突出部4aを有するが、図2より放熱基板1側に突出した3つの突出部4aのうち最も右側の突出部4aは、他の2つの突出部4aより放熱基板1側に突出している。これは、右側の突出部4aに対応する位置では、電力用半導体素子が配線パターン1c上に設けられていないため、電力用半導体素子の厚みの分だけ、右側の突出部4aは他の突出部4aより放熱基板1側に突出しているためである。   FIG. 2 is an external view of the main circuit spring 4 according to Embodiment 1 of the present invention. As shown in FIG. 2, the main circuit spring 4 is a corrugated elastic plate and has a plurality of protrusions 4a. The plurality of protrusions 4a of the main circuit spring 4 may have different protrusions depending on the shape of the heat dissipation board including the power semiconductor element. The first embodiment of the present invention has three protrusions 4a protruding toward the heat dissipation board 1 and two protrusions 4a protruding toward the printed circuit board 5, but the three protrusions protruding toward the heat dissipation board 1 from FIG. The rightmost protruding portion 4a of the portion 4a protrudes toward the heat dissipation substrate 1 from the other two protruding portions 4a. This is because the power semiconductor element is not provided on the wiring pattern 1c at the position corresponding to the right protrusion 4a, so that the right protrusion 4a corresponds to the other protrusion by the thickness of the power semiconductor element. This is because it protrudes toward the heat dissipation substrate 1 from 4a.

ここで主回路用ばね4の幅(図2の紙面奥行方向)は、自己消孤型半導体素子2aおよび還流用ダイオード2b等の電力半導体素子のガードリング内に接続できる幅となっている。   Here, the width of the main circuit spring 4 (the depth direction in FIG. 2) is a width that can be connected to the guard ring of the power semiconductor element such as the self-extinguishing semiconductor element 2a and the freewheeling diode 2b.

主回路用ばね4は波形の弾性を有する板であり、放熱基板1とプリント基板5に挟まれ、圧力を加えると容易に変形し、自己消孤型半導体素子2a、還流用ダイオード2b、および配線パターン1cとの十分な電気的接続信頼性を確保できる。また、容易に主回路用ばね4が変形するため、十分な接続信頼性を確保でき、主回路用ばね4の両端部4bへ加わる応力が低減し、はんだ等で接合された両端部4bの接続信頼性が向上する。   The main circuit spring 4 is a corrugated plate, is sandwiched between the heat dissipation substrate 1 and the printed circuit board 5 and is easily deformed when pressure is applied. The self-extinguishing semiconductor element 2a, the return diode 2b, and the wiring Sufficient electrical connection reliability with the pattern 1c can be ensured. Further, since the main circuit spring 4 is easily deformed, sufficient connection reliability can be ensured, the stress applied to the both end portions 4b of the main circuit spring 4 is reduced, and the connection between the both end portions 4b joined by solder or the like. Reliability is improved.

信号用ばね3は、一端が制御信号用電極パターン5bに、他端が電力用半導体素子に電気的に接続されている。   The signal spring 3 has one end electrically connected to the control signal electrode pattern 5b and the other end electrically connected to the power semiconductor element.

主回路用ばね4および信号用ばね3の材質としては、ばね性を有し電気抵抗が小さい導電性の金属が好ましく、例えばコルソン合金等の銅合金が用いられるが、これに限られるものではない。また、主回路用ばね4の厚みは、0.2mm〜1.0mmが好ましい。主回路用ばね4の厚みが0.2mm未満では、ばね性は良好であるが、主回路用ばね4の断面積が小さくなるため導通時に発熱の問題が生じてしまう場合がある。一方、主回路用ばね4の厚みが1.0mmを超えると、主回路用ばね4の断面積が大きくなるため導通時の発熱は問題ないがばね性が低下し、電力用半導体素子、プリント基板5、または主回路配線用電極パターン5aと電気的に接続する際に接触面積が低下する場合がある。   The material of the main circuit spring 4 and the signal spring 3 is preferably a conductive metal having a spring property and a small electric resistance. For example, a copper alloy such as a Corson alloy is used, but is not limited thereto. . The thickness of the main circuit spring 4 is preferably 0.2 mm to 1.0 mm. If the thickness of the main circuit spring 4 is less than 0.2 mm, the spring property is good, but since the cross-sectional area of the main circuit spring 4 is small, there may be a problem of heat generation during conduction. On the other hand, if the thickness of the main circuit spring 4 exceeds 1.0 mm, the cross-sectional area of the main circuit spring 4 increases, so there is no problem with heat generation at the time of conduction, but the spring property is reduced. 5 or the contact area may be reduced when electrically connecting to the main circuit wiring electrode pattern 5a.

筐体7は、放熱基板1およびプリント基板5を内包し、外周にねじ締め部7aを有する。また、筐体7には外部端子7bが設けられており、主回路用ばね4が電気的に接続された主回路配線用電極パターン5a、および信号用ばね3が電気的に接続された制御信号用電極パターン5bは、筐体7に設けられた外部端子7bとそれぞれ導通する。外部端子7bは、電力用半導体装置100と外部装置とを電気的に接続する。なお、筐体7は例えばガラス繊維で強化したポリフェニレンサルファイド(PPS)、ポリブチレンテレフタレート(PBT)、またはポリエチレン等の熱可塑性樹脂が好んで用いられるが、これに限られるものではない。   The housing 7 includes the heat dissipation board 1 and the printed board 5 and has a screw fastening portion 7a on the outer periphery. The casing 7 is provided with an external terminal 7b, and a main circuit wiring electrode pattern 5a to which the main circuit spring 4 is electrically connected, and a control signal to which the signal spring 3 is electrically connected. The electrode pattern 5b is electrically connected to the external terminal 7b provided on the housing 7. The external terminal 7b electrically connects the power semiconductor device 100 and the external device. The casing 7 is preferably made of thermoplastic resin such as polyphenylene sulfide (PPS), polybutylene terephthalate (PBT) or polyethylene reinforced with glass fiber, but is not limited thereto.

押圧蓋6は、筐体7と嵌合し、プリント基板5の主回路用ばね4に接続する面の反対面から押圧する。また、押圧蓋6は、プリント基板5の主回路用ばね4に接続する面の反対面に接触する突起6aを有している。本発明の実施の形態1では、押圧蓋6はプリント基板5の第二絶縁層5cに突起6aで均等に加圧し、プリント基板5と放熱基板1に挟まれた主回路用ばね4および信号用ばね3が加圧されることで弾性変形する。   The pressing lid 6 is fitted to the housing 7 and pressed from the surface opposite to the surface connected to the main circuit spring 4 of the printed circuit board 5. Further, the pressing lid 6 has a protrusion 6 a that comes into contact with a surface opposite to the surface connected to the main circuit spring 4 of the printed circuit board 5. In the first embodiment of the present invention, the pressing lid 6 uniformly pressurizes the second insulating layer 5c of the printed circuit board 5 with the projections 6a, and the main circuit spring 4 and the signal circuit sandwiched between the printed circuit board 5 and the heat radiating board 1. The spring 3 is elastically deformed by being pressurized.

これにより、主回路用ばね4は、自己消孤型半導体素子2a、還流用ダイオード2b、配線パターン1c、および主回路配線用電極パターン5aと電気的に接続される。同様に、信号用ばね3は自己消孤型半導体素子2aと制御信号用電極パターン5bを一定荷重を保ちながら電気的に接続する。主回路用ばね4と信号用ばね3が押圧蓋6で加圧され弾性変形するため、信頼性の高い電気的接続が得られる。ここで、押圧蓋6に設けられた突起6aは、プリント基板5を均一に加圧する位置に適宜配置される。   As a result, the main circuit spring 4 is electrically connected to the self-quenching semiconductor element 2a, the return diode 2b, the wiring pattern 1c, and the main circuit wiring electrode pattern 5a. Similarly, the signal spring 3 electrically connects the self-extinguishing semiconductor element 2a and the control signal electrode pattern 5b while maintaining a constant load. Since the main circuit spring 4 and the signal spring 3 are pressed by the pressing lid 6 and elastically deformed, a highly reliable electrical connection can be obtained. Here, the protrusions 6 a provided on the pressing lid 6 are appropriately arranged at positions where the printed circuit board 5 is uniformly pressed.

押圧蓋6に用いる材料は、プリント基板5を均一に加圧するため剛性に優れた高強度な材料が望ましい。例えば、ガラス繊維で強化したポリフェニレンサルファイド(PPS)、ポリブチレンテレフタレート(PBT)、またはポリエチレン等の熱可塑性樹脂が好んで用いられるが、これに限られるものではない。また、更に高強度が必要な場合、熱可塑性樹脂内部に補強用の金属板1aが挿入された押圧蓋6を用いてもよい。   The material used for the pressing lid 6 is desirably a high-strength material having excellent rigidity in order to pressurize the printed circuit board 5 uniformly. For example, a thermoplastic resin such as polyphenylene sulfide (PPS) reinforced with glass fiber, polybutylene terephthalate (PBT), or polyethylene is preferably used, but is not limited thereto. When higher strength is required, a pressing lid 6 in which a reinforcing metal plate 1a is inserted into the thermoplastic resin may be used.

本発明の実施の形態1では、図1に示すように押圧蓋6は筐体7と嵌合する。筐体7には押圧蓋6が嵌合するための溝7cが形成されており、溝7cに押圧蓋6を圧入することで嵌合する。溝7cは、押圧蓋6の厚みとほぼ同じ寸法であるが、押圧蓋6を圧入できるよう適宜寸法が調整されている。そのため、溝7cに押圧蓋6を容易に嵌合でき、押圧蓋6を固定することができる。また、押圧蓋6を溝7cに嵌合すると、押圧蓋6の突起6aが第二絶縁層5cを加圧するため、主回路用ばね4と信号用ばね3が圧縮され、弾性変形する。   In the first embodiment of the present invention, the pressing lid 6 is fitted to the housing 7 as shown in FIG. A groove 7c for fitting the pressing lid 6 is formed in the housing 7, and the casing 7 is fitted by press-fitting the pressing lid 6 into the groove 7c. The groove 7c has substantially the same size as the thickness of the pressing lid 6, but the size is appropriately adjusted so that the pressing lid 6 can be press-fitted. Therefore, the pressing lid 6 can be easily fitted into the groove 7c, and the pressing lid 6 can be fixed. When the pressing lid 6 is fitted into the groove 7c, the projection 6a of the pressing lid 6 pressurizes the second insulating layer 5c, so that the main circuit spring 4 and the signal spring 3 are compressed and elastically deformed.

次に本発明の実施の形態1における電力用半導体装置100の組立方法を説明する。放熱基板1に自己消孤型半導体素子2a、還流用ダイオード2bを実装し、主回路用ばね4と信号用ばね3が予め実装されたプリント基板5と放熱基板1とを固定するため位置決めする。その後、プリント基板5と外部端子7bとをはんだ等の接合材で接合し、押圧蓋6でプリント基板5を加圧し、筐体7に押圧蓋6を圧入し固定する。そして、筐体7、押圧蓋6、および放熱基板1に囲まれ形成された空間に封止樹脂を注入する。なお、封止樹脂を注入するための穴が押圧蓋6に設けられている(図示せず)。封止樹脂としては、主回路用ばね4および信号用ばね3のばね性を保つため弾性率が低い封止樹脂を用いても良い。封止樹脂としてシリコーンゲルなどを用いることが望ましいが、これに限られるものではない。   Next, a method for assembling power semiconductor device 100 in the first embodiment of the present invention will be described. The self-extinguishing type semiconductor element 2a and the freewheeling diode 2b are mounted on the heat dissipation board 1, and the printed circuit board 5 on which the main circuit spring 4 and the signal spring 3 are mounted in advance and the heat dissipation board 1 are positioned. Thereafter, the printed circuit board 5 and the external terminal 7 b are bonded with a bonding material such as solder, the printed circuit board 5 is pressurized with the pressing lid 6, and the pressing lid 6 is pressed into the housing 7 and fixed. Then, sealing resin is injected into a space surrounded by the casing 7, the pressing lid 6, and the heat dissipation substrate 1. Note that a hole for injecting the sealing resin is provided in the pressing lid 6 (not shown). As the sealing resin, a sealing resin having a low elastic modulus may be used in order to maintain the spring properties of the main circuit spring 4 and the signal spring 3. Although it is desirable to use silicone gel or the like as the sealing resin, it is not limited to this.

また、本発明の実施の形態1では電力用半導体素子として、自己消孤型半導体素子2a、還流用ダイオード2bの2つを放熱基板1上に設けた。放熱基板1上に電力用半導体素子を複数備え、主回路用ばね4は、複数の電力用半導体素子のそれぞれに、複数の突出部4aの少なくとも1つが電気的に接続される構成としてもよい。主回路用ばね4が複数の電力用半導体素子のそれぞれに、複数の突出部4aの少なくとも1つが電気的に接続されることで、複数の電力用半導体素子、放熱基板1の配線パターン1c、およびプリント基板5の主回路配線用電極パターン5aを一括で電気的に接続することができ組立性に優れ、高い接続信頼性を得ることができる。   In the first embodiment of the present invention, two self-quenching semiconductor elements 2a and freewheeling diodes 2b are provided on the heat dissipation substrate 1 as power semiconductor elements. A plurality of power semiconductor elements may be provided on the heat dissipation substrate 1, and the main circuit spring 4 may be configured such that at least one of the plurality of protrusions 4 a is electrically connected to each of the plurality of power semiconductor elements. The main circuit spring 4 is electrically connected to each of the plurality of power semiconductor elements with at least one of the plurality of protrusions 4a, so that the plurality of power semiconductor elements, the wiring pattern 1c of the heat dissipation board 1, and The main circuit wiring electrode patterns 5a of the printed circuit board 5 can be electrically connected all at once, so that the assemblability is excellent and high connection reliability can be obtained.

一方、電力用半導体素子がたとえ1つの場合であっても同様に、主回路用ばね4の複数の突出部4aの少なくとも1つが電気的に電力用半導体素子に接続される。接続は、はんだ等の接合材を用いることなく、主回路用ばね4と放熱基板1との電気的な接続を得ることができるため、高い接続信頼性を得ることができる。電力用半導体素子の表面は特に高温になるため、はんだ等の接合材を用いることなく主回路用ばね4と電気的な接続を得ることができるため、剥離等が生じることの抑制ができる。   On the other hand, even if there is only one power semiconductor element, at least one of the plurality of protrusions 4a of the main circuit spring 4 is electrically connected to the power semiconductor element. Since the electrical connection between the main circuit spring 4 and the heat dissipation substrate 1 can be obtained without using a bonding material such as solder, a high connection reliability can be obtained. Since the surface of the power semiconductor element is particularly high in temperature, electrical connection with the main circuit spring 4 can be obtained without using a bonding material such as solder.

従来、電力用半導体素子間の電気的な接続、または電力用半導体素子と配線パターン1cとの電気的な接続には、ワイヤーボンド接続法または先行技術文献(特開2014―107378号公報)に示す接続法があった。両接続法では、はんだ等の接合部材と電力半導体の接合部、またははんだ等の接合部材と配線パターン1cの接合部において、弾性率の違いおよび熱膨張係数の違いから応力が発生し、接合部でクラック、または剥離が生じ機械的信頼性および熱的信頼性が問題となっていた。   Conventionally, the electrical connection between the power semiconductor elements or the electrical connection between the power semiconductor elements and the wiring pattern 1c is shown in the wire bond connection method or the prior art document (Japanese Patent Laid-Open No. 2014-107378). There was a connection method. In the both connection methods, stress is generated due to a difference in elastic modulus and a difference in thermal expansion coefficient at a joint between a joining member such as solder and a power semiconductor, or between a joining member such as solder and the wiring pattern 1c. As a result, cracks or peeling occurred and mechanical reliability and thermal reliability became a problem.

以上のとおり、本発明の実施の形態1における電力用半導体装置100では、放熱基板1と、放熱基板1上に設けられた電力用半導体素子と、電力用半導体素子に対向するよう配設されたプリント基板5と、複数の突出部4aを有する波形の弾性を有する板であり、プリント基板5に両端部4bが接合され、複数の突出部4aが電力用半導体素子およびプリント基板5とそれぞれ電気的に接続するよう、電力用半導体素子とプリント基板5との間に設けられた導電性の主回路用ばね4と、を備える。   As described above, in power semiconductor device 100 in the first embodiment of the present invention, heat dissipating substrate 1, power semiconductor element provided on heat dissipating substrate 1, and the power semiconductor element are arranged to face each other. The printed circuit board 5 is a corrugated elastic plate having a plurality of protrusions 4a. Both ends 4b are joined to the printed circuit board 5, and the plurality of protrusions 4a are electrically connected to the power semiconductor element and the printed circuit board 5, respectively. And a conductive main circuit spring 4 provided between the power semiconductor element and the printed circuit board 5.

このような構成によれば、電力用半導体素子、放熱基板1、またはプリント基板5との電気的な接続に際し、接合材を用いることなく主回路用ばね4は電力用半導体素子の表面、放熱基板1、またはプリント基板5との電気的な接続を確保でき、接続の信頼性が高い電力用半導体装置100を得ることができる。   According to such a configuration, when electrically connecting to the power semiconductor element, the heat dissipation board 1 or the printed circuit board 5, the main circuit spring 4 is connected to the surface of the power semiconductor element, the heat dissipation board without using a bonding material. 1 or the electrical connection with the printed circuit board 5 can be ensured, and the power semiconductor device 100 with high connection reliability can be obtained.

主回路用ばね4は、電力用半導体素子、放熱基板1の配線パターン1c、およびプリント基板5の主回路配線用電極パターン5aを一括で容易に配線できるため組立性に優れる。また、電気的な接続に際し、はんだ等の接合材を用いず押圧蓋6で加圧して電気的に接続するため、接合材を用いた場合のように、熱膨張係数の違いから応力が発生し、接合部でクラック、または剥離が生じないため、機械的、熱的長期信頼性に優れる電力用半導体装置100が得られる。   The main circuit spring 4 is excellent in assembling because the power semiconductor element, the wiring pattern 1c of the heat radiating board 1, and the main circuit wiring electrode pattern 5a of the printed board 5 can be easily wired together. In addition, since the electrical connection is made by pressurizing with the pressing lid 6 without using a joining material such as solder when electrically connecting, stress is generated due to the difference in thermal expansion coefficient as in the case of using the joining material. Since no cracks or peeling occurs at the joint, the power semiconductor device 100 having excellent mechanical and thermal long-term reliability can be obtained.

また、放熱基板1上に設けられた電力用半導体素子の厚み分だけ、放熱基板1上で段差が生じるが、主回路用ばね4の突出部4aの放熱基板1側への飛び出し量を調整することで、電力用半導体素子、配線パターン1c、および主回路配線用電極パターン5aを簡単に一括で接続できるため、組立性に優れる。さらに、主回路用ばね4がばね性を有することから、主回路用ばね4の自由変形により各接続部での接続圧力を均等化でき、各々の接続部での接続信頼性が向上する。   Further, a step is generated on the heat dissipation substrate 1 by the thickness of the power semiconductor element provided on the heat dissipation substrate 1, but the amount of protrusion of the protrusion 4a of the main circuit spring 4 to the heat dissipation substrate 1 side is adjusted. As a result, the power semiconductor element, the wiring pattern 1c, and the main circuit wiring electrode pattern 5a can be easily and collectively connected, and therefore, the assembly is excellent. Furthermore, since the main circuit spring 4 has a spring property, the connection pressure at each connection portion can be equalized by free deformation of the main circuit spring 4, and the connection reliability at each connection portion is improved.

ここで、電力用半導体素子にはんだ付けするためには、Niめっき等の新しいめっき層を電力用半導体素子に施す必要がありコストが増加する。一方で、本発明では電力用半導体素子にはんだ付けを施す必要がないため、既存のAlフロントメタル電力用半導体素子を使用でき、コストの増加を抑制することができる。   Here, in order to solder the power semiconductor element, it is necessary to apply a new plating layer such as Ni plating to the power semiconductor element, which increases the cost. On the other hand, since it is not necessary to solder the power semiconductor element in the present invention, an existing Al front metal power semiconductor element can be used, and an increase in cost can be suppressed.

更に、プリント基板5を電力用半導体素子が実装された放熱基板1と対向するよう配置し、主回路用ばね4を介することでそれぞれの導通を得ることができる。また、主回路用ばね4は、主回路用ばね4の両端をプリント基板5に接合するのみで、容易に固定することができ、コイルばね等を用いた場合よりも接合箇所を少なくすることができる。さらに、立体的な配置をすることができるため、電力用半導体装置100の小型化が可能となる。小型化が可能となるため、より多くの電力用半導体素子等を電力用半導体装置100に設けることが可能となり、高密度化を図ることができる。   Further, the printed circuit board 5 is arranged so as to face the heat dissipation board 1 on which the power semiconductor element is mounted, and the respective conduction can be obtained through the main circuit spring 4. Further, the main circuit spring 4 can be easily fixed only by joining both ends of the main circuit spring 4 to the printed circuit board 5, and the number of joints can be reduced as compared with the case where a coil spring or the like is used. it can. Furthermore, since the three-dimensional arrangement can be achieved, the power semiconductor device 100 can be reduced in size. Since downsizing is possible, more power semiconductor elements and the like can be provided in the power semiconductor device 100, and the density can be increased.

実施の形態2.
本発明の実施の形態2に係る電力用半導体装置200を図3により説明する。なお、実施の形態1に係る電力用半導体装置200においては、プリント基板5が1層の場合を説明した。本発明の実施の形態2では、プリント基板15が2層の変形例について説明する。以下に実施の形態1と異なる点を中心に説明し、同一または対応する部分についての説明は省略する。
Embodiment 2. FIG.
A power semiconductor device 200 according to Embodiment 2 of the present invention will be described with reference to FIG. In the power semiconductor device 200 according to the first embodiment, the case where the printed circuit board 5 has one layer has been described. In the second embodiment of the present invention, a modification example in which the printed board 15 has two layers will be described. The following description will focus on differences from the first embodiment, and description of the same or corresponding parts will be omitted.

図3は本発明の実施の形態2に係る電力用半導体装置200の要部断面図である。図3に示すように、本実施の形態2における電力用半導体装置200は、2層に電極パターンが積層されたプリント基板15を有する。主回路用ばね4と接続する面に1層目の主回路配線用電極パターン15a、および信号用ばね3と接続する面に1層目の制御信号用電極パターン15bとを有し、それぞれの反対面に2層目の主回路配線用電極パターン15aおよび2層目の制御信号用電極パターン15bとを有する。主回路配線用スルーホール15dは、主回路配線用電極パターン15aに、制御信号用スルーホール15eは、制御信号用電極パターン15bに形成される。また、電力用半導体素子である自己消孤型半導体素子2aに接続した信号用ばね3は、制御信号用スルーホール15eに実装される。   FIG. 3 is a cross-sectional view of a main part of a power semiconductor device 200 according to the second embodiment of the present invention. As shown in FIG. 3, the power semiconductor device 200 according to the second embodiment includes a printed circuit board 15 in which electrode patterns are stacked in two layers. The main circuit wiring electrode pattern 15a on the surface connected to the main circuit spring 4 and the control signal electrode pattern 15b on the first layer on the surface connected to the signal spring 3 are opposite to each other. On the surface, a second-layer main circuit wiring electrode pattern 15a and a second-layer control signal electrode pattern 15b are provided. The main circuit wiring through hole 15d is formed in the main circuit wiring electrode pattern 15a, and the control signal through hole 15e is formed in the control signal electrode pattern 15b. The signal spring 3 connected to the self-extinguishing semiconductor element 2a, which is a power semiconductor element, is mounted in the control signal through hole 15e.

主回路配線用スルーホール15dは、1層目の主回路配線用電極パターン15aと2層目の主回路配線用電極パターン15aを導通するためにプリント基板15に設けられており、主回路配線用スルーホール15dを通じて1層目の主回路配線用電極パターン15aの配線を2層目の主回路配線用電極パターン15aに引き回すことができる。   The through hole 15d for main circuit wiring is provided in the printed circuit board 15 to conduct the first layer main electrode wiring electrode pattern 15a and the second layer main circuit wiring electrode pattern 15a. The wiring of the first-layer main circuit wiring electrode pattern 15a can be routed to the second-layer main circuit wiring electrode pattern 15a through the through hole 15d.

制御信号用スルーホール15eは、1層目の制御信号用電極パターン15bと2層目の制御信号用電極パターン15bを導通するためにプリント基板15に設けられており、制御信号用スルーホール15eを通じて1層目の制御信号用電極パターン15bを2層目の制御信号用電極パターン15bに引き回すことができる。ここで、制御信号用スルーホール15eは、信号用ばね3と同等な数で形成される。信号用ばね3は、電力用半導体素子である自己消孤型半導体素子2aにおけるゲート電極、さらにはエミッター電極と接続される。本発明の実施の形態2では、信号用ばね3は、制御信号用スルーホール15eの内部にはんだ付け等で挿入実装される。信号用ばね3は、線材から作られたばねで形成されている。線材から作られた信号用ばね3は、ばね性を保持しているため、電力用半導体素子である自己消孤型半導体素子2aのゲート電極、さらにはエミッター電極と小面積での接続が可能となる。   The control signal through-hole 15e is provided in the printed circuit board 15 to conduct the first-layer control signal electrode pattern 15b and the second-layer control signal electrode pattern 15b, and passes through the control signal through-hole 15e. The first-layer control signal electrode pattern 15b can be routed to the second-layer control signal electrode pattern 15b. Here, the control signal through holes 15 e are formed in the same number as the signal springs 3. The signal spring 3 is connected to a gate electrode and further an emitter electrode in the self-extinguishing semiconductor element 2a which is a power semiconductor element. In the second embodiment of the present invention, the signal spring 3 is inserted and mounted in the control signal through hole 15e by soldering or the like. The signal spring 3 is formed of a spring made from a wire. Since the signal spring 3 made of a wire retains its elasticity, it can be connected to the gate electrode and the emitter electrode of the self-extinguishing semiconductor element 2a, which is a power semiconductor element, in a small area. Become.

なお、主回路配線用スルーホール15dおよび制御信号用スルーホール15eは、スルーホール直径、スルーホール数、およびスルーホール内のめっき厚さについて、スルーホールを流れる電流容量により適宜設計される。   The through hole for main circuit wiring 15d and the through hole for control signal 15e are appropriately designed according to the current capacity flowing through the through hole with respect to the through hole diameter, the number of through holes, and the plating thickness in the through hole.

また、プリント基板15は、2層以上から構成され、少なくとも1層が負極パターンを形成してもよい。プリント基板15に負極パターンを形成すると、放熱基板1の配線パターン1c(正極パターン)と、平行になるため電界が相殺し、電力用半導体装置200の配線から生ずるインダクタンスを低減することができる。さらに、負極パターンが形成されたプリント基板15は、放熱基板1と対向する位置に配置され、主回路用ばね4を介して立体的な配線構造となる。そのため、平面上に広く配線する必要が無く、電力用半導体装置200の小型化が可能となる。   The printed circuit board 15 may be composed of two or more layers, and at least one layer may form a negative electrode pattern. When the negative electrode pattern is formed on the printed board 15, the electric field cancels out because it is parallel to the wiring pattern 1 c (positive electrode pattern) of the heat dissipation board 1, and the inductance generated from the wiring of the power semiconductor device 200 can be reduced. Furthermore, the printed circuit board 15 on which the negative electrode pattern is formed is disposed at a position facing the heat dissipation board 1 and has a three-dimensional wiring structure via the main circuit spring 4. Therefore, it is not necessary to wire widely on a plane, and the power semiconductor device 200 can be downsized.

以上のとおり、本発明の実施の形態2に係る電力用半導体装置200によると、プリント基板15は、2層以上で構成され、主回路用ばね4と接続する面に、主回路配線用電極パターン15aと制御信号用電極パターン15bとを有し、主回路配線用電極パターン15aは、主回路用ばね4と接続し、制御信号用電極パターン15bは、制御信号用スルーホール15eを有し、電力用半導体素子に接続した信号用ばね3が制御信号用スルーホール15eに実装されることを特徴としている。また、プリント基板15は、2層以上で構成され、主回路配線用電極パターン15aに主回路配線用スルーホール15dが形成されたことを特徴としている。さらに、プリント基板15は、2層以上から構成され、少なくとも一層が負極パターンを形成していることを特徴としている。   As described above, according to the power semiconductor device 200 according to the second embodiment of the present invention, the printed circuit board 15 is composed of two or more layers, and the electrode pattern for main circuit wiring is formed on the surface connected to the main circuit spring 4. 15a and a control signal electrode pattern 15b, the main circuit wiring electrode pattern 15a is connected to the main circuit spring 4, and the control signal electrode pattern 15b has a control signal through hole 15e. The signal spring 3 connected to the semiconductor element is mounted in the control signal through hole 15e. The printed circuit board 15 is composed of two or more layers, and is characterized in that a main circuit wiring through-hole 15d is formed in the main circuit wiring electrode pattern 15a. Furthermore, the printed circuit board 15 is composed of two or more layers, and at least one layer forms a negative electrode pattern.

このような構成によれば、信号用ばね3は、ばね性を保持したまま電力用半導体素子と小面積で電気的に接続することができるため、接続信頼性を維持した状態でプリント基板15、更には電力用半導体装置200の小型化が可能となる。   According to such a configuration, since the signal spring 3 can be electrically connected to the power semiconductor element with a small area while maintaining the spring property, the printed circuit board 15 while maintaining the connection reliability, Further, the power semiconductor device 200 can be downsized.

また、プリント基板15が2層以上から構成され、少なくとも1層が負極パターンを形成することで、インダクタンスを低減でき高機能化が図れる。   In addition, the printed circuit board 15 is composed of two or more layers, and at least one layer forms a negative electrode pattern, whereby inductance can be reduced and higher functionality can be achieved.

実施の形態3.
本発明の実施の形態3に係る電力用半導体装置300を図4および図5により説明する。なお、本発明の実施の形態3では、主回路用ばね24の変形例について説明する。以下に実施の形態1と異なる点を中心に説明し、同一または対応する部分についての説明は適宜省略する。
Embodiment 3 FIG.
A power semiconductor device 300 according to Embodiment 3 of the present invention will be described with reference to FIGS. In the third embodiment of the present invention, a modification of the main circuit spring 24 will be described. The following description will focus on differences from the first embodiment, and description of the same or corresponding parts will be omitted as appropriate.

図4は本発明の実施の形態3に係る電力用半導体装置300の要部断面図である。図5は本発明の実施の形態3に係る主回路用ばね4の外観図である。図4に示すように、主回路用ばね24の2つの突出部24aは、電力用半導体素子である自己消孤型半導体素子2aおよび還流用ダイオード2bとそれぞれ接続する。図5に示すように、本発明の実施の形態3における主回路用ばね24は、図2に示す実施の形態1の主回路用ばね24より長手方向(図5の主回路用ばね24の両端部24bを結ぶ直線方向)に短く、突出部24aの数が少ない負極用の主回路用ばね24である。主回路用ばね24はプリント基板5側に1つおよび放熱基板1側に2つの突出部24aを有するため、プリント基板5、自己消孤型半導体素子2a、および還流用ダイオード2bとそれぞれ電気的に接続することができる。   FIG. 4 is a cross-sectional view of a main part of a power semiconductor device 300 according to the third embodiment of the present invention. FIG. 5 is an external view of the main circuit spring 4 according to Embodiment 3 of the present invention. As shown in FIG. 4, the two protrusions 24a of the main circuit spring 24 are connected to the self-extinguishing semiconductor element 2a and the return diode 2b, which are power semiconductor elements, respectively. As shown in FIG. 5, the main circuit spring 24 in the third embodiment of the present invention is longer than the main circuit spring 24 in the first embodiment shown in FIG. 2 (both ends of the main circuit spring 24 in FIG. 5). This is a main circuit spring 24 for a negative electrode that is short in a straight direction connecting the portions 24b and has a small number of protrusions 24a. Since the main circuit spring 24 has one protrusion 24a on the printed circuit board 5 side and two protrusions 24a on the heat dissipation board 1 side, the printed circuit board 5, the self-extinguishing semiconductor element 2a, and the freewheeling diode 2b are electrically connected to each other. Can be connected.

このような構成によれば、主回路用ばね24は、長手方向に短くなった波形の弾性を有する板であるため、より小さい圧力で変形し、ばね性を有することから十分な電気的接続信頼性を得ることができる。また、主回路用ばね24の長手方向の両端の両端部24bは、ばねの弾性で加わる力が小さくなるため、両端の両端部24bへの応力が低減し、接合部の接合信頼性が向上する。   According to such a configuration, the main circuit spring 24 is a plate having a corrugated elasticity that is shortened in the longitudinal direction. Therefore, the main circuit spring 24 is deformed with a smaller pressure and has a spring property. Sex can be obtained. Further, since both ends 24b at both ends in the longitudinal direction of the main circuit spring 24 have a small force applied by the elasticity of the spring, the stress on the both ends 24b at both ends is reduced, and the joining reliability of the joint is improved. .

実施の形態4.
本発明の実施の形態4に係る電力用半導体装置を図6および図7により説明する。なお、本発明の実施の形態4では、主回路用ばね34(主回路用ばね44)の変形例について説明する。以下に実施の形態1と異なる点を中心に説明し、同一または対応する部分についての説明は省略する。
Embodiment 4 FIG.
A power semiconductor device according to a fourth embodiment of the present invention will be described with reference to FIGS. In the fourth embodiment of the present invention, a modification of the main circuit spring 34 (main circuit spring 44) will be described. The following description will focus on differences from the first embodiment, and description of the same or corresponding parts will be omitted.

図6は本発明の実施の形態4に係る主回路用ばね34の外観図である。また、図7は本発明の実施の形態4に係る主回路用ばね44の変形例の外観図である。図6に示すように、本実施の形態4における主回路用ばね34は、長手方向に複数のスリット34cを有する。図6の主回路用ばね34は放熱基板1側に3つの突出部34a、プリント基板5側に2つの突出部34aを有する波形の弾性を有する板であり、自己消孤型半導体素子2a、還流用ダイオード2b、配線パターン1c、並びにプリント基板5とそれぞれ電気的に接合する。一方、図7に示す主回路用ばね44は、長手方向に複数のスリット44cを有し、放熱基板1側に2つの突出部44a、プリント基板5側に1つの突出部44aを有する波形の弾性を有する板である。自己消孤型半導体素子2a、還流用ダイオード2b、並びにプリント基板5とそれぞれ電気的に接合する。なお、スリット4cは主回路用ばね44の長手方向に設けられ、主回路配線用電極パターン5aとはんだ等で接合する両端の両端部44bには設けていない。   FIG. 6 is an external view of a main circuit spring 34 according to Embodiment 4 of the present invention. FIG. 7 is an external view of a modified example of the main circuit spring 44 according to the fourth embodiment of the present invention. As shown in FIG. 6, the main circuit spring 34 in the fourth embodiment has a plurality of slits 34c in the longitudinal direction. The main circuit spring 34 shown in FIG. 6 is a corrugated elastic plate having three protrusions 34a on the heat dissipation board 1 side and two protrusions 34a on the printed circuit board 5 side. Each of the diode 2b, the wiring pattern 1c, and the printed board 5 is electrically joined. On the other hand, the main circuit spring 44 shown in FIG. 7 has a plurality of slits 44c in the longitudinal direction, has two protruding portions 44a on the heat dissipating substrate 1 side, and one protruding portion 44a on the printed circuit board 5 side. It is a board which has. The self-quenching semiconductor element 2a, the freewheeling diode 2b, and the printed circuit board 5 are electrically connected to each other. The slit 4c is provided in the longitudinal direction of the main circuit spring 44, and is not provided at both end portions 44b at both ends joined to the main circuit wiring electrode pattern 5a by solder or the like.

図6に示すように、主回路用ばね34の長手方向にスリット34cを形成すると、主回路用ばね34の波形の板は短冊状に分割される。短冊状になった板は力が加わると変形しやすくなるため、自己消孤型半導体素子2a、還流用ダイオード2b、配線パターン1c、またはプリント基板5と、突出部34aとの接触面積がそれぞれ増加する。スリット34cの本数は特に制約がないが、スリット34cの本数が多すぎると接触できる板の面積が減少し、十分な電流容量が得られない可能性があるため、接触面積の確保に注意する必要がある。図6において、直線状のスリット34cであるが形状はこれに限られず、ジグザグ状の屈曲した線等のスリット34cでもよい。なお、図6に示す主回路用ばね34の特徴を、図7に示す主回路用ばね44も同様に有している。   As shown in FIG. 6, when the slit 34c is formed in the longitudinal direction of the main circuit spring 34, the corrugated plate of the main circuit spring 34 is divided into strips. Since the strip-shaped plate is easily deformed when a force is applied, the contact area between the protruding part 34a and the self-extinguishing semiconductor element 2a, the return diode 2b, the wiring pattern 1c, or the printed circuit board 5 increases. To do. The number of slits 34c is not particularly limited, but if the number of slits 34c is too large, the area of the plate that can be contacted decreases and sufficient current capacity may not be obtained, so care must be taken to ensure the contact area. There is. In FIG. 6, although it is the linear slit 34c, a shape is not restricted to this, The slit 34c, such as a zigzag bent line | wire, may be sufficient. The main circuit spring 34 shown in FIG. 7 has the same characteristics as the main circuit spring 34 shown in FIG.

以上のとおり、本発明の実施の形態4に係る電力用半導体装置によると、主回路用ばね34(主回路用ばね44)は、長手方向に複数のスリット34c(スリット44c)を有することを特徴としている。   As described above, according to the power semiconductor device of the fourth embodiment of the present invention, the main circuit spring 34 (main circuit spring 44) has a plurality of slits 34c (slits 44c) in the longitudinal direction. It is said.

このような構成によれば、主回路用ばね4の長手方向に複数のスリット34c(スリット44c)があることで主回路用ばね34(主回路用ばね44)は短冊状に分割され、力が加わると容易に変形するため、電力用半導体素子、配線パターン1c、またはプリント基板5と、突出部4aとの接触面積がそれぞれ増加する。よって、接触面で凹凸が発生していても個々に変形するため接続面積が十分に確保できる。それゆえ、接続信頼性が向上すると同時に、十分な電流容量を得ることができる。   According to such a configuration, the plurality of slits 34 c (slits 44 c) are provided in the longitudinal direction of the main circuit spring 4, so that the main circuit spring 34 (main circuit spring 44) is divided into strips, and the force is increased. Since it deforms easily when added, the contact area between the power semiconductor element, the wiring pattern 1c, or the printed circuit board 5, and the protrusion 4a increases. Therefore, even if unevenness is generated on the contact surface, it is deformed individually, so that a sufficient connection area can be secured. Therefore, the connection reliability is improved and a sufficient current capacity can be obtained.

実施の形態5.
本発明の実施の形態5に係る電力用半導体装置を図8により説明する。なお、本発明の実施の形態5では、主回路用ばね54の変形例について説明する。以下に実施の形態3と異なる点を中心に説明し、同一または対応する部分についての説明は省略する。
Embodiment 5 FIG.
A power semiconductor device according to a fifth embodiment of the present invention will be described with reference to FIG. In the fifth embodiment of the present invention, a modification of the main circuit spring 54 will be described. The following description will focus on differences from the third embodiment, and description of the same or corresponding parts will be omitted.

図8は本発明の実施の形態5に係る主回路用ばね54の長手方向断面図である。主回路用ばね54は、複数の突出部54aの少なくとも一部に突起54dを有している。図8に示すように、本実施の形態5における主回路用ばね54は放熱基板1側の2つの突出部54aに突起54dが設けられている。主回路用ばね54と、電力用半導体素子である自己消孤型半導体素子2aおよび還流用ダイオード2bと、がそれぞれ電気的に接続する箇所に突起54dを設けることで、主回路用ばね54と電力用半導体素子の表面との電気的な接続信頼性を向上することができる。一方で、突起54d形状に起因して、主回路用ばね54と電力用半導体素子の表面との接続する面積が逆に減少する恐れがあり、その場合には電流容量が制限される可能性が生じる。そこで、突起54d形状は部分的に平面形状とし、電力用半導体素子表面との接続面積を確保する。ただし、突起54d形状は平面形状に限られるものではなく、電力用半導体素子等の表面との接続面積を確保できる形状であればよい。   FIG. 8 is a longitudinal sectional view of the main circuit spring 54 according to the fifth embodiment of the present invention. The main circuit spring 54 has a protrusion 54d on at least a part of the plurality of protrusions 54a. As shown in FIG. 8, the main circuit spring 54 according to the fifth embodiment is provided with protrusions 54d on two protrusions 54a on the heat dissipation board 1 side. Protrusion 54d is provided at a location where the main circuit spring 54 and the self-extinguishing semiconductor element 2a and the return diode 2b, which are power semiconductor elements, are electrically connected to each other. The reliability of electrical connection with the surface of the semiconductor element can be improved. On the other hand, due to the shape of the protrusion 54d, the area where the main circuit spring 54 and the surface of the power semiconductor element are connected may be reduced. In this case, the current capacity may be limited. Arise. Accordingly, the shape of the protrusion 54d is partially planar to ensure a connection area with the surface of the power semiconductor element. However, the shape of the protrusion 54d is not limited to a planar shape, and may be any shape that can secure a connection area with the surface of the power semiconductor element or the like.

主回路用ばね54の突起54dは、機械加工により形成される方法、または別部材を主回路用ばね54に溶接等で接合し形成される方法などがある。機械加工で突起54dを形成すると安価に形成可能となる。なお、本発明の実施の形態5の主回路用ばね54に、実施の形態4で示した複数のスリットを設けてもよい。   The protrusion 54d of the main circuit spring 54 may be formed by machining, or may be formed by joining another member to the main circuit spring 54 by welding or the like. If the protrusion 54d is formed by machining, it can be formed at low cost. In addition, you may provide the some slit shown in Embodiment 4 in the spring 54 for main circuits of Embodiment 5 of this invention.

なお、本発明の実施の形態5では、実施の形態3と異なる点を中心に説明したが、実施の形態1の主回路用ばね54に突起54dを設けても何ら問題ない。   Although the fifth embodiment of the present invention has been described with a focus on differences from the third embodiment, there is no problem if the main circuit spring 54 of the first embodiment is provided with the protrusion 54d.

以上のとおり、本発明の実施の形態5に係る電力用半導体装置によると、主回路用ばね54は、複数の突出部54aの少なくとも一部に突起54dを有していることを特徴としている。   As described above, according to the power semiconductor device of the fifth embodiment of the present invention, the main circuit spring 54 is characterized in that the protrusion 54d is provided on at least a part of the plurality of protrusions 54a.

このような構成によれば、主回路用ばね54と電力用半導体素子、配線パターン1c、または主回路配線用電極パターン5aとが電気的に接続する箇所に突起54dを設けることで、電気的な接続信頼性を向上することができる。   According to such a configuration, by providing the protrusion 54d at a location where the main circuit spring 54 and the power semiconductor element, the wiring pattern 1c, or the main circuit wiring electrode pattern 5a are electrically connected, Connection reliability can be improved.

実施の形態6.
本発明の実施の形態6に係る電力用半導体装置600を図9により説明する。なお、実施の形態2に係る電力用半導体装置600においては、押圧蓋6を筐体7に圧入して固定する場合を説明した。本発明の実施の形態6では、押圧蓋66と筐体77をねじ締めで固定する場合の変形例について説明する。以下に実施の形態2と異なる点を中心に説明し、同一または対応する部分についての説明は省略する。
Embodiment 6 FIG.
A power semiconductor device 600 according to Embodiment 6 of the present invention will be described with reference to FIG. In the power semiconductor device 600 according to the second embodiment, the case where the press lid 6 is press-fitted into the housing 7 and fixed has been described. In the sixth embodiment of the present invention, a modified example in which the pressing lid 66 and the housing 77 are fixed by screwing will be described. The following description will focus on differences from the second embodiment, and description of the same or corresponding parts will be omitted.

図9は本発明の実施の形態6に係る電力用半導体装置600の要部断面図である。電力用半導体装置600は、放熱基板1およびプリント基板15を内包する筐体7を備え、押圧蓋66は、筐体7とネジ止めされることを特徴とする。図9に示すように、本発明の実施の形態6における電力用半導体装置600は、実施の形態2で図示した筐体7に押圧蓋6が嵌合する構造ではなく、筐体77の外周に設けられたねじ締め部77aにおいて、筐体77と押圧蓋66が固定される構造である。押圧蓋66を放熱フィン等の放熱装置とねじで締結すると、押圧蓋66の突起66aがプリント基板15を加圧し、主回路用ばね4および信号用ばね3に力を加えることができる。   FIG. 9 is a cross-sectional view of a main part of a power semiconductor device 600 according to the sixth embodiment of the present invention. The power semiconductor device 600 includes a casing 7 that encloses the heat dissipation board 1 and the printed board 15, and the pressing lid 66 is screwed to the casing 7. As shown in FIG. 9, the power semiconductor device 600 according to the sixth embodiment of the present invention has a structure in which the pressing lid 6 is fitted to the housing 7 illustrated in the second embodiment, but not on the outer periphery of the housing 77. In the provided screw fastening portion 77a, the housing 77 and the pressing lid 66 are fixed. When the pressing lid 66 is fastened with a heat radiating device such as a radiating fin with a screw, the projection 66 a of the pressing lid 66 presses the printed circuit board 15, and a force can be applied to the main circuit spring 4 and the signal spring 3.

なお、本発明の実施の形態6では、実施の形態2と異なる点を中心に説明したが、実施の形態1の電力用半導体装置100に、本発明の実施の形態6の押圧蓋66および筐体77を適用することは何ら問題ない。   Although the sixth embodiment of the present invention has been described mainly with respect to differences from the second embodiment, the power lid device 66 and the housing of the sixth embodiment of the present invention are added to the power semiconductor device 100 of the first embodiment. There is no problem applying the body 77.

以上のとおり、本発明の実施の形態6に係る電力用半導体装置600によると、電力用半導体装置600は、放熱基板1およびプリント基板15を内包する筐体77を備え、押圧蓋66は、筐体77とネジ止めされることを特徴としている。   As described above, according to the power semiconductor device 600 according to the sixth embodiment of the present invention, the power semiconductor device 600 includes the housing 77 including the heat dissipation board 1 and the printed board 15, and the pressing lid 66 includes the housing. It is characterized by being screwed to the body 77.

このような構成によれば、押圧蓋66をねじ締めにより固定しているため、振動、または熱履歴等で押圧蓋66からプリント基板5へ加わる圧力が変動するといった問題もなく、安定して力を加えることができ、信号用ばね3、および主回路用ばね4部の接続信頼性が向上する効果が得られる。   According to such a configuration, since the pressing lid 66 is fixed by screw tightening, there is no problem that the pressure applied from the pressing lid 66 to the printed circuit board 5 fluctuates due to vibration, heat history, or the like. As a result, the connection reliability of the signal spring 3 and the main circuit spring 4 can be improved.

実施の形態7.
本発明の実施の形態7に係る電力用半導体装置を図10により説明する。なお、本発明の実施の形態7では、プリント基板65に電子部品8が実装された場合について説明する。以下に実施の形態1と異なる点を中心に説明し、同一または対応する部分についての説明は省略する。
Embodiment 7 FIG.
A power semiconductor device according to a seventh embodiment of the present invention will be described with reference to FIG. In the seventh embodiment of the present invention, the case where the electronic component 8 is mounted on the printed circuit board 65 will be described. The following description will focus on differences from the first embodiment, and description of the same or corresponding parts will be omitted.

図10は本発明の実施の形態7に係るプリント基板65周囲の要部断面図である。プリント基板65は、2層以上から構成され、主回路用ばね4と接続する面と反対方向の最外層面に、電子部品8が搭載される。図10に示すように本発明の実施の形態7において、電力用半導体装置におけるプリント基板65は3層の電極パターンで構成されている。第二絶縁層65cは平行な2層の絶縁層からなり、どちらの絶縁層の両面にも電極パターンが設けられている。   FIG. 10 is a cross-sectional view of a main part around the printed circuit board 65 according to Embodiment 7 of the present invention. The printed circuit board 65 is composed of two or more layers, and the electronic component 8 is mounted on the outermost layer surface opposite to the surface connected to the main circuit spring 4. As shown in FIG. 10, in the seventh embodiment of the present invention, the printed circuit board 65 in the power semiconductor device is constituted by three layers of electrode patterns. The second insulating layer 65c is composed of two parallel insulating layers, and electrode patterns are provided on both surfaces of either insulating layer.

1層目の第二絶縁層65cは、主回路用ばね4と接続する面に1層目の主回路配線用電極パターン65a、および信号用ばね3と接続する面に1層目の制御信号用電極パターン65bとを有する。また、1層目の第二絶縁層65cは、1層目の主回路配線用電極パターン65aおよび制御信号用電極パターン65bがそれぞれ形成された面の反対面に2層目の主回路配線用電極パターン65aおよび制御信号用電極パターン65bをそれぞれ有する。さらに、2層目の第二絶縁層65cは、2層目の主回路配線用電極パターン65aおよび制御信号用電極パターン65bがそれぞれ形成された面の反対面にそれぞれ3層目の主回路配線用電極パターン65aおよび制御信号用電極パターン65bをそれぞれ有する。主回路配線用スルーホール65dは、主回路配線用電極パターン65aに、制御信号用スルーホール65eは、制御信号用電極パターン65bに形成される。   The first second insulating layer 65c has a first layer main circuit wiring electrode pattern 65a on the surface connected to the main circuit spring 4 and a first layer control signal use on the surface connected to the signal spring 3. And an electrode pattern 65b. Further, the second insulating layer 65c of the first layer is a main circuit wiring electrode of the second layer on the opposite side of the surface on which the main circuit wiring electrode pattern 65a and the control signal electrode pattern 65b of the first layer are formed. Each has a pattern 65a and a control signal electrode pattern 65b. Further, the second insulating layer 65c of the second layer is for the main circuit wiring of the third layer on the opposite side of the surface on which the electrode pattern 65a for the second layer and the electrode pattern for control signal 65b are respectively formed. Each has an electrode pattern 65a and a control signal electrode pattern 65b. The main circuit wiring through hole 65d is formed in the main circuit wiring electrode pattern 65a, and the control signal through hole 65e is formed in the control signal electrode pattern 65b.

信号用ばね3は、制御信号用スルーホール65eに実装される。さらに、主回路用ばね4と接続する面(1層目の主回路配線用電極パターン65a)と反対方向の最外層面は、抵抗等の電子部品8が搭載されたドライブ回路となっている。   The signal spring 3 is mounted in the control signal through hole 65e. Furthermore, the outermost layer surface in the direction opposite to the surface connected to the main circuit spring 4 (first-layer main circuit wiring electrode pattern 65a) is a drive circuit on which electronic components 8 such as resistors are mounted.

以上のとおり、本発明の実施の形態7に係る電力用半導体装置によると、プリント基板65は、2層以上から構成され、主回路用ばね4と接続する面と反対方向の最外層面に、電子部品8が搭載されることを特徴としている。   As described above, according to the power semiconductor device according to the seventh embodiment of the present invention, the printed circuit board 65 is composed of two or more layers, and on the outermost layer surface in the direction opposite to the surface connected to the main circuit spring 4, The electronic component 8 is mounted.

このような構成によれば、抵抗等の電子部品8が搭載されたドライブ回路が内蔵された電力用半導体装置であるため、ドライブ回路を電力用半導体装置の外部に設ける場合に比べ、電力用半導体素子との配線距離が短くなり応答性が向上する。よって、信頼性が高く小型化が可能な電力用半導体装置を得ることができる。   According to such a configuration, since the power semiconductor device has a built-in drive circuit on which the electronic component 8 such as a resistor is mounted, the power semiconductor is compared with the case where the drive circuit is provided outside the power semiconductor device. The wiring distance to the element is shortened and the response is improved. Therefore, a power semiconductor device that is highly reliable and can be miniaturized can be obtained.

なお、本発明は、発明の範囲内において、各実施の形態を自由に組み合わせることや、各実施の形態を適宜、変形、省略することが可能である。   Note that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be modified or omitted as appropriate.

1 放熱基板、2a 自己消孤型半導体素子、2b 還流用ダイオード、3 信号用ばね、4 主回路用ばね、4a突出部、4b 両端部、4c スリット、4d 突起、5 プリント基板、5a 主回路配線用電極パターン、5b 制御信号用電極パターン、5d 主回路配線用スルーホール、5e 制御信号用スルーホール、6 押圧蓋、6a 突起、7 筐体、8 電子部品 DESCRIPTION OF SYMBOLS 1 Heat dissipation board, 2a Self-extinguishing type semiconductor element, 2b Return diode, 3 Signal spring, 4 Main circuit spring, 4a protrusion part, 4b Both ends, 4c Slit, 4d Protrusion, 5 Printed board, 5a Main circuit wiring Electrode pattern, 5b control signal electrode pattern, 5d main circuit wiring through hole, 5e control signal through hole, 6 pressing lid, 6a protrusion, 7 housing, 8 electronic components

Claims (14)

放熱基板と、
前記放熱基板上に設けられた電力用半導体素子と、
前記電力用半導体素子に対向するよう配設されたプリント基板と、
複数の突出部を有する波形の弾性を有する板であり、前記プリント基板に両端部が接合され、前記複数の突出部が前記電力用半導体素子および前記プリント基板とそれぞれ電気的に接続するよう、前記電力用半導体素子と前記プリント基板との間に設けられた導電性の主回路用ばねと、
を備える電力用半導体装置。
A heat dissipation substrate;
A power semiconductor element provided on the heat dissipation substrate;
A printed circuit board disposed to face the power semiconductor element;
It is a corrugated plate having a plurality of protrusions, both ends are joined to the printed circuit board, and the plurality of protrusions are electrically connected to the power semiconductor element and the printed circuit board, respectively. A conductive main circuit spring provided between the power semiconductor element and the printed circuit board;
A power semiconductor device comprising:
前記電力用半導体素子を複数備え、
前記主回路用ばねは、複数の前記電力用半導体素子のそれぞれに、前記複数の突出部の少なくとも1つが電気的に接続される
請求項1に記載の電力用半導体装置。
A plurality of power semiconductor elements,
The power semiconductor device according to claim 1, wherein at least one of the plurality of protrusions is electrically connected to each of the plurality of power semiconductor elements in the main circuit spring.
前記プリント基板は、2層以上で構成され、前記主回路用ばねと接続する面に、主回路配線用電極パターンと制御信号用電極パターンとを有し、
前記主回路配線用電極パターンは、前記主回路用ばねと接続し、
前記制御信号用電極パターンは、制御信号用スルーホールを有し、前記電力用半導体素子に接続した信号用ばねが前記信号用スルーホールに実装される
請求項1または請求項2に記載の電力用半導体装置。
The printed circuit board is composed of two or more layers, and has a main circuit wiring electrode pattern and a control signal electrode pattern on a surface connected to the main circuit spring,
The main circuit wiring electrode pattern is connected to the main circuit spring,
3. The power signal according to claim 1, wherein the control signal electrode pattern has a control signal through hole, and a signal spring connected to the power semiconductor element is mounted in the signal through hole. Semiconductor device.
前記電力用半導体素子は、自己消弧型半導体素子と還流用ダイオードとで構成され、
前記主回路用ばねは、前記複数の突出部の内の一部の突出部が前記自己消弧型半導体素子、および前記還流用ダイオードとそれぞれ接続する
請求項1〜3のいずれか一項に記載の電力用半導体装置。
The power semiconductor element is composed of a self-extinguishing semiconductor element and a reflux diode,
4. The main circuit spring is configured such that a part of the plurality of protrusions is connected to the self-extinguishing semiconductor element and the reflux diode, respectively. 5. Power semiconductor devices.
前記主回路用ばねは、長手方向に複数のスリットを有する
請求項1〜4のいずれか一項に記載の電力用半導体装置。
The power semiconductor device according to claim 1, wherein the main circuit spring has a plurality of slits in a longitudinal direction.
前記主回路用ばねは、前記複数の突出部の少なくとも一部に突起を有している
請求項1〜5のいずれか一項に記載の電力用半導体装置。
The power semiconductor device according to claim 1, wherein the main circuit spring has a protrusion on at least a part of the plurality of protrusions.
前記プリント基板の前記主回路用ばねに接続する面の反対面から押圧する押圧蓋
を備える請求項1〜6のいずれか一項に記載の電力用半導体装置。
The power semiconductor device according to claim 1, further comprising: a pressing lid that presses from a surface opposite to a surface connected to the main circuit spring of the printed circuit board.
前記押圧蓋は、前記反対面と接触する突起を有する
請求項7に記載の電力用半導体装置。
The power semiconductor device according to claim 7, wherein the pressing lid has a protrusion that contacts the opposite surface.
前記放熱基板および前記プリント基板を内包する筐体を備え、
前記押圧蓋は、前記筐体と嵌合する
請求項7または請求項8に記載の電力用半導体装置。
A housing enclosing the heat dissipation board and the printed board,
The power semiconductor device according to claim 7, wherein the pressing lid is fitted to the housing.
前記放熱基板および前記プリント基板を内包する筐体を備え、
前記押圧蓋は、前記筐体とネジ止めされる
請求項7または請求項8に記載の電力用半導体装置。
A housing enclosing the heat dissipation board and the printed board,
The power semiconductor device according to claim 7, wherein the pressing lid is screwed to the housing.
前記主回路用ばねは、前記複数の突出部の少なくとも1つが前記放熱基板と電気的に接続する
請求項1〜10のいずれか一項に記載の電力用半導体装置。
The power semiconductor device according to claim 1, wherein at least one of the plurality of projecting portions is electrically connected to the heat dissipation substrate in the main circuit spring.
前記プリント基板は、2層以上で構成され、前記主回路配線用電極パターンに主回路配線用スルーホールが形成された
請求項3に記載の電力用半導体装置。
The power semiconductor device according to claim 3, wherein the printed circuit board includes two or more layers, and a through hole for main circuit wiring is formed in the electrode pattern for main circuit wiring.
前記プリント基板は、2層以上から構成され、少なくとも一層が負極パターンを形成する
請求項1〜12のいずれか一項に記載の電力用半導体装置。
The power semiconductor device according to any one of claims 1 to 12, wherein the printed board includes two or more layers, and at least one layer forms a negative electrode pattern.
前記プリント基板は、2層以上から構成され、前記主回路用ばねと接続する面と反対方向の最外層面に、電子部品が搭載される
請求項1〜13のいずれか一項に記載の電力用半導体装置。
The electric power according to any one of claims 1 to 13, wherein the printed circuit board includes two or more layers, and an electronic component is mounted on an outermost layer surface in a direction opposite to a surface connected to the main circuit spring. Semiconductor device.
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