JP2014107378A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2014107378A
JP2014107378A JP2012258490A JP2012258490A JP2014107378A JP 2014107378 A JP2014107378 A JP 2014107378A JP 2012258490 A JP2012258490 A JP 2012258490A JP 2012258490 A JP2012258490 A JP 2012258490A JP 2014107378 A JP2014107378 A JP 2014107378A
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circuit board
printed circuit
semiconductor device
semiconductor element
power semiconductor
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JP5975856B2 (en
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Jun Tokumaru
準 徳丸
Shinsuke Asada
晋助 浅田
Junji Fujino
純司 藤野
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
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    • H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
    • H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/4501—Shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
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    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
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    • H01L2224/45124—Aluminium (Al) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805—Shape
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
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    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
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    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
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    • H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
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    • H01L2924/191—Disposition
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    • H01L2924/351—Thermal stress

Abstract

PROBLEM TO BE SOLVED: To provide an inexpensive, high-performance, and highly reliable power semiconductor device.SOLUTION: A power semiconductor device 100 comprises: a semiconductor element 3 for controlling a current; a circuit board 1 on which the semiconductor element is mounted; a printed circuit board 7 that is arranged oppositely to the circuit board and has conductor portions 6, 7a; and a flexible terminal 4 for electrically connecting the semiconductor element and the conductor portions of the printed circuit board. An end of the flexible terminal is bonded to the semiconductor element, and the other end of the flexible terminal is elastically in contact with the conductive portions of the printed circuit board.

Description

本発明は、半導体装置、特に、電流を制御する半導体素子が搭載された電力用半導体装置に関する。   The present invention relates to a semiconductor device, and more particularly to a power semiconductor device on which a semiconductor element for controlling current is mounted.

一般に、電力用半導体装置は、例えばＩＧＢＴ（絶縁ゲート型バイポーラトランジスタ）、高耐圧ダイオードなどの電力用半導体素子が、接合、接着により回路基板へ搭載され、樹脂ケース内に収容及びパッケージ化された構成を有する。また一般に、回路基板として、銅貼り又はアルミ貼りセラミック基板、金属ベース板に絶縁シートを介して銅箔を接着した金属ベース基板などの放熱性に優れた回路基板が用いられる。これらの回路基板を用いて回路を形成し、電力用半導体素子をダイボンドし、ケースを取り付ける。そして、最終的にワイヤボンド、バスバーによる配線と共に、封止材を用いたケース内の封止により、電力用半導体素子を製造している。   Generally, a power semiconductor device has a configuration in which power semiconductor elements such as IGBTs (insulated gate bipolar transistors) and high voltage diodes are mounted on a circuit board by bonding and bonding, and are housed and packaged in a resin case. Have In general, a circuit board excellent in heat dissipation, such as a copper-coated or aluminum-coated ceramic board or a metal base board in which a copper foil is bonded to a metal base board via an insulating sheet, is used as the circuit board. A circuit is formed using these circuit boards, power semiconductor elements are die-bonded, and a case is attached. And finally, the semiconductor element for electric power is manufactured by sealing in the case using a sealing material with the wiring by a wire bond and a bus bar.

ここで、上記のような放熱性に優れた回路基板は一般的なプリント基板よりも高価であるため、これらの回路基板を用いた電力用半導体装置も結果として高価になるという課題があった。また、上記の回路基板は、プリント基板に比べて多層化が困難であるため、高密度配線による高機能化が困難であるという課題があった。   Here, since circuit boards excellent in heat dissipation as described above are more expensive than general printed boards, there is a problem that power semiconductor devices using these circuit boards also become expensive as a result. In addition, since the circuit board is difficult to be multi-layered as compared with a printed board, there is a problem that it is difficult to achieve high functionality by high-density wiring.

そこで、例えば特許文献１では、ポスト電極を介して、プリント基板と半導体素子とをはんだ付けにより接合することにより、電流経路及び放熱経路を拡大した半導体装置が開示されている。   Therefore, for example, Patent Document 1 discloses a semiconductor device in which a current path and a heat dissipation path are expanded by joining a printed circuit board and a semiconductor element by soldering via a post electrode.

特開第２００９−０６４８５２号公報JP 2009-0664852 A

しかし、特許文献１で開示された半導体装置の場合、例えば温度サイクルが負荷されたときに、半導体素子とプリント基板の熱膨張率の差に起因した熱応力がはんだ接合部に集中する。このとき、はんだクラックが進展するおそれがあることから、信頼性上の問題が生じる。   However, in the case of the semiconductor device disclosed in Patent Document 1, for example, when a temperature cycle is applied, thermal stress due to a difference in thermal expansion coefficient between the semiconductor element and the printed circuit board concentrates on the solder joint. At this time, there is a possibility that solder cracks may develop, and thus a problem in reliability arises.

そこで、本発明の目的は、低コストかつ高機能な、信頼性に優れた電力用半導体装置を提供することである。   SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to provide a power semiconductor device that is low in cost and high in function and excellent in reliability.

上記目的を達成するために、本発明に係る電力用半導体装置は、電流を制御する半導体素子と、半導体素子が搭載された回路基板と、回路基板に対向配置され、導体部を有するプリント基板と、半導体素子とプリント基板の導体部とを電気的に接続する可撓性端子とを備える。また、可撓性端子の一端は半導体素子に接合され、可撓性端子の他端はプリント基板の導体部と弾性的に接触している。   In order to achieve the above object, a power semiconductor device according to the present invention includes a semiconductor element that controls current, a circuit board on which the semiconductor element is mounted, a printed board that is disposed opposite to the circuit board and has a conductor portion. And a flexible terminal for electrically connecting the semiconductor element and the conductor portion of the printed circuit board. One end of the flexible terminal is joined to the semiconductor element, and the other end of the flexible terminal is in elastic contact with the conductor portion of the printed circuit board.

本発明によれば、第１に、可撓性端子がプリント基板の導体部に弾性的に接触していることから、半導体素子に加わる熱応力が低減し、電力用半導体装置の信頼性が向上する。第２に、半導体装置が搭載された回路基板の回路機能の一部が安価なプリント基板に担保される結果、電力用半導体装置が低コスト化する。第３に、多層化されたプリント基板を用いて高密度配線することにより、電力用半導体装置が高機能化する。   According to the present invention, first, since the flexible terminal is in elastic contact with the conductor portion of the printed circuit board, the thermal stress applied to the semiconductor element is reduced, and the reliability of the power semiconductor device is improved. To do. Secondly, as part of the circuit function of the circuit board on which the semiconductor device is mounted is secured by an inexpensive printed board, the cost of the power semiconductor device is reduced. Third, high-density wiring using a multilayered printed circuit board increases the functionality of the power semiconductor device.

本発明の実施の形態１に係る電力用半導体装置を示す断面図である。1 is a cross-sectional view showing a power semiconductor device according to a first embodiment of the present invention. 電力用半導体装置に備えられた可撓性端子を示す斜視図である。It is a perspective view which shows the flexible terminal with which the semiconductor device for electric power was equipped. 本発明の効果の説明図であり、図３（ａ）は従来のワイヤによる半導体素子の電気的接続を、図３（ｂ）は可撓性端子による電気的接続をそれぞれ示している。FIG. 3A is an explanatory view of the effect of the present invention. FIG. 3A shows electrical connection of a semiconductor element using a conventional wire, and FIG. 3B shows electrical connection using a flexible terminal. 本発明の実施の形態２に係る電力用半導体装置を示す断面図である。It is sectional drawing which shows the power semiconductor device which concerns on Embodiment 2 of this invention. 本発明の実施の形態３に係る電力用半導体装置を示す断面図である。It is sectional drawing which shows the semiconductor device for electric power which concerns on Embodiment 3 of this invention.

本発明の実施の形態に係る電力用半導体装置について、以下で図を参照しながら説明する。なお、各図において、同様の構成部分については同一の符号を付している。また、以下で説明する各実施の形態では、本発明による効果が顕著に現れることから、電力用半導体素子を備えた電力用半導体装置を例として説明するが、本発明はこれに限定されることなく、通常の半導体装置にも適用可能である。また、図示した電力用半導体装置は１つの半導体素子を備えているが、これに限定されることなく、２つ以上の半導体素子を備えてもよい。さらに、以下の説明では、「上」「下」などの方向を示す用語は、回路基板１が下側に、プリント基板７が上側に設けられた場合の方向を指し、実際に電力用半導体装置が設置される方向は、以下で説明する方向に限られない。   A power semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. In addition, in each figure, the same code | symbol is attached | subjected about the same component. Further, in each embodiment described below, since the effects of the present invention are remarkably exhibited, a power semiconductor device including a power semiconductor element will be described as an example, but the present invention is limited to this. In addition, the present invention can be applied to a normal semiconductor device. Moreover, although the illustrated power semiconductor device includes one semiconductor element, the power semiconductor device is not limited thereto, and may include two or more semiconductor elements. Further, in the following description, terms indicating directions such as “up” and “down” refer to directions when the circuit board 1 is provided on the lower side and the printed board 7 is provided on the upper side. The direction in which is installed is not limited to the direction described below.

実施の形態１．
まず、本発明の実施の形態１について、図１などを用いて説明する。
本実施形態に係る電力用半導体装置１００は、主として、回路基板１と、その回路基板１に搭載された電力用半導体素子（電流を制御する半導体素子、以下、半導体素子）３と、回路基板１の上方に設けられたプリント基板７と、半導体素子３とプリント基板７の一部とを電気的に接続する可撓性端子４とを備えている。また、図１の右側に示す可撓性端子４のように、半導体素子３を介さず、回路基板１の導電層１ａに接合された可撓性端子４が存在してもよい。 Embodiment 1 FIG.
First, Embodiment 1 of the present invention will be described with reference to FIG.
The power semiconductor device 100 according to the present embodiment mainly includes a circuit board 1, a power semiconductor element (semiconductor element for controlling current, hereinafter referred to as a semiconductor element) 3 mounted on the circuit board 1, and the circuit board 1. And a flexible terminal 4 that electrically connects the semiconductor element 3 and a part of the printed board 7. Further, like the flexible terminal 4 shown on the right side of FIG. 1, there may be a flexible terminal 4 joined to the conductive layer 1 a of the circuit board 1 without using the semiconductor element 3.

なお、図１では、図をわかりやすくするために、回路基板１の電気絶縁層１ｂ及び熱拡散層１ｃ、半導体装置３、プリント基板７の絶縁基板７ｂ及びケース１０については、ハッチングを省略している。これは、他の図についても同様である。   In FIG. 1, hatching is omitted for the electrical insulating layer 1 b and the thermal diffusion layer 1 c of the circuit board 1, the semiconductor device 3, the insulating board 7 b of the printed circuit board 7, and the case 10 for easy understanding of the drawing. Yes. The same applies to other figures.

回路基板１は、熱伝導性に優れた導電層１ａと、同じく熱伝導性に優れた電気絶縁層１ｂと、熱拡散層１ｃとを有している。また、回路基板１として、例えば、銅貼りセラミック基板、アルミ貼りセラミック基板、金属ベース基板などを用いることができる。一例として、銅箔が、アルミナフィラーを配合した樹脂絶縁層を介して、アルミニウムベース或は銅ベースに接合された金属ベース基板を用いることができる。また、放熱性を向上させるために、回路基板１の下面にヒートシンク（図示せず）を取り付けてもよい。   The circuit board 1 includes a conductive layer 1a having excellent thermal conductivity, an electrical insulating layer 1b having excellent thermal conductivity, and a thermal diffusion layer 1c. As the circuit board 1, for example, a copper-clad ceramic substrate, an aluminum-clad ceramic substrate, a metal base substrate, or the like can be used. As an example, a metal base substrate in which a copper foil is bonded to an aluminum base or a copper base through a resin insulating layer containing an alumina filler can be used. In order to improve heat dissipation, a heat sink (not shown) may be attached to the lower surface of the circuit board 1.

半導体素子３は、例えばＳｉ製のＩＧＢＴ、ＳｉＣ（シリコンカーバイド）製の高耐圧ダイオードなどである。半導体素子３を構成する半導体材料は、Ｓｉ、ＳｉＣに限定されることはなく、ＧａＮ（窒化ガリウム）のような他の材料でもよい。また、半導体素子３は、電極面３ａ，３ｂ（図３を参照）を有し、電極面３ａ，３ｂの外側には、絶縁を保つための絶縁領域３ｃが、例えば表面の面積の１割程度の割合で設けられる。半導体素子３が例えばＩＧＢＴであれば、上側の電極面３ａにエミッタ電極及びゲート電極が形成され、下側の電極面３ｂにコレクタ電極が形成される。また、半導体素子３は、ダイボンド材２を用いて回路基板１の導電層１ａに接合されている。   The semiconductor element 3 is, for example, a Si IGBT, a SiC (silicon carbide) high voltage diode, or the like. The semiconductor material constituting the semiconductor element 3 is not limited to Si and SiC, and may be other materials such as GaN (gallium nitride). Further, the semiconductor element 3 has electrode surfaces 3a and 3b (see FIG. 3). Outside the electrode surfaces 3a and 3b, an insulating region 3c for maintaining insulation is, for example, about 10% of the surface area. It is provided in the ratio. If the semiconductor element 3 is, for example, an IGBT, an emitter electrode and a gate electrode are formed on the upper electrode surface 3a, and a collector electrode is formed on the lower electrode surface 3b. In addition, the semiconductor element 3 is bonded to the conductive layer 1 a of the circuit board 1 using the die bonding material 2.

図２は、電力用半導体装置に備えられた可撓性端子を示す斜視図である。
図２に示すように、可撓性端子４は、板状で、かつ、交互に折り返された形状を有している。また、図１、図２では、可撓性端子４が略Ｓ字状（即ち、ｙ方向に見て曲線状）に折り返されているが、これに限定されることなく、例えばＺ字状、「＜」状、「＞」状に折り返されてもよく、これらを組み合わせた折り返し方でもよい。また、可撓性端子４は、ｙ方向に見て一部が直線状に形成されてもよい。さらに、折り返された可撓性端子４の最も上側の面４ａは、中央部分が凸状に形成されている。 FIG. 2 is a perspective view showing a flexible terminal provided in the power semiconductor device.
As shown in FIG. 2, the flexible terminal 4 is plate-shaped and has a shape that is alternately folded. In FIGS. 1 and 2, the flexible terminal 4 is folded back in a substantially S shape (that is, a curved shape when viewed in the y direction), but is not limited thereto, for example, a Z shape, It may be folded back into a “<” shape or “>” shape, or may be folded back in combination. Further, the flexible terminal 4 may be partially formed in a straight line when viewed in the y direction. Further, the uppermost surface 4a of the folded flexible terminal 4 has a convex central portion.

また、可撓性端子４の下端は、接合材１１を用いて半導体素子３の上側の電極面３ａに面接合されている。一方、可撓性端子４の上端は、上記の凸状に形成された中央部分で、後述する充填材６と弾性的に接触している。即ち、可撓性端子４は、上下方向（図２中のｚ方向）に力を受けると上下方向に撓むようになっている。   Further, the lower end of the flexible terminal 4 is surface bonded to the upper electrode surface 3 a of the semiconductor element 3 using the bonding material 11. On the other hand, the upper end of the flexible terminal 4 is elastically in contact with the filler 6 described later at the central portion formed in the above-described convex shape. That is, the flexible terminal 4 bends in the vertical direction when a force is applied in the vertical direction (z direction in FIG. 2).

接合材１１及び前述のダイボンド材２は、導電性及び熱伝導性に優れた材料、例えば、Ｓｎ−Ｐｂ系はんだ、Ｓｎ−Ｃｕ系はんだ、Ｓｎ−Ｂｉ系はんだ、Ｓｎ−Ｉｎ系はんだ、Ｓｎ−Ｓｂ系はんだ、銀ペースト、焼結銀、ＣｕＳｎペースト、又はこれらの組合せ、などで構成することができる。   The bonding material 11 and the above-described die bond material 2 are materials having excellent conductivity and thermal conductivity, for example, Sn—Pb solder, Sn—Cu solder, Sn—Bi solder, Sn—In solder, Sn— It can be composed of Sb solder, silver paste, sintered silver, CuSn paste, or a combination thereof.

また、可撓性端子４として、導電性及び熱伝導性に優れた材料、例えば銅、アルミニウム、ベリリウム銅などからなる、可撓性を有するコイルスプリング、板ばねなどの部材を用いることができる。さらに、可撓性端子４は、その損傷を防止するために、所定の被覆部材（図示せず）で被覆してもよい。   Further, as the flexible terminal 4, a material having excellent conductivity and thermal conductivity, such as a flexible coil spring or leaf spring made of copper, aluminum, beryllium copper, or the like can be used. Further, the flexible terminal 4 may be covered with a predetermined covering member (not shown) in order to prevent the damage.

なお、本実施形態では、可撓性端子４の上端を充填材６と接触させることを考慮して、可撓性端子４の上側の面を凸状に形成したが、これに限定されることはない。即ち、可撓性端子４の上端を接触させる部材に応じて、上下方向に撓みやすいよう、折り返された可撓性端子４の最も上側の面４ａを、例えば平面状に形成してもよい。   In the present embodiment, the upper surface of the flexible terminal 4 is formed in a convex shape in consideration of bringing the upper end of the flexible terminal 4 into contact with the filler 6. However, the present invention is limited to this. There is no. That is, the uppermost surface 4a of the folded flexible terminal 4 may be formed, for example, in a flat shape so that it can be easily bent in the vertical direction according to the member that contacts the upper end of the flexible terminal 4.

充填材６は、導電性及び熱伝導性に優れた材料、例えば、銅、Ｓｎ−Ｐｂ系はんだ、Ｓｎ−Ｃｕ系はんだ、Ｓｎ−Ｂｉ系はんだ、Ｓｎ−Ｉｎ系はんだ、Ｓｎ−Ｓｂ系はんだ、銀ペースト、焼結銀、ＣｕＳｎペースト、又はこれらの組合せ、などで構成することができる。   The filler 6 is made of a material having excellent conductivity and thermal conductivity, such as copper, Sn—Pb solder, Sn—Cu solder, Sn—Bi solder, Sn—In solder, Sn—Sb solder, It can be composed of silver paste, sintered silver, CuSn paste, or a combination thereof.

プリント基板７は、導電性及び熱伝導性に優れた層（導体パターン）７ａと、熱伝導性に優れた電気絶縁層（絶縁基板）７ｂとの積層構造を有し、例えば、片面板、両面板、多層板などを用いることができる。即ち、導体パターン７ａは、絶縁基板７ｂの上面又は下面の少なくとも一方に形成されており、さらに絶縁基板７ｂの内部に形成されてもよい。導体パターン７ａは、例えば銅箔パターンである。また、プリント基板７には、スルーホールめっきが施された１つ以上のスルーホール５が形成されており、本実施形態では、そのスルーホール５が充填材６により充填されている。   The printed circuit board 7 has a laminated structure of a layer (conductor pattern) 7a having excellent conductivity and thermal conductivity and an electrical insulating layer (insulating substrate) 7b having excellent thermal conductivity. A board, a multilayer board, etc. can be used. That is, the conductor pattern 7a is formed on at least one of the upper surface and the lower surface of the insulating substrate 7b, and may be further formed inside the insulating substrate 7b. The conductor pattern 7a is, for example, a copper foil pattern. Further, the printed circuit board 7 is formed with one or more through holes 5 subjected to through hole plating. In the present embodiment, the through holes 5 are filled with the filler 6.

また、充填材６は、スルーホールめっきを介して導体パターン７ａに電気的に接続されている。このように、充填材６と導体パターン７ａとが、プリント基板７の「導体部」を構成している。   Further, the filler 6 is electrically connected to the conductor pattern 7a through through-hole plating. As described above, the filler 6 and the conductor pattern 7 a constitute the “conductor portion” of the printed circuit board 7.

なお、図１では、プリント基板７が両面板である場合を示しており、導体パターン７ａについては、スルーホール周囲の所謂ランド部分についてのみ示している。また、そのランド部分とスルーホールめっきが施された部分とは、区別なく示している。これは、他の図についても同様である。   FIG. 1 shows a case where the printed circuit board 7 is a double-sided board, and the conductor pattern 7a is shown only for a so-called land portion around the through hole. Further, the land portion and the portion subjected to through-hole plating are shown without distinction. The same applies to other figures.

また、電力用半導体装置１００は、プリント基板７の導体パターン７ａの間を電気的に接続する配線材８を備える。配線材８は、導体パターン７ａの間を橋絡、即ち橋のように（曲面状に）架け渡している。   In addition, the power semiconductor device 100 includes a wiring member 8 that electrically connects the conductor patterns 7 a of the printed circuit board 7. The wiring member 8 bridges between the conductor patterns 7a, that is, bridges, that is, bridges (curved surface).

さらに、電力用半導体装置１００には、主端子９及び信号端子１２が設けられた外装用のケース１０が取り付けられている。ケース１０は、下側で回路基板１が嵌るように形成されており、電力用半導体装置１００は、下面に回路基板１が露出するようになっている。   In addition, an exterior case 10 provided with a main terminal 9 and a signal terminal 12 is attached to the power semiconductor device 100. The case 10 is formed so that the circuit board 1 is fitted on the lower side, and the circuit board 1 is exposed on the lower surface of the power semiconductor device 100.

主端子９は、ケース１０の外面に沿って設けられており、外部回路に接続されて主回路を構成するようになっている。また、信号端子１２は、ケース１０の内部に固定されており、例えば半導体素子３のスイッチングのための制御信号を与える外部回路に接続されて半導体素子３に制御信号を送信するようになっている。   The main terminal 9 is provided along the outer surface of the case 10 and is connected to an external circuit to constitute the main circuit. The signal terminal 12 is fixed inside the case 10 and is connected to an external circuit that provides a control signal for switching the semiconductor element 3, for example, so as to transmit the control signal to the semiconductor element 3. .

プリント基板７と主端子９とは、はんだ、導電性接着剤などを用いて電気的に接続されている。信号端子１２は、ワイヤ１３が半導体素子３の電極面３ａに例えば超音波接合されることにより、電極面３ａに電気的に接続されている。ワイヤ１３は、導体パターン７ａの間を橋絡している。半導体素子３が例えばＩＧＢＴである場合、信号端子１２は、ＩＧＢＴの上面に形成された、制御電極であるゲート電極に接合される。   The printed circuit board 7 and the main terminal 9 are electrically connected using solder, a conductive adhesive, or the like. The signal terminal 12 is electrically connected to the electrode surface 3 a by, for example, ultrasonic bonding the wire 13 to the electrode surface 3 a of the semiconductor element 3. The wire 13 bridges between the conductor patterns 7a. When the semiconductor element 3 is, for example, an IGBT, the signal terminal 12 is bonded to a gate electrode that is a control electrode formed on the upper surface of the IGBT.

また、図１に示すように、電力用半導体装置１００は、回路基板１から少なくともワイヤ１３を覆う高さまで、封止材１４で封止されている。また、可撓性端子４は、プリント基板側で封止材１４に封止されておらず、上下方向に撓むことができるようになっている。   As shown in FIG. 1, the power semiconductor device 100 is sealed with a sealing material 14 from the circuit board 1 to at least a height that covers the wires 13. Further, the flexible terminal 4 is not sealed by the sealing material 14 on the printed board side, and can be bent in the vertical direction.

また、ワイヤ１３及び前述の配線材８として、導電性及び熱伝導性に優れた、例えば、アルミワイヤ、銅ワイヤのような金属ワイヤ、アルミリボン、銅リボンのような金属リボンなどを用いることができる。また、封止材１４として、空気より電気抵抗率又は誘電率の少なくとも一方が高い材料、例えば、シリコーン樹脂、エポキシ樹脂などを用いることができる。   Further, as the wire 13 and the wiring member 8 described above, for example, a metal wire such as an aluminum wire or a copper wire, a metal ribbon such as an aluminum ribbon or a copper ribbon, or the like having excellent conductivity and thermal conductivity may be used. it can. Further, as the sealing material 14, a material having a higher electrical resistivity or dielectric constant than air, for example, a silicone resin, an epoxy resin, or the like can be used.

なお、本実施形態では、可撓性端子４とスルーホール５の充填材６とが接触するが、後述する実施形態と同様に、可撓性端子４がプリント基板７の導体パターン７ａと接触するようにしてもよい。   In this embodiment, the flexible terminal 4 and the filler 6 of the through hole 5 are in contact with each other. However, the flexible terminal 4 is in contact with the conductor pattern 7a of the printed circuit board 7 as in the embodiment described later. You may do it.

次に、本実施形態に係る電力用半導体装置によって得られる効果について説明する。
電力用半導体装置１００では、可撓性端子４と充填材６とが弾性的に接触しているため、半導体素子３に加わる熱応力は可撓性端子４により吸収され、低減する。さらに、可撓性端子４がはんだなどによって接合されていないため、熱応力がはんだ接合部に集中することによるはんだクラックの進展という問題が生じない。その結果、可撓性端子４と充填材６（又は、プリント基板７の導体部）との接続部が長寿命化し、信頼性に優れた電力用半導体装置１００が実現されるという効果がある。 Next, effects obtained by the power semiconductor device according to the present embodiment will be described.
In the power semiconductor device 100, since the flexible terminal 4 and the filler 6 are in elastic contact, the thermal stress applied to the semiconductor element 3 is absorbed by the flexible terminal 4 and reduced. Furthermore, since the flexible terminal 4 is not joined by solder or the like, the problem of the development of solder cracks due to the thermal stress concentrated on the solder joint does not occur. As a result, the connection part between the flexible terminal 4 and the filler 6 (or the conductor part of the printed circuit board 7) has a long life, and there is an effect that the power semiconductor device 100 having excellent reliability is realized.

さらに、可撓性端子４は、スルーホール５内の充填材６と接触している。また、充填材６は、プリント基板７の導体パターン７ａに電気的に接続されている。これにより、半導体素子３から、プリント基板７の各導体層、即ち絶縁基板７ｂの上面、下面、内部に形成された導体パターン７ａへ一括して電流と熱を伝導することができるという効果がある。   Further, the flexible terminal 4 is in contact with the filler 6 in the through hole 5. The filler 6 is electrically connected to the conductor pattern 7a of the printed board 7. Thereby, there is an effect that current and heat can be conducted collectively from the semiconductor element 3 to each conductor layer of the printed circuit board 7, that is, the conductor pattern 7a formed on the upper surface, the lower surface, and the inside of the insulating substrate 7b. .

この効果は、可撓性端子４を導体パターン７ａに接触させることによっても得られるところ、可撓性端子４を充填材６に接触させたことにより、より少ないスルーホールを用いて同じ大きさの電流と熱を伝導することができ、したがって他の電子部品などを搭載する面積を低下させることがないという利点がある。   This effect can also be obtained by bringing the flexible terminal 4 into contact with the conductor pattern 7a. However, by bringing the flexible terminal 4 into contact with the filler 6, the same size can be obtained using fewer through holes. Current and heat can be conducted, so that there is an advantage that the area for mounting other electronic components and the like is not reduced.

また、プリント基板７を設けることにより、回路基板１が有する回路機能の一部を安価なプリント基板７に担保させることができる。その結果、回路基板１として、高価な金属貼りセラミック基板、金属ベース基板などを用いる場合でも、その面積を縮小することができる。それゆえ、低コスト化され、更には小型かつ軽量の電力用半導体装置１００が実現されるという効果がある。   Further, by providing the printed circuit board 7, a part of the circuit functions of the circuit board 1 can be secured by the inexpensive printed circuit board 7. As a result, even when an expensive metal-clad ceramic substrate, metal base substrate, or the like is used as the circuit board 1, the area can be reduced. Therefore, there is an effect that the cost is reduced, and further, a small and light power semiconductor device 100 is realized.

また、多層化されたプリント基板を用いて高密度配線することにより、高機能な電力用半導体装置１００が実現されるこという効果がある。   In addition, there is an effect that a high-performance power semiconductor device 100 is realized by high-density wiring using a multilayered printed circuit board.

図３（ａ）は従来のワイヤによる半導体素子の電気的接続を、図３（ｂ）は可撓性端子による電気的接続をそれぞれ示している。
本実施形態では、可撓性端子４が、下端で半導体素子３の電極面３ａと、図３（ａ）のような点接合或は線接合（即ち、微小な面積での接合）でなく、充分に広い面積で面接合している。これにより、半導体素子３の電極面３ａ全体に略均一に電流が流れるため、半導体素子３が動作する際の電極面内での温度を均一化することができる。その結果、電極面内で温度にバラつきが生じず、半導体素子３での局所的な応力の発生が防止され、電力用半導体装置１００の信頼性をさらに向上させることができるという効果がある。 FIG. 3A shows electrical connection of a semiconductor element using a conventional wire, and FIG. 3B shows electrical connection using a flexible terminal.
In the present embodiment, the flexible terminal 4 is not the electrode surface 3a of the semiconductor element 3 at the lower end and the point bonding or line bonding (that is, bonding in a small area) as shown in FIG. Surface-bonded with a sufficiently large area. As a result, current flows substantially uniformly over the entire electrode surface 3a of the semiconductor element 3, so that the temperature within the electrode surface when the semiconductor element 3 operates can be made uniform. As a result, there is an effect that the temperature does not vary within the electrode surface, the generation of local stress in the semiconductor element 3 is prevented, and the reliability of the power semiconductor device 100 can be further improved.

また、半導体装置３への通電、スイッチング動作などにより発生した熱は、可撓性端子４を通じて上方のプリント基板７へ伝熱され、プリント基板７、主端子９から外部へ放熱されることになる。このように放熱性が向上する結果、動作温度が低減し、電力用半導体装置１００の信頼性をさらに向上させることができる。   In addition, heat generated by energizing the semiconductor device 3, switching operation, etc. is transferred to the upper printed circuit board 7 through the flexible terminal 4, and is radiated to the outside from the printed circuit board 7 and the main terminal 9. . As a result of the improved heat dissipation, the operating temperature can be reduced and the reliability of the power semiconductor device 100 can be further improved.

また、プリント基板７は、導体パターン７ａに加えて配線材８によっても配線されている。配線材８に金属ワイヤ、金属リボンを用い、導体パターン７ａの間を橋絡させることで、電流経路の断面積をプリント基板７の導体パターン７ａよりも大きくとることができる。それゆえ、配線材８を用いることで、プリント基板の導体パターン７ａの厚さを大きくするよりも安価に大きな電流と熱を流すことができるという効果がある。   Further, the printed circuit board 7 is wired by the wiring material 8 in addition to the conductor pattern 7a. By using a metal wire or a metal ribbon for the wiring member 8 and bridging between the conductor patterns 7a, the cross-sectional area of the current path can be made larger than the conductor pattern 7a of the printed circuit board 7. Therefore, the use of the wiring member 8 has the effect of allowing a large current and heat to flow at a lower cost than increasing the thickness of the conductor pattern 7a of the printed board.

以上で説明した電力用半導体装置１００は、例えば、１）回路基板１の導電層１ａに、ダイボンド材２を用いて半導体素子３を接合し、２）半導体素子３の電極面３ａに、接合材１１を用いて可撓性端子４を接合し、３）半導体素子３の電極面３ａと、ケース１０に設けられた信号端子１２に、ワイヤ１３を超音波接合し、４）さらに主端子９も設けられているケース１０を回路基板１に嵌めて取り付け、５）スルーホール５に充填材６が充填されたプリント基板７を、充填材６と可撓性端子４の面４ａの凸状に形成された中央部分が接触するように配置し、６）プリント基板７の導体パターン７ａと主端子９とをはんだなどを用いて接合し、７）導体パターン７ａを配線材８を用いて配線し、８）プリント基板７に穴を設け、ディスペンサなどを用いて封止材１４を電力用半導体装置１００の内部に注入することにより、製造することができる。   In the power semiconductor device 100 described above, for example, 1) the semiconductor element 3 is bonded to the conductive layer 1a of the circuit board 1 using the die bonding material 2, and 2) the bonding material is bonded to the electrode surface 3a of the semiconductor element 3. 11, the flexible terminal 4 is joined, 3) the wire 13 is ultrasonically joined to the electrode surface 3 a of the semiconductor element 3 and the signal terminal 12 provided in the case 10, and 4) the main terminal 9 is also joined 5) A printed circuit board 7 in which a through hole 5 is filled with a filler 6 is formed in a convex shape on the surface 4a of the flexible terminal 4 6) The conductor pattern 7a of the printed circuit board 7 and the main terminal 9 are joined using solder or the like, and 7) the conductor pattern 7a is wired using the wiring material 8, 8) A hole is provided in the printed circuit board 7 to dispense a dispenser. Etc. by injecting sealant 14 into the interior of the power semiconductor device 100 using, it can be produced.

なお、上記の８）では、好ましくはワイヤ１３を超える高さまで封止材１４を注入する。これにより、可撓性端子４は、下側で封止材１４により固定され、撓み方向（ｚ方向）以外の動きが充分に抑制される。また、可撓性端子４のプリント基板側の一部が封止されない高さまで、封止材１４を注入する。このとき、可撓性端子４が撓んで半導体基板３に加わる熱応力を吸収できるように、可撓性端子４のプリント基板側の一部が封止されないようにする。   In the above 8), the sealing material 14 is preferably injected to a height exceeding the wire 13. Thereby, the flexible terminal 4 is fixed by the sealing material 14 on the lower side, and movements other than the bending direction (z direction) are sufficiently suppressed. Further, the sealing material 14 is injected to a height at which a part of the flexible terminal 4 on the printed board side is not sealed. At this time, a part of the flexible terminal 4 on the printed board side is not sealed so that the thermal stress applied to the semiconductor substrate 3 by bending can be absorbed.

実施の形態２．
次に、本発明の実施の形態２について、図４などを用いて説明する。
実施形態１では、スルーホール５を充填材６で充填し、可撓性端子４は、充填材６に接触させた。一方、本実施形態では、スルーホール５に、中空部２６ａを有する筒状導体２６が挿入されている。また、可撓性端子４は、プリント基板７の導体パターン７ａと弾性的に接触している。このとき、好ましくは、可撓性端子４は、スルーホール５の周囲の導体パターン７ａ、例えばランド部分と弾性的に接触している。その他の点は実施形態１と同様であり、各構成について説明は省略する。 Embodiment 2. FIG.
Next, Embodiment 2 of the present invention will be described with reference to FIG.
In the first embodiment, the through hole 5 is filled with the filler 6, and the flexible terminal 4 is brought into contact with the filler 6. On the other hand, in the present embodiment, the cylindrical conductor 26 having the hollow portion 26 a is inserted into the through hole 5. Further, the flexible terminal 4 is in elastic contact with the conductor pattern 7 a of the printed circuit board 7. At this time, the flexible terminal 4 is preferably in elastic contact with the conductor pattern 7a around the through hole 5, for example, the land portion. The other points are the same as those of the first embodiment, and the description of each configuration is omitted.

筒状導体２６は、導電性及び熱伝導性に優れた材料、例えば銅で構成することができる。また、筒状導体２６の中空部２６ａは、封止材１４の注入時にディスペンサを挿入できる程度の幅を有することが好ましい。   The cylindrical conductor 26 can be made of a material excellent in conductivity and thermal conductivity, for example, copper. Moreover, it is preferable that the hollow part 26a of the cylindrical conductor 26 has a width that allows a dispenser to be inserted when the sealing material 14 is injected.

このように、スルーホール５に挿入する筒状導体２６を中空の形状とすることで、プリント基板７をケース１０に搭載した状態で封止材１４を注入することができる。このとき、プリント基板７に封止材１４の注入用の穴を設けて実装面積を減らす必要がないため、電力用半導体装置をさらに高機能化できるという効果がある。   Thus, by making the cylindrical conductor 26 inserted into the through hole 5 into a hollow shape, the sealing material 14 can be injected with the printed circuit board 7 mounted on the case 10. At this time, since there is no need to reduce the mounting area by providing a hole for injecting the sealing material 14 in the printed board 7, there is an effect that the power semiconductor device can be further enhanced in function.

また、本実施形態では、可撓性端子４は、上端でプリント基板７の導体パターン７ａと接触するため、図４に示すように、折り返された可撓性端子４の最も上側の面４ａを略平坦に形成することができる。このとき、可撓性端子４と導体パターン７ａとは面接触することになるため、可撓性端子４の位置精度、及び、可撓性端子４と導体パターン７ａとの接触部分のパターン精度を緩くすることができるという効果がある。   Moreover, in this embodiment, since the flexible terminal 4 contacts the conductor pattern 7a of the printed circuit board 7 at the upper end, the uppermost surface 4a of the folded flexible terminal 4 is formed as shown in FIG. It can be formed substantially flat. At this time, since the flexible terminal 4 and the conductor pattern 7a are in surface contact, the positional accuracy of the flexible terminal 4 and the pattern accuracy of the contact portion between the flexible terminal 4 and the conductor pattern 7a are improved. There is an effect that it can be loosened.

さらに、可撓性端子４は、プリント基板７の導体パターン７ａであってスルーホール５の周囲の部分と接触している。これにより、半導体素子３から、プリント基板７の各導体層、即ち絶縁基板７ｂの上面、下面、内部に形成された導体パターン７ａへ一括して電流と熱を伝導することができるという効果がある。   Further, the flexible terminal 4 is a conductor pattern 7 a of the printed circuit board 7 and is in contact with a portion around the through hole 5. Thereby, there is an effect that current and heat can be conducted collectively from the semiconductor element 3 to each conductor layer of the printed circuit board 7, that is, the conductor pattern 7a formed on the upper surface, the lower surface, and the inside of the insulating substrate 7b. .

実施の形態３．
次に、本発明の実施の形態３について、図５などを用いて説明する。
実施形態２では、スルーホール５に筒状導体２６を挿入した。一方、本実施形態では、プリント基板７の上方にスルーホール挿入部品３６が設けられ、そのスルーホール挿入部品３６の脚部（又はリード）３６ａがスルーホール５に挿入されている点で、実施形態２と異なる。その他の点は実施形態２と同様であり、各構成について説明は省略する。 Embodiment 3 FIG.
Next, Embodiment 3 of the present invention will be described with reference to FIG.
In the second embodiment, the cylindrical conductor 26 is inserted into the through hole 5. On the other hand, in the present embodiment, the through hole insertion component 36 is provided above the printed circuit board 7, and the leg (or lead) 36 a of the through hole insertion component 36 is inserted into the through hole 5. Different from 2. Other points are the same as those of the second embodiment, and the description of each component is omitted.

スルーホール挿入部品３６として、導電性及び熱伝導性に優れた、例えば抵抗体、コンデンサなどの電子部品、又は、バスバー、放熱フィンなどの放熱部品を用いることができる。スルーホール挿入部品３６の脚部３６ａは、スルーホール接合材３０を用いてプリント基板７の導体パターン７ａに接合されている。このようにして、スルーホール挿入部品３６は支持されている。   As the through-hole insertion component 36, for example, an electronic component such as a resistor or a capacitor excellent in conductivity and thermal conductivity, or a heat radiating component such as a bus bar or a heat radiating fin can be used. The leg portion 36 a of the through-hole insertion component 36 is bonded to the conductor pattern 7 a of the printed circuit board 7 using the through-hole bonding material 30. In this way, the through hole insertion component 36 is supported.

スルーホール接合材３０は、導電性及び熱伝導性に優れた材料、例えば、Ｓｎ−Ｐｂ系はんだ、Ｓｎ−Ｃｕ系はんだ、Ｓｎ−Ｂｉ系はんだ、Ｓｎ−Ｉｎ系はんだ、Ｓｎ−Ｓｂ系はんだ、銀ペースト、焼結銀、ＣｕＳｎペースト、又はこれらの組合せ、などで構成することができる。   The through-hole bonding material 30 is made of a material having excellent conductivity and thermal conductivity, such as Sn-Pb solder, Sn-Cu solder, Sn-Bi solder, Sn-In solder, Sn-Sb solder, It can be composed of silver paste, sintered silver, CuSn paste, or a combination thereof.

本実施形態に係る電力用半導体装置３００によれば、スルーホール５の導体パターン７ａと接触している可撓性端子４を通じて、スルーホール５に脚部３６ａが挿入されたスルーホール挿入部品３６に、半導体素子３から効率よく電流と熱が伝わる。このように放熱性が向上する結果、動作温度が低減し、電力用半導体装置３００の信頼性をさらに向上させることができるという効果がある。   According to the power semiconductor device 300 according to the present embodiment, the through hole insertion component 36 in which the leg portion 36 a is inserted into the through hole 5 through the flexible terminal 4 in contact with the conductor pattern 7 a of the through hole 5. The current and heat are efficiently transmitted from the semiconductor element 3. As a result of the improved heat dissipation, the operating temperature is reduced and the reliability of the power semiconductor device 300 can be further improved.

１ 回路基板、 ２ ダイボンド材、 ３ 半導体素子、 ４ 可撓性端子、
５ スルーホール、 ６ 充填材、 ７ プリント基板、 ７ａ 導体パターン、
７ｂ 絶縁基板、 ８ 配線材、 ９ 主端子、 １０ ケース、 １１ 接合材、
１２ 信号端子、 １３ ワイヤ、 １４ 封止材、２６ 筒状導体、
３０ スルーホール接合材、 ３６ スルーホール挿入部品、
１００，２００，３００ 電力用半導体装置。 1 circuit board, 2 die-bonding material, 3 semiconductor element, 4 flexible terminal,
5 through hole, 6 filler, 7 printed circuit board, 7a conductor pattern,
7b Insulating substrate, 8 Wiring material, 9 Main terminal, 10 Case, 11 Bonding material,
12 signal terminals, 13 wires, 14 sealing materials, 26 cylindrical conductors,
30 through-hole bonding materials, 36 through-hole insert parts,
100, 200, 300 Power semiconductor device.

Claims (8)

電流を制御する半導体素子と、
半導体素子が搭載された回路基板と、
回路基板に対向配置され、導体部を有するプリント基板と、
半導体素子とプリント基板の導体部とを電気的に接続する可撓性端子とを備え、
可撓性端子の一端は半導体素子に接合され、可撓性端子の他端はプリント基板の導体部と弾性的に接触することを特徴とする電力用半導体装置。 A semiconductor element for controlling the current;
A circuit board on which a semiconductor element is mounted;
A printed circuit board disposed opposite to the circuit board and having a conductor portion;
A flexible terminal for electrically connecting the semiconductor element and the conductor portion of the printed circuit board;
One end of a flexible terminal is joined to a semiconductor element, and the other end of the flexible terminal is in elastic contact with a conductor portion of a printed circuit board. プリント基板には、１つ以上のスルーホールが形成され、
導体部は、スルーホールに充填された導電性の充填材を含み、
可撓性端子は、該充填材と弾性的に接触することを特徴とする、請求項１に記載の電力用半導体装置。 One or more through holes are formed in the printed circuit board,
The conductor portion includes a conductive filler filled in the through hole,
The power semiconductor device according to claim 1, wherein the flexible terminal is in elastic contact with the filler. プリント基板には、１つ以上のスルーホールが形成され、
導体部は、プリント基板に形成された導体パターンを含み、
可撓性端子は、スルーホール周囲の導体パターンと弾性的に接触することを特徴とする、請求項１に記載の電力用半導体装置。 One or more through holes are formed in the printed circuit board,
The conductor portion includes a conductor pattern formed on the printed circuit board,
The power semiconductor device according to claim 1, wherein the flexible terminal is in elastic contact with a conductor pattern around the through hole. スルーホールに挿入されると共にプリント基板の導体パターンに接合されたスルーホール挿入部品をさらに備えたことを特徴とする、請求項３に記載の電力用半導体装置。   4. The power semiconductor device according to claim 3, further comprising a through-hole insertion component that is inserted into the through-hole and joined to the conductor pattern of the printed circuit board. スルーホールに挿入された中空の筒状導体をさらに備えたことを特徴とする、請求項３に記載の電力用半導体装置。   The power semiconductor device according to claim 3, further comprising a hollow cylindrical conductor inserted into the through hole. プリント基板の導体部間を橋絡すると共に電気的に接続する配線材をさらに備えたことを特徴とする、請求項１〜５のいずれか１項に記載の電力用半導体装置。   The power semiconductor device according to claim 1, further comprising a wiring member that bridges and electrically connects conductor portions of the printed circuit board. プリント基板に電気的に接続された主端子と、
導電性ワイヤを用いて半導体素子に電気的に接続され、該半導体素子の制御信号を送信する信号端子と、
該主端子及び信号端子が設けられた外装ケースとをさらに備え、
プリント基板側で可撓性端子の少なくとも一部が覆われないように、電力用半導体装置の一部が封止材で封止されたことを特徴とする、請求項１〜６のいずれか１項に記載の電力用半導体装置。 A main terminal electrically connected to the printed circuit board;
A signal terminal electrically connected to the semiconductor element using a conductive wire and transmitting a control signal of the semiconductor element;
An outer case provided with the main terminal and the signal terminal,
The power semiconductor device is partially sealed with a sealing material so that at least a part of the flexible terminal is not covered on the printed circuit board side. The power semiconductor device according to Item. 可撓性端子は、半導体素子の電極面に面接合されたことを特徴とする、請求項１〜７のいずれか１項に記載の電力用半導体装置。   The power semiconductor device according to claim 1, wherein the flexible terminal is surface-bonded to an electrode surface of the semiconductor element.
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