JP2007184424A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a means for reducing the working man-hours in assembly, while securing the radiation of respective semiconductor elements, in a semiconductor device provided with a plurality of semiconductor elements on a mounting substrate. <P>SOLUTION: The semiconductor device 100 comprises a printed circuit board 104, a first semiconductor element 103a, as well as, a second semiconductor element 103b which are mounted on the printed circuit board 104, and a heat sink 101 provided so as to be extended from the upper part of the first semiconductor element 103a to the upper part of the second semiconductor element 103b. The heat sink 101 is a first radiating region 123a corresponding to the first semiconductor element 103a, a second radiative region 123b corresponding to the second semiconductor element 103b, and a region, pinched in between the first radiating region 123a and the second radiating region 123b, while comprising a connecting region 125 for suppressing conductive heat transfer between the first radiating region 123a and the second radiating region 123b. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which a plurality of semiconductor elements are mounted on a mounting substrate, and more particularly to a semiconductor device including a heat sink.

  As semiconductor elements become smaller and more densely mounted, a plurality of semiconductor elements that generate heat may be mounted in a narrow range of a printed circuit board. In order to efficiently dissipate heat from the plurality of semiconductor elements, a heat sink may be used. Conventionally, there are semiconductor devices including heat sinks described in Patent Document 1 and Patent Document 2.

  Patent Document 1 describes handling a plurality of heat sinks as an aggregate in a heat sink manufacturing method. According to Patent Document 1, it is said that the work in the heat treatment surface treatment can be simplified by handling it as a heat sink assembly.

Patent Document 2 describes an electrical component device in which a plurality of semiconductor elements are mounted on a printed circuit board. This document shows an apparatus in which a plurality of semiconductor elements are interposed and fixed between one printed circuit board and one heat sink.
JP 2000-252394 A JP 2003-264388 A

However, the devices described in the above documents have room for improvement in the following points.
First, in Patent Document 1, after the heat sink assembly is formed, the heat sink is separated into pieces by punching using a punching device. One obtained heat sink was used for one semiconductor element.

  Here, semiconductor elements are increasingly miniaturized and mounted with high density, and a plurality of semiconductor elements that generate heat may be mounted in a narrow range of a single printed board. In such a case, when applying the heat sink described in Patent Document 1, it is necessary to separately attach a plurality of heat sinks to each of the plurality of semiconductor elements. For this reason, the man-hour for attaching the heat sink is required as many as the number of semiconductor elements, and the man-hour for the work has been increased.

  In this regard, in the apparatus described in Patent Document 2, since one heat sink is used for a plurality of semiconductor elements, it is considered that the number of work steps can be reduced.

  However, in the case of the device described in the same document, since the heat sink made of a material having high thermal conductivity is attached to a plurality of elements, the heat generation through the heat sink causes the heat generated from the element that generates a large amount of heat. There was concern that an extra heat load would be applied to other elements.

According to the present invention,
A mounting board;
First and second semiconductor elements mounted on the mounting substrate;
A heat sink provided from the top of the first semiconductor element to the top of the second semiconductor element;
Including
The heat sink is
A first region corresponding to the first semiconductor element;
A second region corresponding to the second semiconductor element;
A semiconductor device comprising: a third region that is sandwiched between the first region and the second region and suppresses heat conduction between the first region and the second region. Is provided.

  In the present invention, the first and second regions corresponding to the first and second semiconductor elements are provided in one heat sink. The first and second regions function as heat dissipation regions that release heat from the first and second semiconductor elements, respectively. And the 1st and 2nd area | region is connected by the 3rd area | region, and is integrated. For this reason, compared with the case where a several separate heat sink is prepared and attached about each of several semiconductor elements, it becomes the structure which can simplify an assembly structure and can reduce work man-hours. Therefore, the semiconductor element of the present invention has a configuration that can reduce the manufacturing cost.

  Moreover, in this invention, it is the area | region pinched | interposed between the 1st and 2nd area | regions of a heat sink, Comprising: The 3rd area | region which functions as an area | region which suppresses heat conduction between these area | regions is included. For this reason, the heat conduction between the first semiconductor element and the second semiconductor element can be effectively suppressed. Therefore, even when the heat generation characteristics of the first and second semiconductor elements are different, heat conduction from the semiconductor element having a large heat generation amount to the semiconductor element having a small heat generation amount can be suppressed through the heat sink. . Therefore, it is possible to suppress the thermal load from being applied to the first or second semiconductor element.

  In the present invention, the third region only needs to be configured so as to be able to suppress a thermal load from being applied to the first and second semiconductor elements to a practically satisfactory level. With such a configuration, heat conduction to the extent that there is no practical problem may occur between the first and second regions, and the heat conduction between the first and second regions may be substantially reduced. You may be comprised so that it may interrupt | block.

  It should be noted that any combination of these components, or a conversion of the expression of the present invention between a method, an apparatus, and the like is also effective as an aspect of the present invention.

  As described above, according to the present invention, in a semiconductor device in which a plurality of semiconductor elements are provided on a mounting substrate, a technique for reducing work man-hours during assembly while ensuring heat dissipation of each semiconductor element is realized. .

  Embodiments of the present invention will be described below with reference to the drawings. In all the drawings, common constituent elements are denoted by the same reference numerals, and description thereof is omitted as appropriate. In the following embodiments, a configuration in which three semiconductor devices are mounted on one mounting substrate will be described as an example. However, there may be a plurality of semiconductor devices mounted on one mounting substrate, and the number is particularly limited. There is no.

(First embodiment)
FIG. 1 is a plan view showing the configuration of the semiconductor device according to the present embodiment. FIG. 2 is a cross-sectional view taken along the line AA ′ of FIG.
The semiconductor device 100 shown in FIGS. 1 and 2 includes a plurality of semiconductor elements arranged on a single printed circuit board 104 and a plurality of portions corresponding to the plurality of semiconductor elements. A heat sink 101 connected by a large connecting portion is mounted.

  The semiconductor device 100 includes a mounting board (printed circuit board 104), first and second semiconductor elements (first semiconductor element 103a and second semiconductor element 103b) mounted on the printed circuit board 104, and a first semiconductor element. The heat sink 101 is provided from the upper part of 103a to the upper part of the second semiconductor element 103b.

  The semiconductor device 100 includes a third semiconductor element 103c in addition to the first semiconductor element 103a and the second semiconductor element 103b. The first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c are arranged in a line on the printed circuit board 104 in this order.

  The first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c are all disposed between the heat sink 101 and the printed board 104. The first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c are bonded to the heat sink 101 via an adhesive 102a, an adhesive 102b, and an adhesive 102c, respectively.

  The printed circuit board 104 is provided with a predetermined wiring structure. The first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c are connected to the printed circuit board 104 via bumps 119, respectively.

  FIG. 3 is a plan view showing the configuration of the heat sink 101 used in the semiconductor device 100 shown in FIGS. 1 and 2. FIG. 3 shows a state of the flat plate before the heat sink 101 is bent.

  The heat sink 101 is constituted by a single plate-like member, and is constituted continuously and integrally by a single plate-like base material. In addition, in this specification, continuous integration means that it is shape | molded integrally as a continuous body. Moreover, it is preferable that it is a structure which consists of a single member and does not have a junction part. In this embodiment, the case where the planar shape of the heat sink 101 is a rectangle is illustrated.

  Specific examples of the material for the base material of the heat sink 101 include materials conventionally used as heat dissipation materials such as metals such as copper, iron, and aluminum. Further, the heat sink 101 may have a configuration in which a surface treatment for improving thermal conductivity or improving adhesiveness is performed on the surface of the base material. Examples of the surface treatment include a roughening treatment on the surface of the substrate.

  The heat sink 101 includes a first heat dissipation region 123a corresponding to the first semiconductor element 103a, a second heat dissipation region 123b corresponding to the second semiconductor element 103b, and a third heat dissipation region corresponding to the third semiconductor element 103c. 123c and two connection regions 125. Each of these heat dissipation regions is provided facing the semiconductor element and covers the upper part of the corresponding semiconductor element. In addition, these heat radiation regions are connected to corresponding semiconductor elements via an adhesive.

  One of the connection regions 125 is a region sandwiched between the first heat dissipation region 123a and the second heat dissipation region 123b, and is between the first heat dissipation region 123a and the second heat dissipation region 123b. Suppresses heat conduction between them. Another of the connection regions 125 is a region sandwiched between the second heat dissipation region 123b and the third heat dissipation region 123c, and is between the second heat dissipation region 123b and the third heat dissipation region 123c. Suppresses heat conduction.

  The thermal conductivity of the connection region 125 is equal to or less than the thermal conductivity of the first heat radiation region 123a, the second heat radiation region 123b, and the third heat radiation region 123c, and the connection region 125 as a whole is between adjacent heat radiation regions. Suppresses heat conduction. In addition, the connection area | region 125 should just be the structure which can be suppressed to such an extent that there is no practical problem, and does not need to interrupt | block completely the heat conduction between adjacent thermal radiation areas.

  The heat sink 101 is composed of a single plate-like member, and a through hole (a hollow hole 107) is provided in a predetermined region of the plate-like member. Specifically, the through hole is provided in the connection region 125. Further, two adjacent heat dissipation regions are connected by connecting portions 109 provided on both sides of the cut-out hole 107.

  The cutout hole 107 is formed by cutting out a predetermined region of the plate-like member forming the heat sink 101. The cut-out hole 107 has such a size as to block the heat conduction between the heat radiation regions so that a heat load applied to the semiconductor element can be suppressed to an extent that does not cause a problem in practice.

  In the semiconductor device 100 shown in FIGS. 1 and 2, the heights of the first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c from the printed circuit board 104 are different. For this reason, the heat sink 101 is bent at the boundary between the heat radiation area and the connection area 125, and a step is provided between the heat radiation areas. By inclining the connecting portion 109 with respect to the heat dissipation area, the heights of the first heat dissipation area 123a, the second heat dissipation area 123b, and the third heat dissipation area 123c correspond to the height of the semiconductor element. It is configured.

  The semiconductor device 100 is manufactured, for example, according to the following procedure. First, the first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c are bump-bonded onto the printed circuit board 104. Next, the heat sink 101 (FIG. 3) consisting of one block is prepared. Then, the heat sink 101 is attached from the first semiconductor element 103a to the third semiconductor element 103c by using the adhesive 102a, the adhesive 102b, and the adhesive 102c across the semiconductor elements.

  In the present embodiment, since one block of the heat sink 101 is attached to a plurality of semiconductor elements, it is possible to reduce the number of heat sink attachment steps. Further, the module configuration using the heat sink 101 can be simplified. The point which can reduce a heat sink attachment man-hour is further demonstrated with reference to FIG. 11 and FIG.

FIG. 11 is a plan view showing a configuration of a semiconductor device having a plurality of semiconductor elements, and FIG. 12 is a cross-sectional view taken along the line CC ′ of FIG.
11 and 12 includes a printed circuit board 204 and three semiconductor elements mounted on the printed circuit board 204 (a first semiconductor element 203a, a second semiconductor element 203b, and a third semiconductor element 203c). )including. The first semiconductor element 203a, the second semiconductor element 203b, and the third semiconductor element 203c are respectively connected to the first heat sink 201a and the second heat sink 201b via the adhesive 202a, the adhesive 202b, and the adhesive 202c. The third heat sink 201c is bonded.

  When assembling the semiconductor device 200 having the above-described configuration, it is necessary to attach a heat sink to each of the three semiconductor elements. For this reason, the number of heat sinks required is the same as the number of elements, and the number of work steps increases.

In order to solve the above-mentioned problem, the problem when a plurality of semiconductor elements mounted on one printed circuit board are simply attached to an integrated heat sink will be described below with reference to FIG. 13 and FIG. explain. FIG. 13 is a plan view showing a configuration of another semiconductor device having a plurality of semiconductor elements, and FIG. 14 is a cross-sectional view taken along the line DD ′ of FIG.
Similar to the semiconductor device 200, the semiconductor device 210 illustrated in FIGS. 13 and 14 includes a printed circuit board 204 and three semiconductor elements mounted on the printed circuit board 204 (a first semiconductor element 203a, a second semiconductor element 203b, and a first semiconductor element 203). Three semiconductor elements 203c). In the semiconductor device 210, one heat sink 201 is bonded to the first semiconductor element 203a, the second semiconductor element 203b, and the third semiconductor element 203c through the adhesive 202a, the adhesive 202b, and the adhesive 202c. Has been.

  In the semiconductor device 210, since one heat sink 201 is attached to a plurality of semiconductor elements mounted on one printed circuit board 204, the heat sink 201 can be attached only once. However, since the semiconductor device 210 uses one heat sink 201 common to the three semiconductor elements, the entire upper part between the semiconductor elements is connected by the heat sink 201.

  Since the heat sink 201 is usually composed of a material having high thermal conductivity, when the heat sink 201 is simply mounted across a plurality of semiconductor elements as in the semiconductor device 210, the heat sink 201 is interposed between the semiconductor elements. A heat conduction path is easily formed. For this reason, for example, when one heat sink 201 is provided in common for a plurality of semiconductor elements having different calorific values, there is a concern that an extra thermal load is applied from an element with a large calorific value to another element due to heat conduction. The More specifically, the amount of heat generated in the memory element may be about 1 to 2 W. In addition, the heat generation amount of ASIC (Application Specific Integrated Circuit) may be about 10W. When a common heat sink 201 is provided for these heating elements and other elements, there is a concern that a thermal load is applied to the other elements.

  On the other hand, in the present embodiment, a part of the plate-like member constituting the heat sink 101 is cut out to form a cutout hole 107 in a connection region arranged between a plurality of semiconductor elements. For this reason, the heat conduction between the semiconductor elements via the heat sink 101 is effectively suppressed. Therefore, even when the heat generation characteristics of two adjacent semiconductor elements are different, heat conduction from the semiconductor element having a small heat generation amount to the semiconductor element having a large heat generation amount can be suppressed. For this reason, it can suppress that the excess thermal load is added to a semiconductor element.

  As described above, in this embodiment, the heat sink 101 made of one block is used, and when the heat sink 101 is attached, the portion located between the semiconductor elements is cut out. As a result, the heat sink 101 can be attached only once, so that the number of steps for attaching the heat sink 101 can be reduced and the module configuration can be simplified. Therefore, the assembly structure of the semiconductor element, the heat sink 101, and the printed circuit board 104 can be simplified to reduce the number of work steps, so that the manufacturing cost can be reduced. At the same time, the heat conduction between the semiconductor elements via the heat sink 101 can be effectively suppressed to sufficiently ensure the heat dissipation of each semiconductor element, and the cooling efficiency can be improved.

  In the above description, the shape in which the cutout hole 107 is provided between the connection portions 109 provided at both ends in the connection region of the heat sink 101 is illustrated, but the planar shape of the heat sink 101 used in the semiconductor device 100 is illustrated. It is not restricted to what was shown in 3. 4 and 5 are plan views showing other examples of the heat sink 101. FIG. 4 and 5, the configuration of the connection region 125 of the heat sink 101 is different from that shown in FIG. 4 and 5, the heat sink 101 is constituted by a single plate-like member, and a notch 111 is provided in a predetermined region of the plate-like member, specifically, in the connection region 125.

  Two connecting portions 109 are provided inside the outer peripheral edge of the heat dissipation area of the plate-like heat sink 101. A hollow 107 is formed between the two connecting portions 109. Further, the outer side of the connecting portion 109 is a cutout portion 111 formed from the periphery of the plate-shaped member toward the inside.

  In FIG. 5, one connection portion 109 is provided in one connection region 125, and both sides of the connection portion 109 are notched portions 111.

  In the following, a description will be given focusing on differences from the first embodiment.

(Second embodiment)
In the first embodiment, the case where the heat sink is continuously integrated is described as an example. However, the heat dissipation area and the connection area of the heat sink may be made of different materials. In the present embodiment, such a configuration will be described.

  FIG. 6 is a plan view showing the configuration of the semiconductor device according to the present embodiment. FIG. 7 is a cross-sectional view taken along the line B-B ′ of FIG. 6. FIG. 8 is a plan view showing a configuration of a heat sink used in the semiconductor device 110 shown in FIGS. 6 and 7. FIG. 9 is a partial cross-sectional view showing the configuration of the heat sink used in the semiconductor device 110.

  The basic configuration of the semiconductor device 110 shown in FIGS. 6 and 7 is the same as that of the semiconductor device 100 (FIGS. 1 and 2) described in the first embodiment, but the structure of the heat sink is different. In the present embodiment, the heat sink connection region 125 is made of a material having a lower thermal conductivity than the first heat radiating plate 113a, the second heat radiating plate 113b, and the third heat radiating plate 113c.

  The heat sink of this embodiment has a configuration in which a plurality of heat radiating plates are connected with a material having a low thermal conductivity. More specifically, the heat sink of the present embodiment includes a first heat radiation plate 113a and a second heat sink 113a provided to face the first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c, respectively. The heat sink 113b and the third heat sink 113c are provided. Joints 105 are provided in a region sandwiched between the first heat radiating plate 113a and the second heat radiating plate 113b and a region sandwiched between the second heat radiating plate 113b and the third heat radiating plate 113c, respectively. The first heat radiating plate 113a and the second heat radiating plate 113b, and the second heat radiating plate 113b and the third heat radiating plate 113c are connected by a joint 105, respectively.

  The joint 105 is made of a material having a lower thermal conductivity than the first heat radiating plate 113a, the second heat radiating plate 113b, and the third heat radiating plate 113c. Specific examples of the material of the joint 105 include silicone resin, epoxy resin, ABS (acrylonitrile-butadiene-styrene) resin, polyimide, and the like.

  In addition, when the joint 105 or a heat sink is comprised with the some material, it can be set as the structure whose average thermal conductivity of the joint 105 is smaller than the average heat conductivity of each heat sink.

  As shown in FIG. 9, the joint 105 has three plate portions (plate portions 117a) arranged in a plane parallel to the substrate surface of the semiconductor element at a predetermined interval in a direction perpendicular to the substrate surface of the semiconductor element. , Plate portion 117b and plate portion 117c), and a support portion 115 for supporting these plate portions. The thickness and arrangement interval of the plate portion 117a, the plate portion 117b, and the plate portion 117c are, for example, the height of the first semiconductor element 103a, the second semiconductor element 103b, and the third semiconductor element 103c, and the first heat dissipation plate. It is set according to the thickness of 113a, the 2nd heat sink 113b, and the 3rd heat sink 113c.

  Also in this embodiment, a heat sink integrated by a joint 105 is provided over a plurality of semiconductor elements, and the heat sink joint 105 disposed in a region between the semiconductor elements is more than the heat sink of the heat sink. Is also made of a material having low thermal conductivity. For this reason, the connection area | region 125 functions as an area | region which suppresses or interrupts | blocks the heat conduction between heat sinks to such an extent that there is no practical problem. Therefore, the heat conduction between the semiconductor elements via the joint 105 is effectively suppressed, and the same effect as the first embodiment can be obtained.

  In the present embodiment, the joint 105 may be made of a material that connects adjacent heat sinks and has a lower thermal conductivity than the heat sink.

FIG. 10 is a plan view showing another configuration of the heat sink of the present embodiment.
The basic configuration of the heat sink shown in FIG. 10 is the same as the configuration of the heat sink shown in FIG. However, in FIG. 8, one joint 105 is provided over the entire region where the heat sink is connected, whereas in FIG. 10, two joints 105 are provided near the end of the heat sink, An opening 121 is formed between the two joints 105.
As in the configuration of FIG. 10, by providing the opening 121 in a part of the connection region of the heat sink, the heat conduction between the semiconductor elements can be further effectively suppressed.

  As mentioned above, although embodiment of this invention was described with reference to drawings, these are the illustrations of this invention, Various structures other than the above are also employable.

  For example, in the above embodiment, the first semiconductor element 103a and the third semiconductor element 103c have the same height, and the second semiconductor element 103b having a low height is disposed between them. The configuration was as follows. This is an example, and the height of each semiconductor element from the printed circuit board 104 is not particularly limited. Moreover, the heat sink 101 should just be comprised so that a thermal radiation area | region may be arrange | positioned facing the upper part of each semiconductor element. For example, the connecting portion 109 may be inclined with respect to the printed circuit board 104 as in the first embodiment, or the joint 105 may be provided between a plurality of semiconductor elements as in the second embodiment. Good.

  The heat sink exemplified in the above embodiment can be applied to all semiconductor packages using a manner in which a heat sink is attached to a plurality of semiconductor elements. For example, the present invention can be applied to an IC chip mounted on a mobile phone or the like.

It is a top view which shows the structure of the semiconductor device in embodiment. It is A-A 'sectional drawing of FIG. It is a top view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a top view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a top view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a top view which shows the structure of the semiconductor device in embodiment. FIG. 7 is a B-B ′ sectional view of FIG. 6. It is a top view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a fragmentary sectional view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a top view which shows the structure of the heat sink used for the semiconductor device of FIG. It is a top view which shows the structure of a semiconductor device. It is C-C 'sectional drawing of FIG. It is a top view which shows the structure of a semiconductor device. It is D-D 'sectional drawing of FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor device 101 Heat sink 102a Adhesive 102b Adhesive 102c Adhesive 103a 1st semiconductor element 103b 2nd semiconductor element 103c 3rd semiconductor element 104 Printed circuit board 105 Joint 107 Cut-out hole 109 Connection part 110 Semiconductor device 111 Notch part 113a 1st heat sink 113b 2nd heat sink 113c 3rd heat sink 115 support part 117a board part 117b board part 117c board part 119 bump 121 opening part 123a first heat radiation area 123b second heat radiation area 123c third Heat dissipation area 125 Connection area 200 Semiconductor device 201 Heat sink 201a First heat sink 201b Second heat sink 201c Third heat sink 203a First semiconductor element 203b Second semiconductor element 203c Second The semiconductor device 204 PCB 210 a semiconductor device

Claims (9)

A mounting board;
First and second semiconductor elements mounted on the mounting substrate;
A heat sink provided from the top of the first semiconductor element to the top of the second semiconductor element;
Including
The heat sink is
A first region corresponding to the first semiconductor element;
A second region corresponding to the second semiconductor element;
A region sandwiched between the first region and the second region, including a third region that suppresses heat conduction between the first region and the second region. Semiconductor device. The semiconductor device according to claim 1,
A semiconductor device in which a through hole is provided in the heat sink in the third region. The semiconductor device according to claim 2,
The heat sink is composed of a single plate-shaped member,
A semiconductor device in which the through hole is provided in a predetermined region of the plate-like member. The semiconductor device according to claim 1,
In the third region, a semiconductor device in which a notch is provided in the heat sink. The semiconductor device according to claim 4,
The heat sink is composed of a single plate-shaped member,
A semiconductor device in which the notch is provided in a predetermined region of the plate member. The semiconductor device according to claim 1 or 2,
A semiconductor device in which the third region is made of a material having a lower thermal conductivity than the first and second regions. The semiconductor device according to claim 1,
The first region comprises a first heat sink;
The second region comprises a second heat sink;
A semiconductor device, wherein the third region includes a joint connecting the first heat radiating plate and the second heat radiating plate. The semiconductor device according to claim 7,
A semiconductor device, wherein an opening is provided in the heat sink in the third region. The semiconductor device according to claim 7 or 8,
A semiconductor device in which the joint is made of a material having a lower thermal conductivity than the first heat radiating plate and the second heat radiating plate.

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