JP2006269497A - 基板処理装置及び基板収納方法 - Google Patents
基板処理装置及び基板収納方法 Download PDFInfo
- Publication number
- JP2006269497A JP2006269497A JP2005081607A JP2005081607A JP2006269497A JP 2006269497 A JP2006269497 A JP 2006269497A JP 2005081607 A JP2005081607 A JP 2005081607A JP 2005081607 A JP2005081607 A JP 2005081607A JP 2006269497 A JP2006269497 A JP 2006269497A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- wafer
- semiconductor wafer
- unit
- processing apparatus
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 133
- 238000000034 method Methods 0.000 title claims abstract description 30
- 230000008569 process Effects 0.000 claims abstract description 15
- 238000012546 transfer Methods 0.000 claims description 109
- 238000012545 processing Methods 0.000 claims description 47
- 230000032258 transport Effects 0.000 claims description 25
- 235000012431 wafers Nutrition 0.000 description 330
- 239000004065 semiconductor Substances 0.000 description 156
- 238000007689 inspection Methods 0.000 description 108
- 238000001514 detection method Methods 0.000 description 43
- 238000012937 correction Methods 0.000 description 30
- 230000006870 function Effects 0.000 description 6
- 239000000428 dust Substances 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000006073 displacement reaction Methods 0.000 description 2
- 238000003384 imaging method Methods 0.000 description 2
- 230000002159 abnormal effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012360 testing method Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/68—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment
- H01L21/681—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for positioning, orientation or alignment using optical controlling means
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S414/00—Material or article handling
- Y10S414/135—Associated with semiconductor wafer handling
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005081607A JP2006269497A (ja) | 2005-03-22 | 2005-03-22 | 基板処理装置及び基板収納方法 |
| US11/377,509 US7747343B2 (en) | 2005-03-22 | 2006-03-16 | Substrate processing apparatus and substrate housing method |
| CNB2006100570585A CN100533704C (zh) | 2005-03-22 | 2006-03-17 | 基片处理装置和基片容纳方法 |
| TW095109170A TWI417977B (zh) | 2005-03-22 | 2006-03-17 | 基材處理裝置與基材收納方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005081607A JP2006269497A (ja) | 2005-03-22 | 2005-03-22 | 基板処理装置及び基板収納方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006269497A true JP2006269497A (ja) | 2006-10-05 |
| JP2006269497A5 JP2006269497A5 (enExample) | 2008-05-01 |
Family
ID=37015718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005081607A Withdrawn JP2006269497A (ja) | 2005-03-22 | 2005-03-22 | 基板処理装置及び基板収納方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7747343B2 (enExample) |
| JP (1) | JP2006269497A (enExample) |
| CN (1) | CN100533704C (enExample) |
| TW (1) | TWI417977B (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018190870A (ja) * | 2017-05-09 | 2018-11-29 | キヤノン株式会社 | 搬送装置、システム、および物品の製造方法 |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8600150B2 (en) * | 2006-02-13 | 2013-12-03 | Samsung Electronics Co., Ltd. | Wafer aligning apparatus and related method |
| JP4914761B2 (ja) * | 2007-05-16 | 2012-04-11 | オリンパス株式会社 | 外観検査装置 |
| JP5303254B2 (ja) * | 2008-12-15 | 2013-10-02 | 東京エレクトロン株式会社 | 異物除去方法及び記憶媒体 |
| KR102238649B1 (ko) * | 2014-09-16 | 2021-04-09 | 삼성전자주식회사 | 반도체 칩 본딩 장치 |
| CN114235684A (zh) * | 2020-09-09 | 2022-03-25 | 旺矽科技股份有限公司 | 巨观及微观检测设备及检测方法 |
| KR102624577B1 (ko) * | 2020-10-28 | 2024-01-15 | 세메스 주식회사 | 기판 처리 장치 및 기판 처리 방법 |
| TW202238803A (zh) * | 2021-02-26 | 2022-10-01 | 日商東京威力科創股份有限公司 | 搬運系統、搬運裝置及搬運方法 |
| JP7609676B2 (ja) * | 2021-03-29 | 2025-01-07 | 東京エレクトロン株式会社 | 基板処理装置及び基板搬送位置調整方法 |
Family Cites Families (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07263518A (ja) | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体ウェハの搬送装置及び搬送方法並びに半導体ウェハ処理装置 |
| JPH09102257A (ja) | 1995-07-28 | 1997-04-15 | Matsushita Electric Works Ltd | 封止接点装置 |
| US5822213A (en) * | 1996-03-29 | 1998-10-13 | Lam Research Corporation | Method and apparatus for determining the center and orientation of a wafer-like object |
| US5980194A (en) * | 1996-07-15 | 1999-11-09 | Applied Materials, Inc. | Wafer position error detection and correction system |
| TW350115B (en) * | 1996-12-02 | 1999-01-11 | Toyota Automatic Loom Co Ltd | Misregistration detection device and method thereof |
| JP3932097B2 (ja) * | 2000-04-27 | 2007-06-20 | 信越半導体株式会社 | 半導体ウエーハ及び半導体ウエーハの加工方法 |
| US6327517B1 (en) * | 2000-07-27 | 2001-12-04 | Applied Materials, Inc. | Apparatus for on-the-fly center finding and notch aligning for wafer handling robots |
| TW559855B (en) | 2000-09-06 | 2003-11-01 | Olympus Optical Co | Wafer transfer apparatus |
| US6678055B2 (en) * | 2001-11-26 | 2004-01-13 | Tevet Process Control Technologies Ltd. | Method and apparatus for measuring stress in semiconductor wafers |
| US6900877B2 (en) * | 2002-06-12 | 2005-05-31 | Asm American, Inc. | Semiconductor wafer position shift measurement and correction |
| US20050151947A1 (en) * | 2002-07-31 | 2005-07-14 | Nikon Corporation | Position measuring method, position control method, exposure method and exposure apparatus, and device manufacturing method |
| US7379785B2 (en) * | 2002-11-28 | 2008-05-27 | Tokyo Electron Limited | Substrate processing system, coating/developing apparatus, and substrate processing apparatus |
| JP3880589B2 (ja) * | 2004-03-31 | 2007-02-14 | キヤノン株式会社 | 位置計測装置、露光装置及びデバイス製造方法 |
-
2005
- 2005-03-22 JP JP2005081607A patent/JP2006269497A/ja not_active Withdrawn
-
2006
- 2006-03-16 US US11/377,509 patent/US7747343B2/en not_active Expired - Fee Related
- 2006-03-17 TW TW095109170A patent/TWI417977B/zh not_active IP Right Cessation
- 2006-03-17 CN CNB2006100570585A patent/CN100533704C/zh not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2018190870A (ja) * | 2017-05-09 | 2018-11-29 | キヤノン株式会社 | 搬送装置、システム、および物品の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| TW200703537A (en) | 2007-01-16 |
| US20060215152A1 (en) | 2006-09-28 |
| CN1838398A (zh) | 2006-09-27 |
| CN100533704C (zh) | 2009-08-26 |
| TWI417977B (zh) | 2013-12-01 |
| US7747343B2 (en) | 2010-06-29 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20080314 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080314 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20100316 |