JP2006210699A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2006210699A JP2006210699A JP2005021570A JP2005021570A JP2006210699A JP 2006210699 A JP2006210699 A JP 2006210699A JP 2005021570 A JP2005021570 A JP 2005021570A JP 2005021570 A JP2005021570 A JP 2005021570A JP 2006210699 A JP2006210699 A JP 2006210699A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 35
- 239000000758 substrate Substances 0.000 claims abstract description 19
- 238000002955 isolation Methods 0.000 claims abstract description 11
- 239000012212 insulator Substances 0.000 claims description 2
- 230000006866 deterioration Effects 0.000 abstract description 4
- 238000005520 cutting process Methods 0.000 description 22
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 7
- 230000000694 effects Effects 0.000 description 5
- 239000012535 impurity Substances 0.000 description 5
- BOTDANWDWHJENH-UHFFFAOYSA-N Tetraethyl orthosilicate Chemical compound CCO[Si](OCC)(OCC)OCC BOTDANWDWHJENH-UHFFFAOYSA-N 0.000 description 4
- 230000001133 acceleration Effects 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- 238000005468 ion implantation Methods 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 230000002542 deteriorative effect Effects 0.000 description 2
- 230000003213 activating effect Effects 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 229920002120 photoresistant polymer Polymers 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42372—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
- H01L29/4238—Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the surface lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate
- H01L29/6659—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate with both lightly doped source and drain extensions and source and drain self-aligned to the sides of the gate, e.g. lightly doped drain [LDD] MOSFET, double diffused drain [DDD] MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66568—Lateral single gate silicon transistors
- H01L29/66613—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation
- H01L29/66628—Lateral single gate silicon transistors with a gate recessing step, e.g. using local oxidation recessing the gate by forming single crystalline semiconductor material at the source or drain location
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
- H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Abstract
【解決手段】 半導体基板1の、素子分離領域3によって素子分離された素子領域を横断するように形成されたゲート電極7と、ゲート電極の両側の半導体基板に形成されたソースドレイン領域17と、ソース・ドレイン領域上に形成されたエレベーテッドソース・ドレイン15と、を有するMISトランジスタを備え、ゲート電極は、素子分離領域と素子領域との境界部分におけるゲート長が素子領域の中央部におけるゲート長よりも長くなるように構成されている。
【選択図】 図1
Description
Jie. J. Sun et al., "Impact of Eρ Facets on Deep Submicron Elevated Source/Drain MOSFET Characteristics", IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL45.No.6, June 1998
W2≦W1−2(X + d) (2)
3 STI
5 ゲート絶縁膜
7 ゲート電極
9 絶縁膜
11 エクステンション層
12 TEOS膜
13 ゲート側壁
15 エレベーテッドソース・ドレイン
17 ソース・ドレイン領域
Claims (5)
- 半導体基板の、素子分離領域によって素子分離された素子領域を横断するように形成されたゲート電極と、前記ゲート電極の両側の前記半導体基板に形成されたソースドレイン領域と、前記ソース・ドレイン領域上に形成されたエレベーテッドソース・ドレインと、を有するMISトランジスタを備え、
前記ゲート電極は、前記素子分離領域と前記素子領域との境界部分におけるゲート長が前記素子領域の中央部におけるゲート長よりも長くなるように構成されていることを特徴とする半導体装置。 - 前記ゲート電極と前記エレベーテッドソース・ドレインとは、前記ゲート電極の側部に形成された絶縁体からなるゲート側壁によって電気的に絶縁されていることを特徴とする請求項1記載の半導体装置。
- 前記エレベーテッドソース・ドレインは、エピタキシャル成長膜であることを特徴とする請求項1または2記載の半導体装置。
- 前記エレベーテッドソース・ドレインは前記素子分離領域と前記素子領域との境界部分にファセットを有し、前記ゲート長が長くなるように構成された前記ゲート電極の部分は、前記ファセット上にあることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記素子分離領域と前記素子領域との境界部分におけるゲート長は、前記素子領域の中央部分のゲート長の1.25倍から1.5倍の長さであることを特徴とする請求項1乃至4のいずかに記載の半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005021570A JP4851718B2 (ja) | 2005-01-28 | 2005-01-28 | 半導体装置 |
US11/146,029 US7394120B2 (en) | 2005-01-28 | 2005-06-07 | Semiconductor device having a shaped gate electrode and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005021570A JP4851718B2 (ja) | 2005-01-28 | 2005-01-28 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006210699A true JP2006210699A (ja) | 2006-08-10 |
JP4851718B2 JP4851718B2 (ja) | 2012-01-11 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
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JP2005021570A Expired - Fee Related JP4851718B2 (ja) | 2005-01-28 | 2005-01-28 | 半導体装置 |
Country Status (2)
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US (1) | US7394120B2 (ja) |
JP (1) | JP4851718B2 (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019220702A (ja) * | 2012-01-23 | 2019-12-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US11658211B2 (en) | 2012-01-23 | 2023-05-23 | Renesas Electronics Corporation | Semiconductor device and manufacturing method of the same |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7982247B2 (en) * | 2008-08-19 | 2011-07-19 | Freescale Semiconductor, Inc. | Transistor with gain variation compensation |
US10325991B1 (en) * | 2017-12-06 | 2019-06-18 | Nanya Technology Corporation | Transistor device |
CN113451396B (zh) * | 2020-03-25 | 2022-08-23 | 苏州能讯高能半导体有限公司 | 一种半导体器件及其制备方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5405795A (en) * | 1994-06-29 | 1995-04-11 | International Business Machines Corporation | Method of forming a SOI transistor having a self-aligned body contact |
US5567553A (en) * | 1994-07-12 | 1996-10-22 | International Business Machines Corporation | Method to suppress subthreshold leakage due to sharp isolation corners in submicron FET structures |
JP2839018B2 (ja) * | 1996-07-31 | 1998-12-16 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3461277B2 (ja) * | 1998-01-23 | 2003-10-27 | 株式会社東芝 | 半導体装置及びその製造方法 |
US5970352A (en) * | 1998-04-23 | 1999-10-19 | Kabushiki Kaisha Toshiba | Field effect transistor having elevated source and drain regions and methods for manufacturing the same |
US6278165B1 (en) * | 1998-06-29 | 2001-08-21 | Kabushiki Kaisha Toshiba | MIS transistor having a large driving current and method for producing the same |
US6316808B1 (en) * | 1998-08-07 | 2001-11-13 | International Business Machines Corporation | T-Gate transistor with improved SOI body contact structure |
KR20010076658A (ko) * | 2000-01-27 | 2001-08-16 | 박종섭 | 반도체 소자 |
US6686300B2 (en) * | 2000-12-27 | 2004-02-03 | Texas Instruments Incorporated | Sub-critical-dimension integrated circuit features |
US20070108514A1 (en) * | 2003-04-28 | 2007-05-17 | Akira Inoue | Semiconductor device and method of fabricating the same |
DE10324657B4 (de) * | 2003-05-30 | 2009-01-22 | Advanced Micro Devices, Inc. (n.d.Ges.d. Staates Delaware), Sunnyvale | Verfahren zur Herstellung eines Metallsilizids |
-
2005
- 2005-01-28 JP JP2005021570A patent/JP4851718B2/ja not_active Expired - Fee Related
- 2005-06-07 US US11/146,029 patent/US7394120B2/en not_active Expired - Fee Related
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2019220702A (ja) * | 2012-01-23 | 2019-12-26 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US11658211B2 (en) | 2012-01-23 | 2023-05-23 | Renesas Electronics Corporation | Semiconductor device and manufacturing method of the same |
US11996448B2 (en) | 2012-01-23 | 2024-05-28 | Renesas Electronics Corporation | Manufacturing method of semiconductor device including field-effect transistor comprising buried oxide (BOX) film and silicon layer |
Also Published As
Publication number | Publication date |
---|---|
US7394120B2 (en) | 2008-07-01 |
JP4851718B2 (ja) | 2012-01-11 |
US20060170006A1 (en) | 2006-08-03 |
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