JP2005535218A - 入力信号間の差を選択する位相検出器 - Google Patents
入力信号間の差を選択する位相検出器 Download PDFInfo
- Publication number
- JP2005535218A JP2005535218A JP2004525700A JP2004525700A JP2005535218A JP 2005535218 A JP2005535218 A JP 2005535218A JP 2004525700 A JP2004525700 A JP 2004525700A JP 2004525700 A JP2004525700 A JP 2004525700A JP 2005535218 A JP2005535218 A JP 2005535218A
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- Prior art keywords
- signal
- difference
- input signal
- phase detector
- phase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000000034 method Methods 0.000 claims abstract description 8
- 229920000729 poly(L-lysine) polymer Polymers 0.000 description 4
- 230000001934 delay Effects 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000003111 delayed effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
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Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
- H03D13/003—Circuits for comparing the phase or frequency of two mutually-independent oscillations in which both oscillations are converted by logic means into pulses which are applied to filtering or integrating means
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D13/00—Circuits for comparing the phase or frequency of two mutually-independent oscillations
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Manipulation Of Pulses (AREA)
Abstract
Description
Claims (10)
- 第1の入力信号と第2の入力信号との間の位相を検出する位相検出器であって、
前記入力信号間の差を設定する差設定器と、
前記差のなかから出力信号とすべき一つの差を選択する選択器と、
を備えていることを特徴とする位相検出器。 - 前記選択器は、フィードバックのない選択器であることを特徴とする請求項1に記載の位相検出器。
- 前記選択器は、
前記第2の入力信号によってクロックが供給され、前記第1の入力信号を受け取り、ラッチ信号を生成するラッチと、
前記第2の入力信号によって制御され、前記ラッチ信号を受け取り、選択信号を生成するマルチプレクサと、
を備えていることを特徴とする請求項2に記載の位相検出器。 - 位相回路は、前記入力信号を、補償された入力信号に変換する変換器を備えていることを特徴とする請求項1に記載の位相検出器。
- 前記変換器は、入力信号ごとに、レプリカ回路に接続されたバッファ回路を備えていることを特徴とする請求項4に記載の位相検出器。
- 前記差設定器は、
補償された入力信号を相互に減算し、結果信号を生成する減算回路と、
前記結果信号の絶対値を生成する絶対値回路と、
を備え、
前記位相検出器は、絶対値を選択する選択信号によって制御されるマルチプレクサを備えていることを特徴とする請求項4に記載の位相検出器。 - 前記差設定器は、
補償された入力信号を相互に減算し、結果信号を生成する減算回路と、
前記結果信号の二乗を生成する二乗回路と、
を備え、
前記位相検出器は、二乗を選択する選択信号によって制御されるマルチプレクサを備えていることを特徴とする請求項4に記載の位相検出器。 - 第1の入力信号と第2の入力信号との間の位相を検出する位相検出器を備えている位相ロックループであって、
前記位相検出器は、
前記入力信号間の差を設定する差設定器と、
前記差のなかから出力信号とすべき一つの差を選択する選択器と、
を備えていることを特徴とする位相ロックループ。 - 第1の入力信号と第2の入力信号との間の位相を検出する方法であって、
前記入力信号間の差を設定するステップと、
前記差のなかから出力信号とすべき一つの差を選択するステップと、
を含むことを特徴とする方法。 - 第1の入力信号と第2の入力信号との間の位相を検出するプロセッサプログラムプロダクトであって、
前記入力信号間の差を設定する機能と、
前記差のなかから出力信号とすべき一つの差を選択する機能と、
を含むことを特徴とするプロセッサプログラムプロダクト。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP02078157 | 2002-08-01 | ||
PCT/IB2003/003435 WO2004013956A1 (en) | 2002-08-01 | 2003-07-23 | Phase detector with selection of differences between input signals |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005535218A true JP2005535218A (ja) | 2005-11-17 |
JP4372685B2 JP4372685B2 (ja) | 2009-11-25 |
Family
ID=31197919
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004525700A Expired - Fee Related JP4372685B2 (ja) | 2002-08-01 | 2003-07-23 | 入力信号間の差を選択する位相検出器 |
Country Status (6)
Country | Link |
---|---|
US (1) | US7463069B2 (ja) |
EP (1) | EP1527515A1 (ja) |
JP (1) | JP4372685B2 (ja) |
CN (1) | CN100477491C (ja) |
AU (1) | AU2003249460A1 (ja) |
WO (1) | WO2004013956A1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8461890B1 (en) | 2011-07-20 | 2013-06-11 | United Microelectronics Corp. | Phase and/or frequency detector, phase-locked loop and operation method for the phase-locked loop |
GB2530462A (en) * | 2013-06-14 | 2016-03-23 | Vivent Sã Rl | Apparatus and method for processing signals |
KR102222449B1 (ko) * | 2015-02-16 | 2021-03-03 | 삼성전자주식회사 | 탭이 내장된 데이터 수신기 및 이를 포함하는 데이터 전송 시스템 |
Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2027295A (en) * | 1978-07-31 | 1980-02-13 | Pye Ltd | A phase comparator |
JPH01223823A (ja) * | 1988-03-03 | 1989-09-06 | Nec Corp | 位相同期発振回路 |
JPH09102739A (ja) * | 1995-10-05 | 1997-04-15 | Nec Corp | Pll回路 |
JPH11234048A (ja) * | 1998-02-12 | 1999-08-27 | Texas Instr Japan Ltd | 位相比較器 |
JP2000004148A (ja) * | 1998-01-09 | 2000-01-07 | Mitel Semiconductor Ltd | 位相検波装置及び方法、及び位相同期ル―プ回路装置 |
JP2000134090A (ja) * | 1998-10-26 | 2000-05-12 | Mitsubishi Electric Corp | 位相比較器およびそれを用いた同期型半導体記憶装置 |
JP2000182335A (ja) * | 1998-12-15 | 2000-06-30 | Nec Corp | Pll回路及びそれを備えた光ディスク装置 |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4868513A (en) * | 1987-09-11 | 1989-09-19 | Amdahl Corporation | Phase-locked loop with redundant reference input |
US6310521B1 (en) * | 1999-12-23 | 2001-10-30 | Cypress Semiconductor Corp. | Reference-free clock generation and data recovery PLL |
JP2003163592A (ja) * | 2001-11-26 | 2003-06-06 | Mitsubishi Electric Corp | 位相比較器およびそれを用いたクロック発生回路 |
US6566967B1 (en) * | 2002-02-26 | 2003-05-20 | Applied Micro Circuits Corporation | Configurable triple phase-locked loop circuit and method |
-
2003
- 2003-07-23 EP EP03766577A patent/EP1527515A1/en not_active Withdrawn
- 2003-07-23 AU AU2003249460A patent/AU2003249460A1/en not_active Abandoned
- 2003-07-23 CN CNB038184370A patent/CN100477491C/zh not_active Expired - Fee Related
- 2003-07-23 JP JP2004525700A patent/JP4372685B2/ja not_active Expired - Fee Related
- 2003-07-23 US US10/523,344 patent/US7463069B2/en not_active Expired - Fee Related
- 2003-07-23 WO PCT/IB2003/003435 patent/WO2004013956A1/en active Application Filing
Patent Citations (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB2027295A (en) * | 1978-07-31 | 1980-02-13 | Pye Ltd | A phase comparator |
JPH01223823A (ja) * | 1988-03-03 | 1989-09-06 | Nec Corp | 位相同期発振回路 |
JPH09102739A (ja) * | 1995-10-05 | 1997-04-15 | Nec Corp | Pll回路 |
JP2000004148A (ja) * | 1998-01-09 | 2000-01-07 | Mitel Semiconductor Ltd | 位相検波装置及び方法、及び位相同期ル―プ回路装置 |
JPH11234048A (ja) * | 1998-02-12 | 1999-08-27 | Texas Instr Japan Ltd | 位相比較器 |
JP2000134090A (ja) * | 1998-10-26 | 2000-05-12 | Mitsubishi Electric Corp | 位相比較器およびそれを用いた同期型半導体記憶装置 |
JP2000182335A (ja) * | 1998-12-15 | 2000-06-30 | Nec Corp | Pll回路及びそれを備えた光ディスク装置 |
Also Published As
Publication number | Publication date |
---|---|
JP4372685B2 (ja) | 2009-11-25 |
AU2003249460A1 (en) | 2004-02-23 |
EP1527515A1 (en) | 2005-05-04 |
CN1672321A (zh) | 2005-09-21 |
US7463069B2 (en) | 2008-12-09 |
CN100477491C (zh) | 2009-04-08 |
WO2004013956A1 (en) | 2004-02-12 |
US20060076981A1 (en) | 2006-04-13 |
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