JP2005522817A - アルゴリズム動的基準プログラム - Google Patents
アルゴリズム動的基準プログラム Download PDFInfo
- Publication number
- JP2005522817A JP2005522817A JP2003585103A JP2003585103A JP2005522817A JP 2005522817 A JP2005522817 A JP 2005522817A JP 2003585103 A JP2003585103 A JP 2003585103A JP 2003585103 A JP2003585103 A JP 2003585103A JP 2005522817 A JP2005522817 A JP 2005522817A
- Authority
- JP
- Japan
- Prior art keywords
- array
- bit
- flash memory
- cells
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/107—Programming all cells in an array, sector or block to the same state prior to flash erasing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
- G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
- G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
- G11C16/3404—Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
- G11C16/3409—Circuits or methods to recover overerased nonvolatile memory cells detected during erase verification, usually by means of a "soft" programming step
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2216/00—Indexing scheme relating to G11C16/00 and subgroups, for features not directly covered by these groups
- G11C2216/12—Reading and writing aspects of erasable programmable read-only memories
- G11C2216/18—Flash erasure of all the cells in an array, sector or block simultaneously
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Abstract
Description
Claims (4)
- 複数のセクタアレイおよび各セクタアレイに関連する基準アレイを含むデュアルビットフラッシュメモリアレイにおいて、デュアルビットフラッシュメモリセル(10)のサイクルを実行する方法であって、
(a)セクタアレイ内のデュアルビットフラッシュメモリセル(10)および関連する基準アレイ内のデュアルビットフラッシュメモリセル(10)を消去するステップと、
(b)前記関連する基準アレイ内の前記デュアルビットフラッシュメモリセル(10)をプログラムするステップとを含む方法。 - 前記セクタアレイはm行n列に構成され、前記基準アレイはm行p列に構成され、前記p列は基準セルのペアを持つようにさらに構成されており、前記基準ペアの一方は01にプログラムされ、前記基準ペアの他方は10にプログラムされている、請求項1記載の方法。
- 前記ステップ(a)は、(c)前記セクタアレイおよび関連する基準アレイ内のデュアルビットフラッシュメモリセル(10)をプリプログラムするステップを含む、請求項2記載の方法。
- (d)前記ステップ(a)で過消去された、前記セクタアレイおよび関連する基準内のデュアルビットフラッシュメモリセル(10)をソフトプログラムするステップをさらに含む、請求項3記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/119,391 US6690602B1 (en) | 2002-04-08 | 2002-04-08 | Algorithm dynamic reference programming |
PCT/US2003/004611 WO2003088260A1 (en) | 2002-04-08 | 2003-02-14 | Algorithm dynamic reference programming |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2005522817A true JP2005522817A (ja) | 2005-07-28 |
Family
ID=29248246
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003585103A Pending JP2005522817A (ja) | 2002-04-08 | 2003-02-14 | アルゴリズム動的基準プログラム |
Country Status (9)
Country | Link |
---|---|
US (1) | US6690602B1 (ja) |
JP (1) | JP2005522817A (ja) |
KR (1) | KR100935948B1 (ja) |
CN (1) | CN100538897C (ja) |
AU (1) | AU2003219772A1 (ja) |
DE (1) | DE10392492B4 (ja) |
GB (1) | GB2401971B (ja) |
TW (1) | TWI286754B (ja) |
WO (1) | WO2003088260A1 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007080476A (ja) * | 2005-09-09 | 2007-03-29 | Macronix Internatl Co Ltd | 不揮発性メモリセルの過剰消去を保護する方法および装置 |
WO2007069321A1 (ja) * | 2005-12-15 | 2007-06-21 | Spansion Llc | 不揮発性記憶装置、および不揮発性記憶装置の制御方法 |
JP2007226952A (ja) * | 2006-02-22 | 2007-09-06 | Samsung Electronics Co Ltd | メモリセル間のカップリングノイズを低減させる3−レベル不揮発性半導体メモリ装置およびその駆動方法 |
Families Citing this family (48)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6768165B1 (en) * | 1997-08-01 | 2004-07-27 | Saifun Semiconductors Ltd. | Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping |
US6928001B2 (en) * | 2000-12-07 | 2005-08-09 | Saifun Semiconductors Ltd. | Programming and erasing methods for a non-volatile memory cell |
US7098107B2 (en) * | 2001-11-19 | 2006-08-29 | Saifun Semiconductor Ltd. | Protective layer in memory device and method therefor |
US7190620B2 (en) * | 2002-01-31 | 2007-03-13 | Saifun Semiconductors Ltd. | Method for operating a memory device |
US6700818B2 (en) * | 2002-01-31 | 2004-03-02 | Saifun Semiconductors Ltd. | Method for operating a memory device |
US6799256B2 (en) * | 2002-04-12 | 2004-09-28 | Advanced Micro Devices, Inc. | System and method for multi-bit flash reads using dual dynamic references |
US6917544B2 (en) * | 2002-07-10 | 2005-07-12 | Saifun Semiconductors Ltd. | Multiple use memory chip |
AU2003265452A1 (en) | 2002-09-20 | 2004-04-08 | Enventure Global Technology | Pipe formability evaluation for expandable tubulars |
US7136304B2 (en) | 2002-10-29 | 2006-11-14 | Saifun Semiconductor Ltd | Method, system and circuit for programming a non-volatile memory array |
US6967896B2 (en) * | 2003-01-30 | 2005-11-22 | Saifun Semiconductors Ltd | Address scramble |
US7178004B2 (en) * | 2003-01-31 | 2007-02-13 | Yan Polansky | Memory array programming circuit and a method for using the circuit |
US7324374B2 (en) * | 2003-06-20 | 2008-01-29 | Spansion Llc | Memory with a core-based virtual ground and dynamic reference sensing scheme |
US7123532B2 (en) * | 2003-09-16 | 2006-10-17 | Saifun Semiconductors Ltd. | Operating array cells with matched reference cells |
WO2005094178A2 (en) * | 2004-04-01 | 2005-10-13 | Saifun Semiconductors Ltd. | Method, circuit and systems for erasing one or more non-volatile memory cells |
US7366025B2 (en) * | 2004-06-10 | 2008-04-29 | Saifun Semiconductors Ltd. | Reduced power programming of non-volatile cells |
US7095655B2 (en) * | 2004-08-12 | 2006-08-22 | Saifun Semiconductors Ltd. | Dynamic matching of signal path and reference path for sensing |
US20060068551A1 (en) * | 2004-09-27 | 2006-03-30 | Saifun Semiconductors, Ltd. | Method for embedding NROM |
US7638850B2 (en) * | 2004-10-14 | 2009-12-29 | Saifun Semiconductors Ltd. | Non-volatile memory structure and method of fabrication |
US7262999B2 (en) * | 2004-11-24 | 2007-08-28 | Macronix International Co., Ltd. | System and method for preventing read margin degradation for a memory array |
US20060146624A1 (en) * | 2004-12-02 | 2006-07-06 | Saifun Semiconductors, Ltd. | Current folding sense amplifier |
CN1838328A (zh) * | 2005-01-19 | 2006-09-27 | 赛芬半导体有限公司 | 擦除存储器阵列上存储单元的方法 |
US8053812B2 (en) | 2005-03-17 | 2011-11-08 | Spansion Israel Ltd | Contact in planar NROM technology |
WO2006103734A1 (ja) * | 2005-03-28 | 2006-10-05 | Fujitsu Limited | 不揮発性半導体メモリおよびその読み出し方法並びにマイクロプロセッサ |
US20070141788A1 (en) * | 2005-05-25 | 2007-06-21 | Ilan Bloom | Method for embedding non-volatile memory with logic circuitry |
US7190621B2 (en) * | 2005-06-03 | 2007-03-13 | Infineon Technologies Ag | Sensing scheme for a non-volatile semiconductor memory cell |
US7259993B2 (en) * | 2005-06-03 | 2007-08-21 | Infineon Technologies Ag | Reference scheme for a non-volatile semiconductor memory device |
US8400841B2 (en) * | 2005-06-15 | 2013-03-19 | Spansion Israel Ltd. | Device to program adjacent storage cells of different NROM cells |
US7184313B2 (en) * | 2005-06-17 | 2007-02-27 | Saifun Semiconductors Ltd. | Method circuit and system for compensating for temperature induced margin loss in non-volatile memory cells |
US7804126B2 (en) * | 2005-07-18 | 2010-09-28 | Saifun Semiconductors Ltd. | Dense non-volatile memory array and method of fabrication |
JP2007035179A (ja) * | 2005-07-28 | 2007-02-08 | Matsushita Electric Ind Co Ltd | 不揮発性半導体記憶装置 |
US20070036007A1 (en) * | 2005-08-09 | 2007-02-15 | Saifun Semiconductors, Ltd. | Sticky bit buffer |
US7668017B2 (en) | 2005-08-17 | 2010-02-23 | Saifun Semiconductors Ltd. | Method of erasing non-volatile memory cells |
US20070096199A1 (en) * | 2005-09-08 | 2007-05-03 | Eli Lusky | Method of manufacturing symmetric arrays |
US7289359B2 (en) * | 2005-09-09 | 2007-10-30 | Macronix International Co., Ltd. | Systems and methods for using a single reference cell in a dual bit flash memory |
US20070120180A1 (en) * | 2005-11-25 | 2007-05-31 | Boaz Eitan | Transition areas for dense memory arrays |
US7352627B2 (en) * | 2006-01-03 | 2008-04-01 | Saifon Semiconductors Ltd. | Method, system, and circuit for operating a non-volatile memory array |
US7808818B2 (en) * | 2006-01-12 | 2010-10-05 | Saifun Semiconductors Ltd. | Secondary injection for NROM |
US20070173017A1 (en) * | 2006-01-20 | 2007-07-26 | Saifun Semiconductors, Ltd. | Advanced non-volatile memory array and method of fabrication thereof |
US8253452B2 (en) * | 2006-02-21 | 2012-08-28 | Spansion Israel Ltd | Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same |
US7692961B2 (en) | 2006-02-21 | 2010-04-06 | Saifun Semiconductors Ltd. | Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection |
US7760554B2 (en) * | 2006-02-21 | 2010-07-20 | Saifun Semiconductors Ltd. | NROM non-volatile memory and mode of operation |
US20070255889A1 (en) * | 2006-03-22 | 2007-11-01 | Yoav Yogev | Non-volatile memory device and method of operating the device |
US7701779B2 (en) * | 2006-04-27 | 2010-04-20 | Sajfun Semiconductors Ltd. | Method for programming a reference cell |
US7605579B2 (en) * | 2006-09-18 | 2009-10-20 | Saifun Semiconductors Ltd. | Measuring and controlling current consumption and output current of charge pumps |
US20080239599A1 (en) * | 2007-04-01 | 2008-10-02 | Yehuda Yizraeli | Clamping Voltage Events Such As ESD |
US7778098B2 (en) * | 2007-12-31 | 2010-08-17 | Cypress Semiconductor Corporation | Dummy cell for memory circuits |
US8045390B2 (en) * | 2008-03-21 | 2011-10-25 | Macronix International Co., Ltd. | Memory system with dynamic reference cell and method of operating the same |
US7940570B2 (en) * | 2009-06-29 | 2011-05-10 | Spansion Llc | Memory employing separate dynamic reference areas |
Family Cites Families (7)
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US5163021A (en) | 1989-04-13 | 1992-11-10 | Sundisk Corporation | Multi-state EEprom read and write circuits and techniques |
JP3336813B2 (ja) | 1995-02-01 | 2002-10-21 | ソニー株式会社 | 不揮発性半導体メモリ装置 |
DE69702256T2 (de) | 1996-06-24 | 2001-01-18 | Advanced Micro Devices, Inc. | Verfahren für einen merhfachen, bits pro zelle flash eeprom, speicher mit seitenprogrammierungsmodus und leseverfahren |
KR100285065B1 (ko) * | 1998-06-12 | 2001-03-15 | 윤종용 | 불 휘발성 반도체 메모리 장치 |
US6538922B1 (en) | 2000-09-27 | 2003-03-25 | Sandisk Corporation | Writable tracking cells |
US6574139B2 (en) | 2001-06-20 | 2003-06-03 | Fujitsu Limited | Method and device for reading dual bit memory cells using multiple reference cells with two side read |
JP4017118B2 (ja) * | 2004-01-23 | 2007-12-05 | パイオニア株式会社 | 強誘電体を用いた記録媒体、記録装置および再生装置 |
-
2002
- 2002-04-08 US US10/119,391 patent/US6690602B1/en not_active Expired - Lifetime
-
2003
- 2003-02-14 KR KR1020047015998A patent/KR100935948B1/ko active IP Right Grant
- 2003-02-14 CN CNB038077426A patent/CN100538897C/zh not_active Expired - Lifetime
- 2003-02-14 WO PCT/US2003/004611 patent/WO2003088260A1/en active Application Filing
- 2003-02-14 AU AU2003219772A patent/AU2003219772A1/en not_active Abandoned
- 2003-02-14 JP JP2003585103A patent/JP2005522817A/ja active Pending
- 2003-02-14 DE DE10392492.2T patent/DE10392492B4/de not_active Expired - Lifetime
- 2003-02-14 GB GB0420863A patent/GB2401971B/en not_active Expired - Fee Related
- 2003-03-28 TW TW092107070A patent/TWI286754B/zh active
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2007080476A (ja) * | 2005-09-09 | 2007-03-29 | Macronix Internatl Co Ltd | 不揮発性メモリセルの過剰消去を保護する方法および装置 |
WO2007069321A1 (ja) * | 2005-12-15 | 2007-06-21 | Spansion Llc | 不揮発性記憶装置、および不揮発性記憶装置の制御方法 |
US7372743B2 (en) | 2005-12-15 | 2008-05-13 | Spansion, Llc | Controlling a nonvolatile storage device |
JPWO2007069321A1 (ja) * | 2005-12-15 | 2009-05-21 | スパンション エルエルシー | 不揮発性記憶装置、および不揮発性記憶装置の制御方法 |
JP2007226952A (ja) * | 2006-02-22 | 2007-09-06 | Samsung Electronics Co Ltd | メモリセル間のカップリングノイズを低減させる3−レベル不揮発性半導体メモリ装置およびその駆動方法 |
Also Published As
Publication number | Publication date |
---|---|
KR100935948B1 (ko) | 2010-01-12 |
CN100538897C (zh) | 2009-09-09 |
DE10392492B4 (de) | 2018-03-01 |
WO2003088260A1 (en) | 2003-10-23 |
GB0420863D0 (en) | 2004-10-20 |
GB2401971B (en) | 2005-06-22 |
US6690602B1 (en) | 2004-02-10 |
CN1647213A (zh) | 2005-07-27 |
GB2401971A (en) | 2004-11-24 |
TWI286754B (en) | 2007-09-11 |
KR20040097313A (ko) | 2004-11-17 |
AU2003219772A1 (en) | 2003-10-27 |
DE10392492T5 (de) | 2005-05-12 |
TW200306577A (en) | 2003-11-16 |
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