JP2005318582A - パイプラインadc較正方法およびその装置 - Google Patents
パイプラインadc較正方法およびその装置 Download PDFInfo
- Publication number
- JP2005318582A JP2005318582A JP2005118765A JP2005118765A JP2005318582A JP 2005318582 A JP2005318582 A JP 2005318582A JP 2005118765 A JP2005118765 A JP 2005118765A JP 2005118765 A JP2005118765 A JP 2005118765A JP 2005318582 A JP2005318582 A JP 2005318582A
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- JP
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- Prior art keywords
- analog
- digital conversion
- pipeline
- digital
- conversion module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000006243 chemical reaction Methods 0.000 claims abstract description 68
- 238000012937 correction Methods 0.000 claims abstract description 33
- 238000011156 evaluation Methods 0.000 claims abstract description 11
- 230000000694 effects Effects 0.000 claims description 4
- 238000012546 transfer Methods 0.000 description 21
- 102100021851 Calbindin Human genes 0.000 description 5
- 101000898082 Homo sapiens Calbindin Proteins 0.000 description 5
- 101001021643 Pseudozyma antarctica Lipase B Proteins 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000009966 trimming Methods 0.000 description 1
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- Analogue/Digital Conversion (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2004100420875A CN100527630C (zh) | 2004-04-30 | 2004-04-30 | 额外模数转换模块校正流水线式模数转换器的方法及装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005318582A true JP2005318582A (ja) | 2005-11-10 |
| JP2005318582A5 JP2005318582A5 (enExample) | 2008-05-29 |
Family
ID=35346699
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005118765A Pending JP2005318582A (ja) | 2004-04-30 | 2005-04-15 | パイプラインadc較正方法およびその装置 |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP2005318582A (enExample) |
| CN (1) | CN100527630C (enExample) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7554470B2 (en) | 2006-11-06 | 2009-06-30 | Samsung Electronics Co., Ltd. | Self-calibrating pipeline analog-to-digital converter and method of calibrating a pipeline analog-to-digital converter |
| WO2011021260A1 (ja) * | 2009-08-18 | 2011-02-24 | パナソニック株式会社 | パイプライン型ad変換器およびその出力補正方法 |
| KR101287097B1 (ko) | 2012-01-17 | 2013-07-16 | 서강대학교산학협력단 | 채널 간 부정합 문제를 최소화한 4채널 파이프라인 sar adc |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101888246B (zh) * | 2010-06-30 | 2012-12-19 | 中国电子科技集团公司第五十八研究所 | 具有误差校准功能的电荷耦合流水线模数转换器 |
| CN110336561B (zh) * | 2019-07-05 | 2021-02-05 | 中国电子科技集团公司第二十四研究所 | 一种流水线型模数转换器及其输出校正方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244724A (ja) * | 1991-08-15 | 1994-09-02 | Texas Instr Inc <Ti> | 伝達関数を物理的に実現するシステム及びそのシステムを具現する方法 |
| JP2000209092A (ja) * | 1999-01-18 | 2000-07-28 | Yokogawa Electric Corp | カスケ―ドa/d変換器 |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5499027A (en) * | 1994-02-24 | 1996-03-12 | Massachusetts Institute Of Technology | Digitally self-calibrating pipeline analog-to-digital converter |
| US6369744B1 (en) * | 2000-06-08 | 2002-04-09 | Texas Instruments Incorporated | Digitally self-calibrating circuit and method for pipeline ADC |
| US6563445B1 (en) * | 2001-11-28 | 2003-05-13 | Analog Devices, Inc. | Self-calibration methods and structures for pipelined analog-to-digital converters |
-
2004
- 2004-04-30 CN CNB2004100420875A patent/CN100527630C/zh not_active Expired - Lifetime
-
2005
- 2005-04-15 JP JP2005118765A patent/JP2005318582A/ja active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH06244724A (ja) * | 1991-08-15 | 1994-09-02 | Texas Instr Inc <Ti> | 伝達関数を物理的に実現するシステム及びそのシステムを具現する方法 |
| JP2000209092A (ja) * | 1999-01-18 | 2000-07-28 | Yokogawa Electric Corp | カスケ―ドa/d変換器 |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7554470B2 (en) | 2006-11-06 | 2009-06-30 | Samsung Electronics Co., Ltd. | Self-calibrating pipeline analog-to-digital converter and method of calibrating a pipeline analog-to-digital converter |
| WO2011021260A1 (ja) * | 2009-08-18 | 2011-02-24 | パナソニック株式会社 | パイプライン型ad変換器およびその出力補正方法 |
| KR101287097B1 (ko) | 2012-01-17 | 2013-07-16 | 서강대학교산학협력단 | 채널 간 부정합 문제를 최소화한 4채널 파이프라인 sar adc |
Also Published As
| Publication number | Publication date |
|---|---|
| CN1691516A (zh) | 2005-11-02 |
| CN100527630C (zh) | 2009-08-12 |
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