JP2005164891A - Pixel circuit and its driving method, active matrix system, and display arrangement - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide constitution in which an input signal is never caused to decrease in gain for a pixel circuit with an added function of compensating characteristic variation of a load element and variation in threshold of a transistor. <P>SOLUTION: A threshold canceling circuit detects the threshold of a drive transistor 111 in advance and makes an additional hold capacitor C112 holds a potential needed to cancel its influence. A bootstrap circuit detects characteristic variation of a load element 117 and automatically adjust the level of the signal potential held by the hold capacitor C11 so that its influence is canceled. A sampling transistor 115 writes a signal Vsig inputted from a signal line DTL101 directly to the hold capacitor C111 not through coupling between the additional hold capacity C112 and a capacitor component including the gate capacitance of the drive transistor 111. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a pixel circuit that current-drives a load element arranged for each pixel. The present invention also relates to a matrix device in which the pixel circuits are arranged in a matrix, and particularly to a so-called active matrix device in which the amount of current flowing to a load element is controlled by an insulated gate field effect transistor provided in each pixel circuit. Furthermore, the present invention relates to an active matrix display device having an electro-optic element whose luminance is controlled by a current value such as an organic EL as a load element.

  In an image display device such as a liquid crystal display, an image is displayed by arranging a large number of liquid crystal pixels in a matrix and controlling the transmission intensity or reflection intensity of incident light for each pixel in accordance with image information to be displayed. This also applies to an organic EL display using an organic EL element as a pixel, but unlike a liquid crystal pixel, the organic EL element is a self-luminous element. Therefore, the organic EL display has advantages such as higher image visibility than the liquid crystal display, no backlight, and a high response speed. Further, the luminance level (gradation) of each light emitting element can be controlled by the value of the current flowing therethrough, and is greatly different from a liquid crystal display or the like in that it is a so-called current control type.

In the organic EL display, similarly to the liquid crystal display, there are a simple matrix method and an active matrix method as driving methods. Although the former has a simple structure, there is a problem that it is difficult to realize a large-sized and high-definition display. Therefore, the active matrix method is actively developed at present. In this method, a current flowing through a light emitting element in each pixel circuit is controlled by an active element (generally a thin film transistor or TFT) provided in the pixel circuit.
USP 5,684,365 JP-A-8-234683

  FIG. 15 is a block diagram showing a configuration of a general organic EL display device. The display device 100 includes a pixel array unit 102 in which pixel circuits (PXLC) 101 are arranged in an m × n matrix, a horizontal selector (HSEL) 103, a write scanner (WSCN) 104, a drive scanner (DSCN1) 105, a horizontal The signal lines DTL101 to DTL10n selected by the selector 103 and supplied with signals according to the luminance information, the scanning lines WSL101 to WSL10m selectively driven by the write scanner 104, and the scanning lines DSL101 to DSL10m selectively driven by the drive scanner 105 are displayed. Have.

  FIG. 16 is a circuit diagram showing a configuration example of the pixel circuit shown in FIG. As shown in the figure, the pixel circuit 101 is basically composed of a p-channel thin film field effect transistor (hereinafter referred to as TFT). That is, the pixel circuit 101 includes a drive TFT 111, a switching TFT 112, a sampling TFT 115, an organic EL element 117, and a storage capacitor C111. The pixel circuit 101 having such a configuration is arranged at an intersection between the signal line DTL101 and the scanning lines WSL101 and DSL101. The signal line DTL101 is connected to the drain of the sampling TFT 115, the scanning line WSL101 is connected to the gate of the sampling TFT 115, and the other scanning line DSL101 is connected to the gate of the switching TFT 112.

  The drive TFT 111, the switching TFT 112, and the organic EL element 117 are connected in series between the power supply potential Vcc and the ground potential GND. That is, the source of the drive transistor 111 is connected to the power supply potential Vcc, while the cathode of the organic EL element (light emitting element) 117 is connected to the ground potential GND. In general, the organic EL element 117 is represented by a diode symbol because of its rectifying property. On the other hand, the sampling TFT 115 and the storage capacitor C111 are connected to the gate of the drive TFT111. The gate-source voltage of the drive TFT 111 is represented by Vgs.

  The operation of the pixel circuit 101 is as follows. First, when the scanning line WSL101 is selected (low level here) and a signal is applied to the signal line DTL101, the sampling TFT 115 is turned on and the signal is written into the holding capacitor C111. The signal potential written in the storage capacitor C111 becomes the gate potential of the drive transistor 111. Subsequently, when the scanning line WSL101 is in a non-selected state (here, high level), the signal line DTL101 and the drive TFT 111 are electrically disconnected, but the gate potential Vgs of the drive TFT 111 is stably held by the holding capacitor C111. . Subsequently, when another scanning line DSL101 is selected (here, at a low level), the switching TFT 112 becomes conductive, and a drive current flows through the TFT 111, TFT 112, and the light emitting element 117 from the power supply potential Vcc toward the ground potential GND. When the DSL 101 is in a non-selected state, the switching transistor 112 is turned off and the driving current does not flow. The switching TFT 112 is inserted to control the light emission time of the light emitting element 117.

  The current flowing through the TFT 111 and the light emitting element 117 has a value corresponding to the gate-source voltage Vgs of the TFT 111, and the light emitting element 117 continues to emit light with a luminance corresponding to the current value. The operation of selecting the scanning line WSL101 and transmitting the signal given to the signal line DTL101 to the inside of the pixel circuit 101 as described above is hereinafter referred to as “writing”. As described above, once a signal is written, the light emitting element 117 continues to emit light at a constant luminance until the next rewriting.

  As described above, in the pixel circuit 101, the value of the current flowing through the EL light emitting element 117 is controlled by changing the gate application voltage of the TFT 111 serving as the drive transistor in accordance with the input signal. At this time, the source of the p-channel type drive transistor 111 is connected to the power supply potential Vcc, and the TFT 111 always operates in the saturation region. Therefore, the drive transistor 111 is a constant current source having a value represented by the following formula (1).

Ids = (1/2) · μ · (W / L) · Cox · (Vgs−Vth) ² (1)
Here, Ids represents a current flowing between the drain and source of a transistor operating in the saturation region. Further, μ represents mobility, W represents channel width, L represents channel length, Cox represents gate capacitance, and Vth represents a threshold voltage of the transistor. As apparent from the equation (1), in the saturation region, the drain current Ids of the transistor is controlled by the gate-source voltage Vgs. Since the drive transistor 111 shown in FIG. 16 maintains Vgs constant, the drive transistor 111 operates as a constant current source, and the light emitting element 117 can emit light with constant luminance.

  FIG. 17 is a graph showing a change with time of current-voltage (IV) characteristics of the organic EL element. In the graph, the curve indicated by the solid line indicates the characteristic in the initial state, and the curve indicated by the broken line indicates the characteristic after change with time. Generally, the IV characteristic of an organic EL element deteriorates over time as shown in the graph. On the other hand, in the pixel circuit shown in FIG. 16, since the drive transistor is driven at a constant current, the constant current Ids continues to flow through the organic EL element, and the IV characteristic of the organic EL element deteriorates. The light emission luminance does not deteriorate with time.

  The pixel circuit shown in FIG. 16 is configured by a p-channel TFT. However, if the pixel circuit can be configured by an n-channel TFT, a conventional amorphous silicon (a-Si) process can be used for TFT fabrication. It becomes possible. As a result, the cost of the TFT substrate can be reduced, and development is expected.

  FIG. 18 is a circuit diagram showing a configuration in which the p-channel TFT of the pixel circuit shown in FIG. 16 is replaced with an n-channel TFT. As shown in the figure, the pixel circuit 101 includes n-channel TFTs 111, 112, and 115, a storage capacitor C111, and an organic EL element 117 that is a light emitting element. The TFT 111 is a drive transistor, the TFT 112 is a switching transistor, and the TFT 115 is a sampling transistor. In the figure, DTL 101 represents a signal line, and DSL 101 and WSL 101 represent scanning lines, respectively. In the pixel circuit 101, the drain side of the TFT 111 as a drive transistor is connected to the power supply potential Vcc, and the source is connected to the anode of the EL element 117, thereby forming a source follower circuit.

  FIG. 19 is a timing chart for explaining the operation of the pixel circuit shown in FIG. When a selection pulse is applied to the scanning line WSL101, the sampling transistor 115 is turned on, samples a signal from the signal line DTL101, and writes it to the storage capacitor C111. As a result, the gate potential of the drive transistor 111 is held at the sampled signal potential. This sampling operation is performed line-sequentially. That is, after a selection pulse is applied to the first scanning line WSL101, a selection pulse is subsequently applied to the second scanning line WSL102, and pixels for one row are selected every one horizontal period (1H). To go. Since the DSL 101 is selected simultaneously with the selection of the WSL 101, the switching transistor 112 is turned on. As a result, a drive current flows through the light emitting element via the drive transistor 111 and the switching transistor 112, so that light is emitted. In the middle of one field period (1f), the DSL 101 is in a non-selected state, and the switching transistor 112 is turned off. As a result, the light emission stops. The scanning line DSL101 controls the light emission time (duty) in one field period.

  Here, FIG. 20A is a graph showing operating points of the drive transistor 111 and the EL element 117 in the initial state. In the figure, the horizontal axis represents the drain-source voltage Vds of the drive transistor 111, and the vertical axis represents the drain-source current Ids. As illustrated, the source potential is determined by the operating point of the drive transistor 111 and the EL element 117, and the voltage value varies depending on the gate voltage. Since the drive transistor 111 is driven in the saturation region, the drive current Ids having the current value defined in the above-described equation (1) is supplied with respect to Vgs corresponding to the source voltage at the operating point.

  However, the IV characteristic of the EL element deteriorates with time as described above. As shown in (B), the operating point changes due to the deterioration over time, and the source voltage of the transistor changes even when the same gate voltage is applied. As a result, the gate-source voltage Vgs of the drive transistor 111 changes, and the flowing current value fluctuates. At the same time, the value of current flowing through the EL element 117 also changes. As described above, when the IV characteristic of the EL element 117 changes, the pixel circuit having the source follower configuration shown in FIG. 18 has a problem that the light emission luminance of the organic EL element changes with time.

  In order to avoid the above problem, it may be possible to reverse the arrangement of the drive transistor 111 and the EL element 117. That is, a circuit configuration in which the source of the drive transistor 111 is connected to the ground potential GND, the drain is connected to the cathode of the EL element 117, and the anode of the EL element 117 is connected to the power supply potential Vcc is also conceivable. In this system, as in the pixel circuit having the p-channel TFT configuration shown in FIG. 16, the source potential is fixed, and the drive transistor 111 is driven as a constant current source, which is caused by deterioration of the IV characteristics of the EL element. Changes in brightness can also be prevented. However, in this method, it is necessary to connect the drive transistor to the cathode side of the EL element, and this cathode connection requires the development of a new anode electrode and cathode electrode, which is considered to be very difficult with the current technology. Yes. As described above, an organic EL display using an n-channel transistor that does not change in luminance in the conventional method has not been put into practical use.

  In the active matrix organic EL display, in addition to fluctuations in the characteristics of the EL elements, the threshold voltage of the n-channel TFT constituting the pixel circuit also changes over time. As is clear from the above equation (1), when the threshold voltage Vth of the drive transistor fluctuates, the drain current Ids changes. Thereby, even if the same gate voltage Vgs is given, there is a problem that the light emission luminance changes due to the variation of Vth.

  In view of the above-described problems of the related art, the present invention provides a pixel circuit that can maintain constant light emission luminance even when the IV characteristic of a current-driven load element such as a light-emitting element changes with time. This is a general purpose. It is another general object of the present invention to provide a pixel circuit that can stably drive a load element even when a threshold voltage of a transistor constituting the pixel circuit changes with time. In addition, in the pixel circuit to which the compensation function for the load element characteristic variation and the compensation function for the threshold voltage variation of the transistor are added, in particular, the pixel circuit configuration that does not cause a decrease in the gain of the input signal regardless of the addition of the compensation function. It is a specific object to provide a pixel circuit driving method.

  In order to achieve this purpose, the following measures were taken. That is, a pixel circuit individually disposed at a portion where a row-shaped scanning line and a column-shaped signal line intersect with each other, and includes a load element, a storage capacitor, a sampling transistor, and a drive transistor, and the sampling transistor Operates when selected by the scanning line, samples the input signal from the signal line and holds it in the holding capacitor, and the drive transistor sets the load element in accordance with the signal potential held in the holding capacitor. The pixel circuit for current driving includes a threshold voltage cancel circuit, an additional storage capacitor, and a bootstrap circuit. The threshold voltage cancel circuit detects the threshold voltage of the drive transistor in advance of current driving of the load element. The potential required to cancel the influence is held in the additional holding capacitor, and the drive transistor The bootstrap circuit detects a change in characteristics of the load element during current driving of the load element, and sets the level of the signal potential held in the holding capacitor so as to cancel the influence. A bootstrap operation that automatically adjusts is performed, and the sampling transistor combines a signal input from the signal line during the sampling operation with a capacitance component including the additional storage capacitor and the gate capacitance of the drive transistor. It is characterized in that the data is directly written in the storage capacitor without any intervention.

  Specifically, one end of the holding capacitor can be connected to a ground potential, while the other end is connected to the sampling transistor to hold the input signal, and one end of the additional holding capacitor is connected to the gate of the drive transistor. The other end is connected in series with the holding capacitor. The threshold voltage cancel circuit includes first and second switching transistors. The first switching transistor has a source / drain connected between the drain and gate of the drive transistor, and a second switching transistor. The transistor has a source / drain connected between the source of the drive transistor and one end of the additional storage capacitor, and the other end of the additional storage capacitor connected to the gate of the drive transistor. The bootstrap circuit includes a switching transistor, the source of which is grounded, the drain of which is connected to the connection node of the drive transistor and the load element and the storage capacitor, and is turned on at the time of sampling to hold the switching transistor. While one end of the capacitor is fixed to the ground level, it is turned off during the bootstrap operation, and one end of the storage capacitor is set to the level of the connection node. Preferably, the load element is an organic EL element that emits light by current driving. The sampling transistor and the drive transistor are N-type thin film transistors.

  The present invention also provides an active matrix device comprising a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where they intersect, each pixel having a load element, a holding element A capacitor, a sampling transistor, and a drive transistor. The sampling transistor operates when selected by the scan line, samples an input signal from the signal line, and holds the input signal in the holding capacitor. The load element is current-driven according to the signal potential held in the holding capacitor, and the pixel further includes a threshold voltage canceling circuit, an additional holding capacitor, and a bootstrap circuit, and the threshold voltage canceling circuit includes the threshold voltage canceling circuit. Necessary for detecting the threshold voltage of the drive transistor and canceling the influence in advance prior to the current drive of the load element. Is held in the additional holding capacitor and applied to the gate of the drive transistor, and the bootstrap circuit detects a characteristic variation of the load element when the load element is driven and cancels the influence thereof. Similarly, the bootstrap operation for automatically adjusting the level of the signal potential held in the holding capacitor is performed, and the sampling transistor receives the signal input from the signal line during the sampling operation as the additional holding capacitor. In addition, it is characterized in that data is directly written in the storage capacitor without being coupled with a capacitive component including the gate capacitance of the drive transistor.

  Furthermore, the present invention is a display device comprising a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where they intersect, each pixel having an electro-optic element and a holding device A capacitor, a sampling transistor, and a drive transistor. The sampling transistor operates when selected by the scanning line, samples a video signal from the signal line, and holds the video signal in the holding capacitor. The electro-optic element is driven according to the signal potential held in the holding capacitor to display an image corresponding to the video signal, and the pixel further includes a threshold voltage cancel circuit, an additional holding capacitor, and a bootstrap circuit. The threshold voltage canceling circuit detects the threshold voltage of the drive transistor prior to driving the electro-optic element, and previously compensates for the effect. A potential necessary for cell holding is held in the additional holding capacitor and applied to the gate of the drive transistor, and the bootstrap circuit changes the characteristic variation of the electro-optic element when the electro-optic element is driven. Detecting and performing a bootstrap operation for automatically adjusting the level of the signal potential held in the storage capacitor so as to cancel the influence, and the sampling transistor is input from the signal line during the sampling operation The video signal is directly written to the storage capacitor without being coupled to the additional storage capacitor and the capacitive component including the gate capacitance of the drive transistor.

  In addition, the present invention is a pixel circuit individually arranged at a portion where a row-shaped scanning line and a column-shaped signal line intersect, and includes a load element, a storage capacitor, a sampling transistor, and a drive transistor. The sampling transistor operates when selected by the scanning line, samples the input signal from the signal line and holds it in the holding capacitor, and the drive transistor responds to the signal potential held in the holding capacitor. In the driving method of the pixel circuit for driving the load element by current, the threshold voltage of the drive transistor is detected prior to current driving of the load element, and a potential necessary for canceling the influence is held in the additional holding capacitor in advance. The threshold voltage canceling procedure applied to the gate of the drive transistor and the characteristic change of the load element during current driving of the load element A bootstrap procedure for performing a bootstrap operation that automatically adjusts the level of the signal potential held in the storage capacitor so as to cancel the influence, and a signal input from the signal line during the sampling operation. And a writing procedure for directly writing to the storage capacitor without coupling to the additional storage capacitor and a capacitive component including the gate capacitance of the drive transistor.

  According to the present invention, the pixel circuit includes a threshold voltage cancel circuit and a bootstrap circuit around the drive transistor. The threshold voltage cancel circuit detects the threshold voltage of the drive transistor prior to the current drive of the load element, holds the potential necessary for canceling the influence in advance in the additional holding capacitor, and applies it to the gate of the drive transistor. Yes. Thereby, even if the threshold voltage of the drive transistor changes with time, the load element can be driven stably. In addition, the bootstrap circuit detects fluctuations in the current driving characteristics of the load element and automatically adjusts the level of the signal potential held in the holding capacitor so as to cancel the influence. As a result, it is possible to compensate for the characteristic variation with time of the load element. Further, the signal input from the signal line is directly written into the storage capacitor without being coupled to the additional storage capacitor and the capacitive component including the gate capacitance of the drive transistor. As a result, even if the pixel circuit configuration incorporates the load element characteristic variation compensation function and the drive transistor threshold voltage variation compensation function, the gain of the input video signal does not decrease. Accordingly, since the input amplitude of the video signal can be suppressed, not only power consumption can be saved, but also development of a high-voltage video signal driver is not required, so that the cost can be reduced.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. For convenience of explanation, a pixel circuit having a characteristic variation compensation function (bootstrap function) of a light emitting element that is a load element will be described first, followed by a pixel circuit having a drive transistor threshold voltage variation compensation function added, Finally, a pixel circuit configuration for suppressing the gain reduction of the input video signal while having these compensation functions will be described. FIG. 1 is a block diagram illustrating a configuration of a display device including a pixel circuit having a bootstrap function that is a compensation function for characteristic variation of a light-emitting element that is an electro-optical element. This pixel circuit configuration is the same as that described in Japanese Patent Application No. 2003-146758 (filed on May 23, 2003), which is a prior application of the same applicant.

  As shown in FIG. 1, the display device 100 includes a pixel array unit 102 in which pixel circuits (PXLC) 101 are arranged in a matrix, a horizontal selector (HSEL) 103, a write scanner (WSCN) 104, and a drive scanner (DSCN1) 105. The signal lines DTL101 to DT110n selected by the horizontal selector 103 and supplied with video signals according to the luminance information, the scanning lines WSL101 to WSL10m selectively driven by the write scanner 104, and the drive line DSL101 selectively driven by the drive scanner 105 ~ DSL 10m. Note that FIG. 1 shows a specific configuration of one pixel circuit for simplification of the drawing.

  As shown in FIG. 1, the pixel circuit 101 includes n-channel TFTs 111 to 115, a capacitor C111, a light emitting element 117 composed of an organic EL element (OLED: electro-optical element), and nodes ND111 and ND112. In FIG. 1, DTL 101 indicates a signal line, WSL 101 indicates a scanning line, and DSL 101 indicates a drive line. Among these components, the TFT 111 constitutes a driving field effect transistor, the sampling TFT 115 constitutes a first switch, the TFT 114 constitutes a second switch, and the capacitor C111 constitutes a storage capacitor element. Yes.

  In the pixel circuit 101, a light emitting element (OLED) 117 is connected between the source of the TFT 111 and the ground potential GND. Specifically, the anode of the light emitting element 117 is connected to the source of the TFT 111, and the cathode side is connected to the ground potential GND. A node ND 111 is configured by a connection point between the anode of the light emitting element 117 and the source of the TFT 111. The source of the TFT 111 is connected to the drain of the TFT 114 and the first electrode of the capacitor C111, and the gate of the TFT 111 is connected to the node ND112. The source of the TFT ll4 is connected to a fixed potential (ground potential GND in this embodiment), and the gate of the TFT 114 is connected to the drive line DSL101. The second electrode of the capacitor C111 is connected to the node ND112. The source and drain of the sampling TFT 115 are connected to the signal line DTL101 and the node ND112, respectively. The gate of the TFT 115 is connected to the scanning line WSL101.

  Thus, in the pixel circuit 101 according to the present embodiment, the capacitor C111 is connected between the gate and the source of the TFT 111 as the drive transistor, and the source potential of the TFT 111 is connected to the fixed potential via the TFT 114 as the switch transistor. It is configured.

  Next, the operation of the above configuration will be described with reference to FIGS. 2A to 2F and FIGS. 3A to 3F, focusing on the operation of the pixel circuit. 3A shows the scanning signal ws [1] applied to the first row scanning line WSL101 of the pixel array, and FIG. 3B shows the scanning signal WSL102 applied to the second row scanning line WSL102 of the pixel array. 3C shows a scanning signal ws [2] to be applied, FIG. 3C shows a driving signal ds [1] applied to the driving line DSL101 in the first row of the pixel array, and FIG. FIG. 3E shows the gate potential Vg (node ND112) of the TFT 111, and FIG. 3F shows the source potential Vs of the TFT 111 (node ND111). Respectively.

  First, when the normal EL light emitting element 117 is in the light emitting state, as shown in FIGS. 3A to 3D, scanning signals ws [1], ws from the light scanner 104 to the scanning lines WSL101, WSL102,. [2],... Are selectively set to the low level, and the drive signals ds [1], ds [2],... To the drive lines DSL101, DSL102,. Set to As a result, in the pixel circuit 101, as shown in FIG. 2A, the TFT 115 and the TFT 114 are held in an off state.

  Next, during the non-light emitting period of the EL light emitting element 117, as shown in FIGS. 3A to 3D, the scanning signals ws [1], ws [] from the light scanner 104 to the scanning lines WSL101, WSL102,. 2],... Are held at a low level, and the drive signals ds [1], ds [2],... To the drive lines DSL101, DSL102,. . As a result, in the pixel circuit 101, as shown in FIG. 2B, the TFT 114 is turned on while the TFT 115 is kept off. At this time, a current flows through the TFT 114, and as shown in FIG. 3F, the source potential Vs of the TFT 111 drops to the ground potential GND. Therefore, the voltage applied to the EL light emitting element 117 is also 0 V, and the EL light emitting element 117 does not emit light.

  Next, during the non-emission period of the EL light emitting element 117, as shown in FIGS. 3A to 3D, the drive scanner 105 supplies drive signals ds [1], ds [to the drive lines DSL101, DSL102,. The scanning signals ws [1], ws [2],... From the write scanner 104 to the scanning lines WSL101, WSL102,. Is done. As a result, in the pixel circuit 101, as shown in FIG. 2C, the TFT 115 is turned on while the TFT 114 is kept on. As a result, the input signal (Vin) propagated to the signal line DTL101 by the horizontal selector 103 is written into the capacitor C111 as a storage capacitor. At this time, as shown in FIG. 3 (F), the source potential Vs of the TFT 111 as the drive transistor is at the ground potential level (GND level). Therefore, as shown in FIGS. The potential difference between the gate and the source becomes equal to the voltage Vin of the input signal.

  Thereafter, during the non-light emitting period of the EL light emitting element 117, as shown in FIGS. 3A to 3D, drive signals ds [1], ds [2] to the drive lines DSL101, DSL102,. The scanning signals ws [1], ws [2],... From the write scanner 104 to the scanning lines WSL101, WSL102,... Are selectively set to the low level while being held at the high level. The As a result, in the pixel circuit 101, as shown in FIG. 2D, the TFT 115 is turned off, and writing of the input signal to the capacitor C111 as a storage capacitor is completed.

  Thereafter, as shown in FIGS. 3A to 3D, the scanning signals ws [1], ws [2],... From the light scanner 104 to the scanning lines WSL101, WSL102,. The drive scanner 105 selectively sets the drive signals ds [1], ds [2],... To the drive lines DSL101, DSL102,. As a result, in the pixel circuit 101, the TFT 114 is turned off as illustrated in FIG. When the TFT 114 is turned off, as shown in FIG. 3F, the source potential Vs of the TFT 111 as a drive transistor rises, and a current also flows through the EL light emitting element 117.

  Although the source potential Vs of the TFT 111 fluctuates, there is a capacitance between the gate and source of the TFT 111, so that the gate-source potential is always Vin as shown in FIGS. It is kept. At this time, since the TFT 111 as the drive transistor is driven in the saturation region, the current value Ids flowing through the TFT 111 is determined by Vin which is the gate-source voltage of the TFT 111. This current Ids also flows in the EL light emitting element 117 in the same manner, and the EL light emitting element 117 emits light. Since the equivalent circuit of the EL light emitting element 117 is as shown in FIG. 2F, at this time, the potential of the node ND111 rises to the gate potential through which the current Ids flows in the EL light emitting element 117. As the potential rises, the potential of the node ND112 similarly rises through the capacitor 111 (retention capacitor). As a result, the gate / source potential of the TFT 111 is kept at Vin as described above.

  Here, in general, the EL characteristics of the EL light emitting element deteriorate as the light emission time becomes longer. Therefore, even if the drive transistor passes the same current value, the potential applied to the EL light emitting element changes, and the potential of the node ND111 decreases. However, in this circuit, since the potential of the node ND111 decreases while the gate-source potential of the drive transistor is kept constant, the current flowing through the drive transistor (TFT 111) does not change. Therefore, the current flowing through the EL light emitting element does not change, and a current corresponding to the input voltage Vin continues to flow even if the IV characteristics of the EL light emitting element deteriorate.

  As described above, according to the present embodiment, the source of the TFT 111 as the drive transistor is connected to the anode of the light emitting element 117, the drain is connected to the power supply potential Vcc, and the capacitor C111 is connected between the gate and source of the TFT 111. In addition, since the source potential of the TFT 111 is connected to the fixed potential via the TFT 114 as a switch transistor, the following effects can be obtained. That is, even if the IV characteristic of the EL light emitting element changes with time, a source follower output without luminance deterioration can be performed. A source follower circuit of an n-channel transistor becomes possible, and the n-channel transistor can be used as a drive element of an EL light-emitting element while using the current anode / cathode electrodes. In addition, the transistor of the pixel circuit can be configured with only the n channel, and the a-Si process can be used in the TFT formation. Thereby, the cost of the TFT substrate can be reduced.

  FIG. 4 shows a pixel circuit configuration in which a threshold voltage canceling function is further added to the pixel circuit having the bootstrap function shown in FIG. This pixel circuit is the same as that described in Japanese Patent Application No. 2003-159646 (filed on June 4, 2003), which is a prior application of the same applicant. For easy understanding, portions corresponding to those of the pixel circuit shown in FIG. The pixel circuit of FIG. 4 is basically obtained by adding a threshold voltage cancel circuit to the pixel circuit of FIG. However, the gate of the switching transistor 114 included in the bootstrap circuit is connected to the scanning line WSL101 in place of the drive line DSL101 to simplify the circuit. Basically, the switching transistor 114 included in the bootstrap circuit may be controlled to open and close in accordance with the sampling of the video signal, and thus such simplification is possible. Of course, a dedicated drive line DSL101 may be separately connected to the gate of the switching transistor 114 as in the example of FIG.

  The threshold voltage cancel circuit basically includes a drive transistor 111, a switching transistor 112, an additional switching transistor 113, and a storage capacitor C111. In addition to these, the pixel circuit includes a coupling capacitor C112 and a switching transistor. The source / drain of the added switching transistor 113 is connected between the gate and drain of the drive transistor 111. The drain of the switching transistor 116 is connected to the drain of the sampling transistor 115, and the source is supplied with the offset voltage Vofs. The coupling capacitor C112 is interposed between the node ND114 on the sampling transistor 115 side and the node ND112 on the drive transistor side. A scanning line AZL 101 for canceling a threshold voltage (Vth) is connected to the gates of the switching transistors 113 and 116.

  FIG. 5 is a timing chart for explaining the operation of the pixel circuit shown in FIG. This pixel circuit sequentially performs Vth correction, signal writing, and bootstrap operation during one field (1f). Vth correction and signal writing are performed during the non-light emission period of 1f, and the bootstrap operation is performed at the beginning of the light emission period. First, in the Vth correction period, the scanning line AZL101 rises to a high level while the scanning line DSL111 is at a high level. As a result, the switching transistors 112 and 113 are simultaneously turned on, so that a current flows and the potential of the node ND112 connected to the gate of the drive transistor 111 rises. Thereafter, the DSL 111 falls to a low level and enters a non-light emitting state. As a result, the charge accumulated in the node ND112 is discharged through the switching transistor 113, and the potential of the ND112 gradually decreases. When the potential difference between the node ND112 and the node ND111 becomes Vth, no current flows through the drive transistor 111. As is apparent from the figure, the potential difference between ND112 and ND111 corresponds to Vgs, and Ids becomes 0 when Vgs = Vth from equation (1). As a result, the potential difference Vth between ND112 and ND111 is held in the holding capacitor C111.

  Subsequently, the scanning line WSL101 becomes high level for 1H and the sampling transistor 115 becomes conductive, and signal writing is performed. That is, the video signal Vsig supplied to the DTL 101 is sampled by the sampling transistor 115 and written to the holding capacitor C111 via the coupling capacitor C112. As a result, the holding potential Vin of the holding capacitor C111 is the sum of the previously written Vth and Vsig. However, the input gain of Vsig is not 100%, and there is some loss.

  Thereafter, the DSL 111 rises to a high level and starts light emission, and a bootstrap operation is performed. As a result, the signal potential Vin applied to the gate of the drive transistor 111 rises by ΔV according to the ID characteristic of the light emitting element 117. In this manner, the pixel circuit of FIG. 4 adds Vth and ΔV in addition to the net signal component applied to the gate of the drive transistor 111. Even if Vth and ΔV change, the influence can always be canceled, so that the light emitting element 117 can be driven stably.

  Hereinafter, the configuration and operation of the display device including the pixel circuit shown in FIG. 4 will be described specifically and in detail with reference to FIGS. It is a block diagram which shows the structure of the organic electroluminescence display which employ | adopted the threshold voltage cancellation circuit in addition to the bootstrap circuit. FIG. 7 is a circuit diagram showing a specific configuration of the pixel circuit in the organic EL display device of FIG. In the embodiment of FIG. 4, the scanning line WSL101 is connected to the gate of the switching transistor 114 included in the bootstrap circuit in place of the drive line DSL101 to simplify the circuit. However, in this embodiment, the circuit is simplified. Without specialization, a dedicated drive line DSL101 is connected to the gate of the switching transistor 114 as in the example of FIG.

  As shown in FIGS. 6 and 7, the display device 100 includes a pixel array unit 102 in which pixel circuits (PXLC) 101 are arranged in an m × n matrix, a horizontal selector (HSEL) 103, and a light scanner (WSCN). 104, a first drive scanner (DSCN1) 105, a second drive scanner (DSCN2) 106, an auto zero circuit (AZRD) 107, and a signal line DTL101 to which a video signal selected by the horizontal selector 103 and supplied in accordance with luminance information is supplied. DT110n, scanning lines WSL101 to WSL10m selectively driven by the write scanner 104, driving lines DSL101 to DSL10m selectively driven by the first drive scanner 105, driving lines DSL111 to DSLllm selectively driven by the second drive scanner 106, And Having an auto-zero line AZL101~AZL10m which is selectively driven by a zeroed circuit 107.

  In the pixel array unit 102, the pixel circuits 101 are arranged in a matrix of m × n. However, in FIG. 6, in order to simplify the drawing, a matrix of 2 (= m) × 3 (= n) is used. An example of arrangement is shown. FIG. 7 also shows a specific configuration of one pixel circuit for simplification of the drawing.

  As shown in FIG. 7, the pixel circuit 101 according to the present embodiment includes n-channel TFTs 111 to 116, capacitors C111 and C112, a light emitting element 117 including an organic EL element (OLED: electro-optical element), and a first node ND111. , Second node ND112, third node NDll3, and fourth node ND114. In FIG. 7, DTL 101 indicates a signal line, WSL 101 indicates a scanning line, DSL 101 and DSL 111 indicate drive lines, and AZL 101 indicates an auto-zero line. Of these components, the TFT 111 constitutes a drive transistor, the TFT 112 constitutes a first switch, the TFT 113 constitutes a second switch, the TFT 114 constitutes a third switch, and the TFT 115 constitutes a fourth switch. A switch is constituted, the TFT 116 constitutes a fifth switch, the capacitor C111 constitutes a holding capacitor element, and the capacitor C112 constitutes a coupling capacitor element.

  In the pixel circuit 101, a TFT 112 as a first switch, a third node ND113, a TFT 111 as a drive transistor, a first node ND111, and a light emitting element (OLED) 117 are provided between the power supply potential Vcc and the ground potential GND. Are connected in series. Specifically, the cathode of the light emitting element 117 is connected to the ground potential GND, the anode is connected to the first node ND111, the source of the TFT 111 is connected to the first node ND111, and the drain of the TFT 111 is the third node. The source / drain of the TFT 112 is connected between the third node ND113 and the power supply potential Vcc. The gate of the TFT 111 is connected to the second node ND112, and the gate of the TFT 112 is connected to the drive line DSL111. The source / drain of the TFT 113 is connected between the second node ND112 and the third node ND113, and the gate of the TFT 113 is connected to the auto zero line AZL101. The drain of the TFT 114 is connected to the first node 111 and the first electrode of the capacitor C111, the source is connected to a fixed potential (ground potential GND in this embodiment), and the gate of the TFT 114 is connected to the drive line DSL101. The second electrode of the capacitor C111 is connected to the second node ND112. The first electrode of the capacitor C112 is connected to the second node ND112, and the second electrode is connected to the fourth node ND114. The source and drain of the TFT 115 as the fourth switch are connected to the signal line DTL101 and the fourth node ND114, respectively. The gate of the TFT 115 is connected to the scanning line WSL101. Further, the source and drain of the TFT 116 are connected between the fourth node ND114 and the predetermined potential Vofs. The gate of the TFT 116 is connected to the auto zero line AZL101.

  As described above, in the pixel circuit 101 according to the present embodiment, the capacitor C111 as the storage capacitor is connected between the gate and the source of the TFT 111 as the drive transistor, and the source potential of the TFT 111 is used as the switch transistor in the non-light emission period. The threshold value Vth is corrected by connecting to a fixed potential via the gate and connecting the gate and drain of the TFT 111.

  Next, the operation of the above configuration will be described with reference to FIGS. 8A to 8D and FIGS. 9A to 12B, focusing on the operation of the pixel circuit. 8A shows the scanning signal ws [1] applied to the scanning line WSL101 in the first row of the pixel array, and FIG. 8B shows the driving signal DSL101 applied in the first row of the pixel array. FIG. 8C shows the drive signal ds [1] applied to the drive line DSL111 in the first row of the pixel array, and FIG. 8D shows the first drive signal ds [1] of the pixel array. The auto-zero signal az [1] applied to the auto-zero line AZL101 in the row is shown. 8A to 8D, a period indicated by Te is a light emission period, a period indicated by Tne is a non-light emission period, Tvc is a cancellation period of the threshold Vth, and a period indicated by Tw is a writing period. It is a period.

  First, when the normal EL light emitting element 117 is in the light emitting state, as shown in FIGS. 8A to 8D, the scanning signal ws [1] from the light scanner 104 to the scanning line WSL101 is set to a low level. The drive scanner 105 sets the drive signal ds [1] to the drive line DSL101 to the low level, the autozero circuit 107 sets the autozero signal az [1] to the autozero line AZL101 to the low level, and the drive scanner 106 sets the drive line to the drive line DSL101. The drive signal ds [2] to the DSL 111 is selectively set to the high level. As a result, in the pixel circuit 101, as shown in FIG. 9A, the TFT 112 is held in an on state (conductive state), and the TFTs 113 to 116 are held in an off state (non-conductive state). The drive transistor 111 is designed to operate in a saturation region, and the current Ids flowing through the EL light emitting element 117 takes a value corresponding to the signal potential applied to the gate of the drive transistor 111.

  Next, in the non-light emitting period Tne of the EL light emitting element 117, as shown in FIGS. 8A to 8D, the scanning signal ws [1] from the light scanner 104 to the scanning line WSL101 is held at a low level. With the auto zero circuit 107, the auto zero signal az [1] to the auto zero line AZL101 is held at a low level, and the drive scanner 106 holds the drive signal ds [2] to the drive line DSL111 at a high level. By 105, the drive signal ds [1] to the drive line DSL101 is selectively set to the high level. As a result, in the pixel circuit 101, as shown in FIG. 9B, the TFT 114 is turned on while the TFT 112 is kept on, the TFT 113, the TFT 115, and the TFT 116 are kept off. At this time, a current flows through the TFT 114, and the source potential Vs of the TFT 111 falls to the ground potential GND. Therefore, the voltage applied to the EL light emitting element 117 is also 0 V, and the EL light emitting element 117 does not emit light. In this case, even if the TFT 114 is turned on, the voltage held in the capacitor C111, that is, the gate voltage of the TFT 111 does not change, so that the current Ids is the TFT 112, the third node ND113, as shown in FIG. , TFT 111, first node ND 111, and TFT 114.

  Next, in the non-light emitting period Tne of the EL light emitting element 117, as shown in FIGS. 8A to 8D, the scanning signal ws [1] from the light scanner 104 to the scanning line WSL101 is held at a low level. With the drive signal ds [1] to the drive line DSL101 held at the high level by the drive scanner 105, the autozero circuit az [1] to the autozero line AZL101 is set to the high level by the autozero circuit 107. As shown in FIG. 8C, the drive scanner 105 sets the drive signal ds [1] to the drive line DSL101 to a low level. As a result, in the pixel circuit 101, as shown in FIG. 10A, the TFT 114 and the TFT 116 are turned on and the TFT 1122 is turned off while the TFT 114 is kept on and the TFT 115 is kept off. At this time, since the gate and drain of the TFT 111 are connected via the TFT 113, the TFT 111 operates in the saturation region. Further, since the capacitors C111 and C112 are connected in parallel to the gate of the TFT 111, the gate-drain voltage Vgd of the TFT 111 gradually decreases with time as shown in FIG. Then, after a certain time has elapsed, the gate-source voltage Vgs of the TFT 111 becomes the threshold voltage Vth of the TFT 111. At this time, the capacitor C112 is charged with (Vofs−Vth), and the capacitor C111 is charged with Vth.

  Next, as shown in FIGS. 8A to 8D, the scanning signal ws [1] from the write scanner 104 to the scanning line WSL101 is held at a low level, and the drive scanner 105 drives the driving signal to the driving line DSL101. In a state where ds [1] is held at a high level and the drive signal ds [2] to the drive line DSL111 is held at a low level by the drive scanner 106, the autozero signal az [1] to the autozero line AZL101 by the autozero circuit 107. ] Is set to a low level, and then the drive signal ds [2] to the drive line DSL111 is set to a high level by the drive scanner 106, as shown in FIG. 8C. As a result, in the pixel circuit 101, as shown in FIG. 11A, the TFT 114 and the TFT 116 are turned off and the TFT 112 is turned on while the TFT 114 is kept on and the TFT 115 is kept off. As a result, the drain voltage of the TFT 111 becomes the power supply voltage Vcc.

Next, as shown in FIGS. 8A to 8D, in the writing period Tw, the drive scanner 105 holds the drive signal ds [1] to the drive line DSL101 at a high level, and the drive scanner 106 drives the drive line DSL111. Drive signal ds [2] is held at a high level, and auto-zero circuit 107 scans scanning line WSL101 from light scanner 104 while auto-zero signal az [1] to auto-zero line AZL101 is held at a low level. The signal ws [1] is set to the high level. As a result, in the pixel circuit 101, as illustrated in FIG. 11B, the TFT 115 is turned on while the TFT 114 and the TFT 112 are kept on and the TFT 113 and the TFT 116 are kept off. As a result, the input voltage Vin propagated through the signal line DTL101 via the TFT 115 is input, and the voltage change amount ΔV of the node ND114 is coupled to the gate of the TFT 111. At this time, the gate voltage Vg of the TFT 111 has a value of Vth, and the coupling amount ΔV is determined by the following expression by the capacitance value C1 of the capacitor C111, the capacitance value C2 of the capacitor C112, and the parasitic capacitance C3 of the TFT 111. The
ΔV = {C2 / (C1 + C2 + C3)} · (Vin−Vofs)

  Therefore, if C1 and C2 are sufficiently larger than C3, the amount of coupling to the gate is determined only by the capacitance value C1 of the capacitor C111 and the capacitance value C2 of the capacitor C112. Since the TFT 111 is designed to operate in the saturation region, a current Ids corresponding to the amount of voltage coupled to the gate of the TFT 111 flows as shown in FIGS. 11B and 12A.

  After the completion of writing, as shown in FIGS. 8A to 8D, the drive signal ds [2] to the drive line DSL111 is held at a high level by the drive scanner 106, and auto-zero to the auto-zero line AZL101 by the auto-zero circuit 107. While the signal az [1] is held at the low level, the scanning signal ws [1] from the write scanner 104 to the scanning line WSL101 is set to the low level, and then the drive scanner 105 drives the driving signal to the driving line DSL101. ds [1] is set to a low level. As a result, in the pixel circuit 101, as shown in FIG. 12B, the TFT 112 is turned off and the TFT 114 is turned off while the TFT 112 is kept on and the TFT 113 and the TFT 116 are kept off. In this case, since the gate-source voltage of the TFT 111 is constant even when the TFT 114 is turned off, the TFT 111 passes a constant current Ids to the EL light emitting element 117. Accordingly, the potential of the first node ND111 rises to the voltage Vx through which the current Ids flows in the EL light emitting element 117, and the EL light emitting element 117 emits light. Here, in this circuit as well, the EL element changes its current-voltage (IV) characteristic when the light emission time becomes long. Therefore, the potential of the first node ND111 also changes. However, since the gate-source voltage Vgs of the TFT 111 is maintained at a constant value, the current flowing through the EL light emitting element 117 does not change. Therefore, even if the IV characteristic of the EL light emitting element 117 deteriorates, the constant current Ids always flows, and the luminance of the EL light emitting element 117 does not change.

The above is the detailed description of the pixel circuit including the bootstrap circuit and the threshold voltage cancel circuit. As is clear from this description, the pixel circuit of FIG. 4 having the bootstrap circuit and the threshold voltage cancel circuit can drive the EL element with a constant current even if the drive transistor is an N channel, and the I-V of the EL element can be driven. Luminance fluctuations due to changes in characteristics over time and changes in drive transistor threshold voltage over time could be prevented. However, since the pixel circuit of FIG. 4 has a configuration in which the sampling transistor side and the drive transistor side are connected via the coupling capacitor C112, there is a drawback that the gain of the video signal Vsig is lowered. Since Vsig is written into the storage capacitor C111 via the coupling capacitor C112, the gate voltage ΔVg applied to the gate of the drive transistor is expressed by the following equation.
ΔVg = (C2 / (C1 + C2)) × (Vsig−Vofs)
As is clear from the above equation, for example, when C1 and C2 are equal, ΔVg becomes half of Vsig, and the gain of the video signal falls. In order to compensate for this, an input video signal having a large amplitude is required. For this reason, not only the power consumption increases, but also a video signal driver with a high withstand voltage is required, resulting in an increase in cost. In the above equation, C1 represents the capacitance value of the holding capacitor C111, and C2 represents the capacitance value of the coupling capacitor C112.

  FIG. 13 is an improved version of the pixel circuit shown in FIG. 4 and is characterized in that it can suppress a decrease in the input gain of the video signal. For easy understanding, parts corresponding to those of the pixel circuit shown in FIG. As shown in the figure, the pixel circuit 101 is arranged at a portion where the row-shaped scanning line WSL101 and the column-shaped signal line DTL101 intersect. Note that additional scanning lines DSL111 and AZL101 are also arranged in parallel with the scanning line WSL101. The pixel circuit 101 includes a current drive type load element such as the light emitting element 117, a storage capacitor C 111, a sampling transistor 115, and a drive transistor 111. The sampling transistor 115 operates when selected by the scanning line WSL101, samples the input signal Vsig from the signal line DTL101, and holds it in the holding capacitor C111. The drive transistor 111 current-drives the light emitting element 117 in accordance with the signal potential held in the holding capacitor C111.

In addition to these basic components, the pixel circuit 101 includes a threshold voltage cancel circuit, an additional storage capacitor C112, and a bootstrap circuit. The threshold voltage cancel circuit detects the threshold voltage Vth of the drive transistor 111 prior to current driving of the light emitting element 117, and holds the potential necessary for canceling the influence in the additional holding capacitor C112 in advance, thereby driving the drive transistor 111. This is applied to the gate. The bootstrap circuit detects a characteristic variation of the light emitting element 117 during current driving of the light emitting element 117, and automatically adjusts the level of the signal potential held in the holding capacitor C111 so as to cancel the influence. In such a configuration, the sampling transistor 115 directly inputs the signal input from the signal line DTL101 during the sampling operation to the storage capacitor C111 without being coupled to the additional storage capacitor C112 and the capacitance component including the gate capacitance of the drive transistor 111. It is characterized by writing. Thus, the gate voltage ΔVg of the drive transistor 111 is
ΔVg = Vsig−Vss (GND)
It becomes. As apparent from comparison with ΔVg calculated by the circuit of FIG. 4, there is no loss in gain of the input video signal because there is no loss due to capacitive coupling. Therefore, the amplitude of the video signal Vsig can be reduced as compared with the circuit of FIG.

  Looking at a specific configuration, one end of the holding capacitor C111 can be connected to the ground potential GND via the switching transistor 114, while the other end is connected to the source of the sampling transistor 115 (node ND114) and the input signal Vsig. Hold. One end of the additional storage capacitor C112 is connected to the gate (node ND112) of the drive transistor 111, and the other end is connected in series by the storage capacitor C111 and the node ND114. The threshold voltage cancel circuit includes switching transistors 113 and 119. The switching transistor 113 has its source / drain connected between the drain and gate of the drive transistor 111. On the other hand, the source / drain of the switching transistor 119 is connected between the source of the drive transistor 111 (node ND111) and one end of the additional storage capacitor C112 (node ND114). The other end of the additional storage capacitor C112 is connected to the gate (node ND112) of the drive transistor 111. On the other hand, the bootstrap circuit includes another switching transistor 114. The switching transistor 114 has a source grounded and a drain connected to the connection node (ND111) of the drive transistor 111 and the light emitting element 117 and the storage capacitor C111. The switching transistor 114 is turned on during sampling to fix one end of the holding capacitor C111 to the ground level, and is turned off during bootstrap operation to bring one end of the holding capacitor C111 to the level of the connection node ND111.

  FIG. 14 is a timing chart for explaining the operation of the pixel circuit shown in FIG. In order to facilitate understanding, portions corresponding to those in the timing chart shown in FIG. First, in the Vth correction period, the transistor 119 is turned on, and Vth is held in the additional holding capacitor C112 between the nodes 112 and 114. At this time, since the nodes ND114 and ND111 are at the same level, nothing is written in the storage capacitor C111. Next, in the signal writing period, the transistors 114 and 115 are turned on, and the signal Vsig is written to the storage capacitor C111 between the nodes ND111 and ND114. There is no gain loss at that time. Further, when the light emission period starts, a bootstrap operation is performed, and the level of the node ND111 is raised by ΔV. In this way, in the present invention, the input video signal can be applied to the gate of the drive transistor without substantially reducing the gain, while the Vth variation of the drive transistor and the characteristic variation ΔV of the light emitting element are automatically detected. Feedback is canceled.

It is a block diagram which shows an example of a pixel circuit. FIG. 2 is a schematic diagram for explaining an operation of the pixel circuit shown in FIG. 1. 2 is a timing chart for explaining the operation of the pixel circuit shown in FIG. 1. It is a circuit diagram which shows the other example of a pixel circuit. 5 is a timing chart for explaining the operation of the pixel circuit shown in FIG. 4. FIG. 6 is a schematic diagram for detailed description of the pixel circuit illustrated in FIGS. 4 and 5. FIG. 6 is a schematic diagram for detailed description of the pixel circuit illustrated in FIGS. 4 and 5. 6 is a timing chart for detailed description of the pixel circuit shown in FIGS. 4 and 5. FIG. FIG. 6 is a circuit diagram for detailed description of the pixel circuit shown in FIGS. 4 and 5. FIG. 6 is a schematic diagram for detailed description of the pixel circuit illustrated in FIGS. 4 and 5. FIG. 6 is a circuit diagram for detailed description of the pixel circuit shown in FIGS. 4 and 5. FIG. 6 is a schematic diagram for detailed description of the pixel circuit illustrated in FIGS. 4 and 5. It is a circuit diagram which shows the pixel circuit which concerns on this invention. 14 is a timing chart for explaining the operation of the pixel circuit shown in FIG. 13. It is a block diagram which shows an example of the conventional pixel circuit. It is a circuit diagram which shows an example of the conventional pixel circuit. It is a graph which shows the time-dependent change of the characteristic of an EL element. It is a circuit diagram which shows the other example of the conventional pixel circuit. FIG. 19 is a timing chart for explaining the operation of the pixel circuit shown in FIG. 18. FIG. It is a graph which shows the operating point of a drive transistor and an EL element.

Explanation of symbols

DESCRIPTION OF SYMBOLS 101 ... Pixel circuit, 111 ... Drive transistor, 112 ... Switching transistor, 113 ... Switching transistor, 114 ... Switching transistor, 115 ... Sampling transistor, 117 ... Light emitting element, 119 ... Switching transistor, C111 ... Retention capacitance, C112 ... Additional retention capacitance

Claims (9)

A pixel circuit individually arranged at a portion where a row-shaped scanning line and a column-shaped signal line intersect,
A load element, a holding capacitor, a sampling transistor, and a drive transistor;
The sampling transistor operates when selected by the scanning line, samples an input signal from the signal line, and holds it in the storage capacitor,
The drive transistor is a pixel circuit that current-drives the load element in accordance with a signal potential held in the holding capacitor.
Including a threshold voltage cancellation circuit, an additional storage capacitor and a bootstrap circuit,
The threshold voltage cancel circuit detects the threshold voltage of the drive transistor prior to current driving of the load element, and holds in advance the potential necessary for canceling the influence in the additional storage capacitor, thereby driving the gate of the drive transistor. Applied to
The bootstrap circuit detects a change in characteristics of the load element during current driving of the load element, and performs a bootstrap operation for automatically adjusting the level of the signal potential held in the holding capacitor so as to cancel the influence. To do,
The sampling transistor writes a signal input from the signal line during a sampling operation directly to the storage capacitor without being coupled with a capacitance component including the additional storage capacitor and the gate capacitor of the drive transistor. Pixel circuit.   One end of the holding capacitor can be connected to the ground potential, while the other end is connected to the sampling transistor to hold the input signal, and one end of the additional holding capacitor is connected to the gate of the drive transistor, while the other end is The pixel circuit according to claim 1, wherein the pixel circuit is connected in series with the storage capacitor.   The threshold voltage cancel circuit includes first and second switching transistors. The first switching transistor has a source / drain connected between a drain and a gate of the drive transistor, and a second transistor. The source / drain is connected between the source of the drive transistor and one end of the additional storage capacitor, and the other end of the additional storage capacitor is connected to the gate of the drive transistor. 2. The pixel circuit according to 2.   The bootstrap circuit includes a switching transistor, the source of which is grounded, the drain of which is connected to the connection node of the drive transistor and the load element, and the storage capacitor. 2. The pixel circuit according to claim 1, wherein one end is fixed to a ground level, and is turned off during a bootstrap operation to set one end of the storage capacitor to the level of the connection node.   The pixel circuit according to claim 1, wherein the load element is an organic EL element that emits light by current driving.   2. The pixel circuit according to claim 1, wherein the sampling transistor and the drive transistor are N-type thin film transistors. An active matrix device comprising a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where both intersect,
Each pixel includes a load element, a storage capacitor, a sampling transistor, and a drive transistor,
The sampling transistor operates when selected by the scanning line, samples an input signal from the signal line, and holds it in the storage capacitor,
The drive transistor drives the load element in accordance with the signal potential held in the holding capacitor,
The pixel further includes a threshold voltage cancel circuit, an additional storage capacitor, and a bootstrap circuit,
The threshold voltage cancel circuit detects the threshold voltage of the drive transistor prior to current driving of the load element, and holds in advance the potential necessary for canceling the influence in the additional storage capacitor, thereby driving the gate of the drive transistor. Applied to
The bootstrap circuit detects a change in characteristics of the load element during current driving of the load element, and performs a bootstrap operation for automatically adjusting the level of the signal potential held in the holding capacitor so as to cancel the influence. To do,
The sampling transistor writes a signal input from the signal line during a sampling operation directly to the storage capacitor without being coupled with a capacitance component including the additional storage capacitor and the gate capacitor of the drive transistor. Active matrix device. A display device comprising a row-shaped scanning line, a column-shaped signal line, and pixels arranged in a matrix at a portion where both intersect,
Each pixel includes an electro-optic element, a storage capacitor, a sampling transistor, and a drive transistor,
The sampling transistor operates when selected by the scanning line, samples a video signal from the signal line, and holds it in the storage capacitor,
The drive transistor drives the electro-optic element according to a signal potential held in the holding capacitor to display an image according to a video signal;
The pixel further includes a threshold voltage cancel circuit, an additional storage capacitor, and a bootstrap circuit,
The threshold voltage cancel circuit detects the threshold voltage of the drive transistor prior to driving the electro-optic element, and holds a potential necessary for canceling the influence in the additional storage capacitor in advance, thereby driving the gate of the drive transistor. Applied to
The bootstrap circuit detects a characteristic variation of the electro-optical element when the electro-optical element is driven, and automatically adjusts the level of the signal potential held in the storage capacitor so as to cancel the influence Is to perform
The sampling transistor directly writes the video signal input from the signal line during the sampling operation to the storage capacitor without being coupled to the additional storage capacitor and a capacitance component including the gate capacitance of the drive transistor. Display device. A pixel circuit individually disposed at a portion where a row-shaped scanning line and a column-shaped signal line intersect with each other, and includes a load element, a storage capacitor, a sampling transistor, and a drive transistor, and the sampling transistor Operates when selected by the scanning line, samples the input signal from the signal line and holds it in the holding capacitor, and the drive transistor drives the load element in accordance with the signal potential held in the holding capacitor In the pixel circuit driving method,
Prior to current drive of the load element, a threshold voltage of the drive transistor is detected and a potential necessary for canceling the influence is held in the additional holding capacitor in advance and applied to the gate of the drive transistor. When,
A bootstrap procedure for detecting a characteristic variation of the load element during current driving of the load element and performing a bootstrap operation for automatically adjusting a level of a signal potential held in the holding capacitor so as to cancel the influence;
And a writing procedure for directly writing the signal input from the signal line during the sampling operation to the storage capacitor without coupling with the additional storage capacitor and the capacitance component including the gate capacitance of the drive transistor. A driving method of the pixel circuit.

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