JP2004528707A - Soiを形成する方法 - Google Patents
Soiを形成する方法 Download PDFInfo
- Publication number
- JP2004528707A JP2004528707A JP2002560178A JP2002560178A JP2004528707A JP 2004528707 A JP2004528707 A JP 2004528707A JP 2002560178 A JP2002560178 A JP 2002560178A JP 2002560178 A JP2002560178 A JP 2002560178A JP 2004528707 A JP2004528707 A JP 2004528707A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- silicon
- soi
- insulating layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1912—Preparing SOI wafers using selective deposition, e.g. epitaxial lateral overgrowth [ELO] or selective deposition of single crystal silicon
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1908—Preparing SOI wafers using silicon implanted buried insulating layers, e.g. oxide layers [SIMOX]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Landscapes
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/767,787 US20020098664A1 (en) | 2001-01-23 | 2001-01-23 | Method of producing SOI materials |
| PCT/US2002/000802 WO2002059946A2 (en) | 2001-01-23 | 2002-01-10 | Method of producing soi materials |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004528707A true JP2004528707A (ja) | 2004-09-16 |
| JP2004528707A5 JP2004528707A5 (https=) | 2005-12-22 |
Family
ID=25080577
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002560178A Pending JP2004528707A (ja) | 2001-01-23 | 2002-01-10 | Soiを形成する方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US20020098664A1 (https=) |
| EP (1) | EP1354339A2 (https=) |
| JP (1) | JP2004528707A (https=) |
| KR (1) | KR20030076627A (https=) |
| CN (1) | CN1528010A (https=) |
| WO (1) | WO2002059946A2 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005333052A (ja) * | 2004-05-21 | 2005-12-02 | Sony Corp | Simox基板及びその製造方法及びsimox基板を用いた半導体装置及びsimox基板を用いた電気光学表示装置の製造方法 |
| US7619283B2 (en) * | 2007-04-20 | 2009-11-17 | Corning Incorporated | Methods of fabricating glass-based substrates and apparatus employing same |
| CN100454483C (zh) * | 2007-04-20 | 2009-01-21 | 中国电子科技集团公司第四十八研究所 | 一种离子注入厚膜soi晶片材料的制备方法 |
| CN102386123B (zh) * | 2011-07-29 | 2013-11-13 | 上海新傲科技股份有限公司 | 制备具有均匀厚度器件层的衬底的方法 |
| US8575694B2 (en) | 2012-02-13 | 2013-11-05 | Taiwan Semiconductor Manufacturing Company, Ltd. | Insulated gate bipolar transistor structure having low substrate leakage |
| JP2016224045A (ja) * | 2015-05-29 | 2016-12-28 | セイコーエプソン株式会社 | 抵抗素子の製造方法、圧力センサー素子の製造方法、圧力センサー素子、圧力センサー、高度計、電子機器および移動体 |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0845920A (ja) * | 1994-07-25 | 1996-02-16 | Hewlett Packard Co <Hp> | 半導体基板に絶縁物層を形成する方法 |
| US5710057A (en) * | 1996-07-12 | 1998-01-20 | Kenney; Donald M. | SOI fabrication method |
| JPH11307455A (ja) * | 1998-04-20 | 1999-11-05 | Sony Corp | 基板およびその製造方法 |
| JP2000294513A (ja) * | 1999-04-06 | 2000-10-20 | Nec Corp | Si基板の酸化膜形成方法 |
-
2001
- 2001-01-23 US US09/767,787 patent/US20020098664A1/en not_active Abandoned
-
2002
- 2002-01-10 JP JP2002560178A patent/JP2004528707A/ja active Pending
- 2002-01-10 WO PCT/US2002/000802 patent/WO2002059946A2/en not_active Ceased
- 2002-01-10 KR KR10-2003-7009765A patent/KR20030076627A/ko not_active Withdrawn
- 2002-01-10 EP EP02707443A patent/EP1354339A2/en not_active Withdrawn
- 2002-01-10 CN CNA028052684A patent/CN1528010A/zh active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0845920A (ja) * | 1994-07-25 | 1996-02-16 | Hewlett Packard Co <Hp> | 半導体基板に絶縁物層を形成する方法 |
| US5710057A (en) * | 1996-07-12 | 1998-01-20 | Kenney; Donald M. | SOI fabrication method |
| JPH11307455A (ja) * | 1998-04-20 | 1999-11-05 | Sony Corp | 基板およびその製造方法 |
| JP2000294513A (ja) * | 1999-04-06 | 2000-10-20 | Nec Corp | Si基板の酸化膜形成方法 |
Non-Patent Citations (2)
| Title |
|---|
| H. W. LAM, ET. AL.: ""SILICON-ON-INSULATOR BY OXGEN ION IMPLANTATION"", JOURNAL OF CRYSTAL GROWTH, vol. 63, JPNX007010370, 1983, pages 554 - 558, ISSN: 0000824332 * |
| 前田和夫著, 「最新LSIプロセス技術」, JPNX007010371, 20 April 1988 (1988-04-20), ISSN: 0000824333 * |
Also Published As
| Publication number | Publication date |
|---|---|
| WO2002059946A2 (en) | 2002-08-01 |
| EP1354339A2 (en) | 2003-10-22 |
| WO2002059946A8 (en) | 2003-10-09 |
| US20020098664A1 (en) | 2002-07-25 |
| KR20030076627A (ko) | 2003-09-26 |
| CN1528010A (zh) | 2004-09-08 |
| WO2002059946A3 (en) | 2003-02-20 |
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