JP2004521496A - 干渉遮蔽を有する集積回路ダイ - Google Patents

干渉遮蔽を有する集積回路ダイ Download PDF

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Publication number
JP2004521496A
JP2004521496A JP2002566551A JP2002566551A JP2004521496A JP 2004521496 A JP2004521496 A JP 2004521496A JP 2002566551 A JP2002566551 A JP 2002566551A JP 2002566551 A JP2002566551 A JP 2002566551A JP 2004521496 A JP2004521496 A JP 2004521496A
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JP
Japan
Prior art keywords
integrated circuit
package
circuit
substrate
conductive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002566551A
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English (en)
Japanese (ja)
Other versions
JP2004521496A5 (enExample
Inventor
スリドハラン，グルスワミ・エム
スリドハラン，カーティク・エム
Original Assignee
アシュバッタ・セミコンダクター・インコーポレーテッド
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Application filed by アシュバッタ・セミコンダクター・インコーポレーテッド filed Critical アシュバッタ・セミコンダクター・インコーポレーテッド
Publication of JP2004521496A publication Critical patent/JP2004521496A/ja
Publication of JP2004521496A5 publication Critical patent/JP2004521496A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5227—Inductive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type
    • H01F17/0006—Printed inductances
    • H01F2017/008—Electric or magnetic shielding of printed inductances
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01F—MAGNETS; INDUCTANCES; TRANSFORMERS; SELECTION OF MATERIALS FOR THEIR MAGNETIC PROPERTIES
    • H01F17/00—Fixed inductances of the signal type
    • H01F17/0006—Printed inductances
    • H01F2017/0086—Printed inductances on semiconductor substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Power Engineering (AREA)
  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Health & Medical Sciences (AREA)
  • Electromagnetism (AREA)
  • Toxicology (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2002566551A 2001-02-16 2002-02-13 干渉遮蔽を有する集積回路ダイ Pending JP2004521496A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/785,620 US6486534B1 (en) 2001-02-16 2001-02-16 Integrated circuit die having an interference shield
PCT/US2002/004193 WO2002067326A2 (en) 2001-02-16 2002-02-13 Integrated circuit die having an electromagnetic interference shield

Publications (2)

Publication Number Publication Date
JP2004521496A true JP2004521496A (ja) 2004-07-15
JP2004521496A5 JP2004521496A5 (enExample) 2005-12-22

Family

ID=25136069

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002566551A Pending JP2004521496A (ja) 2001-02-16 2002-02-13 干渉遮蔽を有する集積回路ダイ

Country Status (5)

Country Link
US (2) US6486534B1 (enExample)
EP (1) EP1393372A2 (enExample)
JP (1) JP2004521496A (enExample)
AU (1) AU2002306475A1 (enExample)
WO (1) WO2002067326A2 (enExample)

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WO2019244487A1 (ja) * 2018-06-22 2019-12-26 日本電産株式会社 モータ

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US20050206015A1 (en) * 2004-03-16 2005-09-22 Texas Instruments Incorporated System and method for attenuating electromagnetic interference
US7375411B2 (en) * 2004-06-03 2008-05-20 Silicon Laboratories Inc. Method and structure for forming relatively dense conductive layers
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US7323948B2 (en) * 2005-08-23 2008-01-29 International Business Machines Corporation Vertical LC tank device
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US7514765B2 (en) * 2006-04-25 2009-04-07 Dell Products L.P. Solution of power consumption reduction for inverter covered by metal case
DE102006062844B4 (de) * 2006-05-12 2016-11-17 Infineon Technologies Ag Abschirmvorrichtung zum Abschirmen von elektromagnetischer Strahlung
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US7514774B2 (en) * 2006-09-15 2009-04-07 Hong Kong Applied Science Technology Research Institute Company Limited Stacked multi-chip package with EMI shielding
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Publication number Priority date Publication date Assignee Title
WO2019244487A1 (ja) * 2018-06-22 2019-12-26 日本電産株式会社 モータ

Also Published As

Publication number Publication date
WO2002067326A3 (en) 2003-12-18
US20030017646A1 (en) 2003-01-23
WO2002067326A2 (en) 2002-08-29
US7151011B2 (en) 2006-12-19
EP1393372A2 (en) 2004-03-03
WO2002067326A9 (en) 2004-04-01
US6486534B1 (en) 2002-11-26
AU2002306475A1 (en) 2002-09-04

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