JP2004165600A - Single-crystal silicon substrate, semiconductor device and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device, in which a non-single crystal Si thin film and a single crystal Si thin-film device are formed and a high-performance system is integrated, to provide a method for manufacturing it, and to provide a single-crystal Si substrate for forming the single crystal Si thin-film device of the semiconductor device. <P>SOLUTION: The semiconductor device 20 comprises an SiO<SB>2</SB>film 3; a MOS non-single crystal Si thin film transistor 1a, containing a non-single crystal Si thin film 5' of polycrystalline Si; a MOS single-crystal Si thin-film transistor 16a provided with a single-crystal Si thin-film 14a; and a metal wiring 22 on an insulation substrate 2. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to, for example, a semiconductor device for improving the circuit performance of a liquid crystal display device in which a peripheral drive circuit and a control circuit are integrated on the same substrate in an active matrix drive liquid crystal display device driven by a TFT, and a method of manufacturing the same. And a single crystal Si substrate used in manufacturing the semiconductor device.
[0002]
[Prior art]
Conventionally, a thin film transistor (Thin Film Transistor, hereinafter abbreviated as TFT) of amorphous Si (hereinafter abbreviated as a-Si) or polycrystalline Si (abbreviated as P-Si) is formed on a glass substrate, A liquid crystal display device that drives a liquid crystal display panel, an organic EL panel, or the like, that is, performs a so-called active matrix drive, is used.
[0003]
In particular, an integrated peripheral driver using p-Si having high mobility and operating at high speed has been used. However, in order to integrate a system such as an image processor or a timing controller that requires higher performance, a Si device with higher performance is required.
[0004]
This is because, in polycrystalline Si, the mobility is reduced and the S coefficient (sub-level) is caused by localized levels in the gap due to imperfect crystallinity, defects near crystal grain boundaries and localized levels in the gap. This is because there is a problem that the performance of the transistor is not sufficient to form a high-performance Si device due to an increase in the threshold coefficient.
[0005]
Therefore, in order to form a device of higher performance Si, a technique of forming a device such as a thin film transistor made of a single crystal Si thin film in advance and attaching the device to an insulating substrate to form a semiconductor device has been studied. (For example, see Patent Document 1, Non-Patent Documents 1 and 2).
[0006]
In Patent Literature 1, a display of a display panel of an active matrix type liquid crystal display device is manufactured using a semiconductor device in which a single crystal Si thin film transistor formed in advance by using an adhesive on a glass substrate is transferred.
[0007]
[Patent Document 1]
Tokiohei 7-503557 (published April 13, 1995)
[0008]
[Non-patent document 1]
JPSalerno "Single Crystal Silicon AMLCDs", Conference Record of the 1994 International Display Research Conference (IDRC) P.39-44 (1994)
[0009]
[Non-patent document 2]
Q.-Y.Tong & U. Gesele, SEMICONDUCTOR WAFER BONDING: SCIENCE AND TECHNOLOGY, John Wiley & Sons, New York (1999)
[0010]
[Non-Patent Document 3]
K. Warner, et.Al., 2002 IEEE International SOI Conference: Oct, pp. 123-125 (2002)
[0011]
[Non-patent document 4]
LPAllen, et.Al., 2002 IEEE International SOI Conference: Oct, pp.192-193 (2002)
[0012]
[Problems to be solved by the invention]
However, in the above-described conventional semiconductor device and its manufacturing method, since an adhesive is used to bond a single crystal Si thin film transistor, which is a high-performance device, onto a glass substrate, the attaching operation is troublesome, It has problems such as poor properties. In addition, the completed semiconductor device also has a problem in heat resistance because it is bonded by an adhesive, and it is impossible to form a high-quality inorganic insulating film or a TFT thereafter. Therefore, an active matrix substrate is manufactured. In such a case, it is necessary to attach the device including the TFT array to a substrate to be used after the device is formed, and there are serious problems in size cost and wiring formation.
[0013]
Further, Patent Document 1 only discloses that a single-crystal Si thin film device is formed on a glass substrate. With this configuration, a high-performance and high-performance semiconductor device recently required is obtained. I can't.
[0014]
Further, Non-Patent Document 3 discloses that alignment marks are detected and positioned over a Si substrate by infrared rays. However, since the wavelength of light is long and resolution cannot be improved, alignment is performed with high accuracy. It was difficult.
[0015]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a single crystal Si thin film device that can be easily formed on an insulating substrate without using an adhesive, A semiconductor device in which a thin film and a single-crystal Si thin-film device are formed to integrate a high-performance system, a method of manufacturing the same, and a single-crystal Si substrate for forming a single-crystal Si thin film of the semiconductor device. is there.
[0016]
[Means for Solving the Problems]
In order to solve the above-mentioned problems, the single-crystal Si substrate of the present invention is planarized after an oxide film, a gate pattern, and an impurity ion implanted portion are formed on the surface, and has a predetermined concentration at a predetermined depth. It is characterized by including a hydrogen ion implantation part into which hydrogen ions are implanted.
[0017]
According to the above configuration, the single crystal Si substrate is bonded to the insulating substrate or the like on the oxide film forming side, and the heat treatment is performed, whereby the bonding between the substrates is changed into a bond between atoms, and a strong bond is formed. By performing cleavage separation by heat treatment in the ion-implanted portion, a MOS-type single-crystal Si thin film transistor can be easily obtained without using an adhesive.
[0018]
That is, on the single crystal Si substrate of the present invention, an oxide film, a gate pattern, and an impurity ion implantation portion forming a part of a MOS type single crystal Si thin film transistor are formed on the surface, and hydrogen is formed to a predetermined depth from the surface. It has an ion implantation part.
[0019]
As a result, impurity doping of the gate electrode, source / drain, or base, collector, emitter, etc. of the present invention is completed on the insulating substrate or the like, and hydrogen ions of a predetermined concentration are implanted at a predetermined depth. By bonding the single-crystal Si substrate having a flattened and hydrophilic surface to a temperature higher than the temperature at which hydrogen ions are released from Si, the bonding strength to the insulating substrate can be increased, and the hydrogen ion implanted portion can be formed. By using cleavage as a boundary, a MOS type single crystal Si thin film transistor can be easily formed without using an adhesive.
[0020]
Therefore, for example, by bonding the single-crystal Si substrate of the present invention on an insulating substrate having a non-single-crystal Si thin film transistor such as a polycrystalline Si thin film formed on the surface and forming a MOS-type single-crystal Si thin film transistor, A semiconductor device in which a single-crystal Si transistor and a single-crystal Si transistor are formed in different regions over one substrate can be easily obtained.
[0021]
In order to solve the above problems, the single crystal Si substrate of the present invention has an impurity ion implanted portion or a diffusion region having a pnp junction structure or an npn junction structure in which impurity ions are implanted in the vicinity of the surface; Or an oxide film deposited on the diffusion region.
[0022]
According to the above configuration, it is possible to obtain a bipolar thin film transistor including a single-crystal Si thin film which is easily formed on another insulating substrate.
[0023]
Therefore, for example, by bonding the single-crystal Si substrate of the present invention to an insulating substrate having a non-single-crystal Si thin film transistor such as a polycrystalline Si thin film formed on its surface, and forming a bipolar single-crystal Si thin film transistor, A semiconductor device in which a single-crystal Si transistor and a single-crystal Si transistor are formed in different regions over one substrate can be easily obtained.
[0024]
It is more preferable that a hydrogen ion implanted region in which hydrogen ions of a predetermined concentration are implanted at the predetermined depth is provided.
[0025]
Thus, the single-crystal Si substrate is easily attached to the insulating substrate or the like on the oxide film deposition side and cleaved at the hydrogen ion implanted portion without using an adhesive. A thin film transistor can be obtained.
[0026]
That is, the single crystal Si substrate of the present invention has an oxide film and an impurity ion implantation portion for forming a bipolar type single crystal Si thin film transistor on the surface, and has a hydrogen ion implantation portion at a predetermined depth on the junction formation side. are doing.
[0027]
Therefore, by bonding the single-crystal Si thin film transistor of the present invention on an insulating substrate or the like and heating it to a temperature at which hydrogen ions are released from Si or more, bonding strength to the insulating substrate can be increased and impurity ion implantation can be performed. By splitting and separating at the hydrogen ion implanted portion formed near the portion, a bipolar single crystal Si thin film transistor having an SOI structure can be easily formed without using an adhesive.
[0028]
Then, the single-crystal Si substrate of the present invention is bonded to an insulating substrate having a non-single-crystal Si thin film transistor such as a polycrystalline Si thin film formed on its surface, and a single-crystal Si thin film transistor is formed. A semiconductor device in which a thin film transistor and a thin film transistor formed of single crystal Si are formed in different regions over one substrate can be easily obtained.
[0029]
More preferably, the oxide film is formed so as to have a thickness of 200 nm or more.
[0030]
Usually SiO _Two As the thickness of an oxide film such as a film increases, the characteristics and variations due to the influence of interface charge and the like decrease. _Two An appropriate value is approximately 200 nm to 400 nm due to the trade-off between the efficiency (time required for oxidation) of the film forming step and the step. An appropriate value is approximately 400 nm or more when variation is important, and approximately 200 nm to 400 nm, more preferably 250 nm to 350 nm when importance is attached to steps and efficiency. This is because the influence of the fixed charge caused by the contamination of the interface between the bonded single crystal Si substrate and the insulating substrate such as a glass substrate or the lattice distortion or imperfection is reduced.
[0031]
Therefore, according to the present invention, the variation in the threshold value of the MOS transistor made of single-crystal Si and the variation in characteristics of the bipolar TFT made of single-crystal Si are small, and the on-resistance is suppressed low. _Two It is possible to obtain a single crystal Si substrate that is appropriate for the balance between the efficiency of the film forming process and the step.
[0032]
In order to solve the above-mentioned problems, a semiconductor device according to the present invention is characterized in that a non-single-crystal Si thin film device and a single-crystal Si thin film device are formed in different regions on an insulating substrate.
[0033]
According to the above configuration, for example, a single crystal Si thin film device such as a single crystal Si thin film transistor is used for a device requiring higher performance, such as a timing controller, and non-single crystal Si is used for the remaining devices. By using a non-single-crystal Si thin film device such as a thin film transistor, a semiconductor device in which a high-performance and high-performance circuit system is integrated can be obtained.
[0034]
That is, using a single-crystal Si thin film device to form a high-speed, power-consuming, high-speed logic, timing generator, or high-speed DAC (current buffer) of which variation is required, utilizing the characteristics of single-crystal Si. Can be. On the other hand, a non-single-crystal Si thin film device such as polycrystalline Si can form an inexpensive semiconductor device over a large area, although it is inferior in performance and function as compared with a single-crystal Si thin film device.
[0035]
Therefore, according to the configuration of the present invention, a semiconductor device having the advantages of both the Si thin film devices can be formed on one substrate.
[0036]
Thus, a high-performance and high-performance circuit system that can be realized only by single-crystal Si can be integrated on a substrate. Therefore, for example, a semiconductor device for a display device such as a liquid crystal panel or an organic EL panel in which a high-performance system is integrated is manufactured at a very low cost as compared with a case where all devices are formed of single crystal Si. it can.
[0037]
Further, the shape of the single crystal Si substrate forming the single crystal Si thin film included in the semiconductor device of the present invention is limited to disks of 6, 8, and 12 inches, which are common wafer sizes of LSI manufacturing equipment. . However, since the non-single-crystal Si thin-film device and the single-crystal Si thin-film device coexist on the insulating substrate of the semiconductor device of the present invention, for example, it is possible to cope with a large liquid crystal display panel, an organic EL panel, and the like. A large semiconductor device can be manufactured.
[0038]
More preferably, the single crystal Si thin film device is joined to the insulating substrate via an inorganic insulating film.
[0039]
Accordingly, a device such as a single crystal Si thin film transistor can be formed on an insulating substrate without using an adhesive, so that single crystal Si can be prevented from being contaminated. Further, after the bonding, formation of a metal wiring, an inorganic insulating film, or etching can be easily performed. Furthermore, a device can be formed at low cost by forming metal wiring and the like together with the TFT process on a large substrate.
[0040]
It is more preferable that both the non-single-crystal Si thin film device and the single-crystal Si thin film device are MOS-type or MIS-type single-crystal Si thin-film transistors.
[0041]
Thus, for example, in the case of a CMOS structure, a semiconductor device suitable for logic with low power consumption, which can reduce power consumption and output a full power up to the power supply voltage, can be obtained.
[0042]
The MOS type single crystal Si thin film transistor is more preferably formed in the order of a gate, a gate insulating film, and Si from the insulating substrate side.
[0043]
As a result, the single crystal Si MOS thin film transistor is formed with the gate disposed on the insulating substrate side, and a semiconductor device in which a MOS single crystal Si thin film transistor that is turned upside down on a so-called insulating substrate is obtained. Can be. Therefore, a self-alignment process using a gate as a mask can be applied to source / drain formation on a single-crystal Si substrate, the influence of fixed charges on the glass substrate surface can be reduced, and furthermore, the bonding interface between the single-crystal Si and the glass substrate can be reduced. The effect of fixed charge, which is likely to occur, can be reduced by the shielding effect of the gate, and an established process using source / drain impurity ion implantation using the gate as a mask with single-crystal Si can be applied, thereby increasing the yield. is there.
[0044]
The thickness of the single-crystal Si thin film of the MOS thin film transistor is more preferably about 600 nm or less.
[0045]
Thus, in the above semiconductor device, the thickness d of the single-crystal Si thin film has a small value including a variation margin with respect to the maximum depletion length Wm determined by the impurity concentration Ni, that is, the impurity density is a practical lower limit. ^Fifteen Centimeter ^-3 Even if it is, it is approximately 600 nm or less, which is the upper limit of d.
[0046]
Here, Wm = [4ε _s kTln (Ni / ni) q ^Two Ni] ^1/2 Where ni is the intrinsic carrier density, k is the Boltzmann constant, T is the absolute temperature, ε _s Is the dielectric constant of Si, q is the electron charge, and Ni is the impurity density.
[0047]
According to the above configuration, the single crystal Si thin film has a thickness of about 600 nm or less, so that the S value (sub-threshold coefficient) of the semiconductor device can be reduced and the off-state current can be reduced.
[0048]
The thickness of the single crystal Si thin film of the MOS thin film transistor is more preferably about 100 nm or less.
[0049]
Thus, the S value (sub-threshold coefficient) of the semiconductor device can be further reduced, and the off-state current can be reduced. Therefore, the characteristics of the MOS type single crystal Si thin film transistor can be maximized.
[0050]
In particular, in order to suppress a decrease in TFT characteristics due to a quantum effect generated in a short-channel TFT having a gate length of 0.1 to 0.2 μm or less, it is desirable that the thickness be about 20 nm or less. When the thickness of single-crystal Si increases from about 20 nm on the short channel side with a gate length of about 200 nm, the variation in threshold increases and the mobility also increases. However, since the threshold is more important as a device, it is generally This value is a highly practical area.
[0051]
More preferably, the metal wiring pattern of the MOS type single crystal Si thin film transistor includes a portion formed by a looser wiring formation rule than the gate pattern of the MOS type single crystal Si thin film transistor. Further, it is more preferable that the metal wiring is formed by the same or looser wiring forming rule as the design rule of the metal wiring on the large substrate. Further, the wiring is formed by the same or looser wiring formation rule as that of a metal wiring on a large-sized substrate having a different wiring layer. Is more preferred.
[0052]
As a result, the metal wiring or a part of the metal wiring of the semiconductor device in which the MOS type single crystal Si thin film transistor is formed can correspond to the fine processing equivalent to the gate and can be processed simultaneously with the metal wiring on the large-sized substrate. And the processing capacity can be improved. Alternatively, connection to another circuit block or a TFT array is facilitated, and reduction in product yield due to poor connection can be reduced.
[0053]
Note that a loose wiring formation rule means that the design rules for forming the wiring are not strict, and the allowable range for forming the wiring is wide.
[0054]
The non-single-crystal Si thin-film device is a MOS-type or MIS-type non-single-crystal Si thin-film transistor, and the single-crystal Si thin-film device is more preferably a bipolar-type single-crystal Si thin-film transistor.
[0055]
Thus, a bipolar single-crystal Si thin film transistor is formed in addition to the MOS or MIS non-single-crystal Si thin film transistor, so that a more multifunctional semiconductor device can be obtained.
[0056]
That is, by forming a bipolar thin film transistor made of a single crystal Si thin film in addition to a MOS or MIS thin film transistor, linear signal processing, which is a characteristic of the bipolar thin film transistor, is possible. It is possible to obtain a semiconductor device having further advantages such as excellent production yield, excellent linearity in a saturation region, and suitability for an analog amplifier, a current buffer and a power amplifier.
[0057]
The non-single-crystal Si thin film device is a MOS-type or MIS-type non-single-crystal thin-film transistor, and the single-crystal Si thin-film device is a MOS-type or bipolar-type single-crystal Si thin-film transistor. More preferably, it is included.
[0058]
Thus, a semiconductor device having three types of characteristics, that is, a MOS-type or MIS-type non-single-crystal Si thin-film transistor, a single-crystal Si thin-film transistor, and a bipolar single-crystal Si thin-film transistor can be formed on one substrate.
[0059]
Therefore, a semiconductor device with higher performance and higher function can be obtained.
[0060]
The non-single-crystal Si thin-film device is a MOS-type or MIS-type non-single-crystal Si thin-film transistor. The single-crystal Si thin-film device includes a MOS-type single-crystal Si thin-film transistor and a Schottky or PN junction diode. More preferably, a sensor or a CCD image sensor is provided.
[0061]
As a result, thin-film devices of different designs or structures can be integrated in different areas individually, and therefore, devices having different structures from CMOS devices such as image sensors, which have been extremely difficult to coexist with the conventional method, can be easily integrated. To create high-performance devices that were previously impossible.
[0062]
It is more preferable that the thickness of the single crystal Si thin film of the MOS thin film transistor made of the single crystal Si is smaller than that of the single crystal Si thin film of the bipolar thin film transistor.
[0063]
In general, a MOS thin film transistor can easily obtain good characteristics when the film thickness is small, while a bipolar thin film transistor can obtain good characteristics (a characteristic with small variation and low on-resistance) when the film thickness is relatively large. Are known.
[0064]
Therefore, according to the present invention, by specifying the thickness of the Si thin film of the MOS type and the bipolar type by comparison with each other, it is possible to obtain a semiconductor device capable of effectively utilizing the characteristics of both the MOS type and the bipolar type. .
[0065]
It is more preferable that the bipolar type single crystal Si thin film transistor has a planar structure in which a base, a collector, and an emitter region are formed and arranged on the same plane.
[0066]
Thus, since it is a so-called lateral transistor having no gate and having a planar structure like a MOS thin film transistor, an oxide film is simply formed on the Si surface and impurities of P and N are formed in a predetermined pattern (region). ) And activation annealing can be performed to form a completely flat Si substrate, so that a single-crystal Si substrate can be easily joined to an insulating substrate without performing a planarization process by CMP. Can be.
[0067]
Therefore, the manufacturing process can be simplified as compared with a normal bipolar transistor having a MOS type or a junction in a direction perpendicular to the plane.
[0068]
It is more preferable that the metal wiring and the contact pattern of the bipolar type single crystal Si thin film transistor include a portion formed by a looser wiring formation rule than the base pattern of the bipolar type single crystal Si thin film transistor. Further, it is more preferable that the metal wiring is formed according to the same or looser design rule as the metal wiring on the large substrate.
[0069]
Thereby, the metal wiring or a part of the metal wiring can be processed simultaneously with the metal wiring on the large-sized substrate, so that the cost can be suppressed and the processing capability can be improved. Further, the semiconductor device having the bipolar single crystal Si thin film transistor formed thereon can be easily connected to another circuit block or a TFT array, and a reduction in product yield due to poor connection can be prevented.
[0070]
The thickness of the single crystal Si thin film of the bipolar single crystal Si thin film transistor is more preferably about 800 nm or less.
[0071]
This makes it possible to obtain a bipolar single-crystal Si thin film transistor having small characteristic variations and low on-resistance.
[0072]
The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film, and the MOS thin film transistor made of the non-single-crystal Si thin film is formed from the substrate side in the order of non-single-crystal Si, a gate insulating film, and a gate. It is more preferred that
[0073]
Thereby, by forming the MOS type thin film transistor such that the gate is formed above the insulating substrate, a self-alignment process using a general gate as a mask can be required, and a polycrystalline Si thin film or a continuous grain boundary Si can be obtained. The thin film transistor can be easily manufactured, and productivity can be improved.
[0074]
The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film. The MOS thin film transistor made of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. It is more preferred that
[0075]
Accordingly, since the MOS non-single-crystal Si thin film transistor has the opposite configuration when viewed from the substrate, the influence of fixed charges near the surface of the glass substrate can be avoided, and the characteristics can be stabilized. Furthermore, the degree of freedom in setting the doping profile of the channel portion is increased, and measures against hot electron degradation are facilitated. _Two It is possible to obtain a thinner gate oxide film of higher quality than an oxide film formed at a low temperature by CVD or the like, and there is an advantage that a TFT having excellent short channel characteristics can be obtained. It is possible to increase the variations of the configuration that can obtain the effect.
[0076]
The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS or MIS thin-film transistor made of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. Is more preferable.
[0077]
Thus, by forming a MOS-type or MIS-type thin film transistor having a so-called bottom gate structure in which the gate is formed below the insulating substrate, a process which has been widely and conventionally used can be applied, and a high yield can be obtained. The process of forming an amorphous Si thin film can be simplified, reduced in cost, and improved in productivity. Further, in the active matrix LCD, it is possible to form a liquid crystal display device capable of enhancing the light shielding property from the backlight and displaying a high luminance.
[0078]
Further, since amorphous Si has low off-current characteristics, a semiconductor device suitable for a low power consumption type LCD or the like can be obtained.
[0079]
The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS or MIS thin-film transistor made of the non-single-crystal Si thin film is formed by forming non-single-crystal Si, a gate insulating film, and a gate in this order from the substrate side. Is more preferable.
[0080]
Accordingly, even if the MOS or MIS type non-single-crystal Si thin film transistor has the opposite configuration as viewed from the substrate, it is possible to increase the variation of the configuration that can obtain the same effect as described above, and the degree of freedom in process design is increased. Increase.
[0081]
The difference in linear expansion between the single crystal Si constituting the single crystal Si thin film device and the insulating substrate is more preferably about 250 ppm or less in a temperature range from about room temperature to 600 ° C.
[0082]
Thereby, a difference in linear expansion between the insulating substrate and the single crystal Si thin film with respect to a large temperature rise is reduced. Therefore, in the process for forming a single-crystal Si thin film on an insulating substrate, it is necessary to surely prevent destruction, bonding interface separation, or generation of defects in the crystal in the cleavage separation process from the hydrogen implantation position due to the difference in thermal expansion coefficient. In addition, the heat bonding strength can be improved.
[0083]
Here, the linear expansion is standardized as a change in length caused by a change in temperature.
[0084]
The insulating substrate has SiO2 on at least the surface of the region where the single crystal Si thin film device is formed. _Two It is more preferable that the glass is a high strain point glass composed of an alkaline earth-aluminoborosilicate glass having a film formed thereon.
[0085]
This eliminates the need to use crystallized glass having an adjusted composition used for bonding to a single-crystal Si substrate, so that the insulating substrate can be used in a high strain point generally used for a liquid crystal display panel driven by active matrix. A low-cost semiconductor device made of glass can be manufactured.
[0086]
The insulating substrate is made of barium-borosilicate glass, barium-aluminoborosilicate glass, alkaline earth-aluminoborosilicate glass, borosilicate glass, alkaline earth-zinc-lead-aluminoborosilicate glass and alkaline earth-zinc- More preferably, it is formed of any of the aluminoborosilicate glasses.
[0087]
Accordingly, since the insulating substrate is made of the glass described above, which is a high strain point glass generally used for a liquid crystal display panel or the like driven by active matrix, a semiconductor device suitable for the active matrix substrate can be manufactured at low cost. .
[0088]
The alignment margin of at least a part of the pattern in the single-crystal Si region is smaller than the alignment margin of the pattern of the entire mother substrate or the display region or the entire device, and is more preferably high precision.
[0089]
Thus, when forming a metal wiring pattern or the like common to the non-single-crystal Si region, it is possible to align a part of the pattern with a high-precision pattern in the single-crystal Si region by a more accurate exposure system. it can.
[0090]
Therefore, a single-crystal Si region having a high-precision pattern and a non-single-crystal region having a low-precision pattern can be easily and efficiently connected with a high yield using a metal wiring pattern or the like.
[0091]
The alignment mark in the single-crystal Si region and the alignment mark on the transparent substrate are obtained by detecting the alignment mark formed on the single-crystal Si with visible light or light of a shorter wavelength than visible light from the transparent substrate side. It is more preferable that the shape is such that it can be aligned with the alignment mark formed on the transparent substrate.
[0092]
Thereby, since the alignment mark can be detected through the glass substrate, the optical resolution can be improved, and the alignment can be performed with higher precision than before.
[0093]
In order to solve the above-mentioned problems, a method for manufacturing a semiconductor device according to the present invention is directed to a method for manufacturing a semiconductor device in which a single-crystal Si thin-film device and a non-single-crystal Si thin-film device are formed on an insulating substrate. After forming a circuit including a crystalline Si thin film device on an insulating substrate, the non-single-crystal Si thin film is formed.
[0094]
According to the above manufacturing method, a single-crystal Si thin film device is formed on an insulating substrate having the best flatness, and thereafter, a non-single-crystal Si thin film is formed. Therefore, it is possible to manufacture a semiconductor device with few defects due to poor bonding and high yield.
[0095]
More preferably, an inter-protection insulating film, a contact hole, and a metal wiring are formed on the single crystal Si thin film device.
[0096]
Thus, since the single-crystal Si thin-film device formed before the formation of the non-single-crystal Si thin film has metal wiring, miniaturization can be performed, and the integration of the circuit formed on the single-crystal Si thin film becomes possible. Dramatic increase in density can be realized. Further, by providing metal wiring in the same process on a non-single-crystal Si thin film formed after forming a single crystal Si thin film device on a glass substrate, a semiconductor device having a double metal wiring structure can be manufactured efficiently and in a simple process. can do.
[0097]
It is more preferable to form an interlayer insulating film after forming the single-crystal Si thin film device and before forming the non-single-crystal Si thin film.
[0098]
Thus, since the interlayer insulating film is formed between the single-crystal Si thin film device and the non-single-crystal Si thin film, contamination of the single-crystal Si thin film with single-crystal Si can be reliably prevented.
[0099]
In order to solve the above-mentioned problems, a method of manufacturing a semiconductor device according to the present invention includes the method of manufacturing a semiconductor device in which a single-crystal Si thin-film device and a non-single-crystal Si thin film are formed on an insulating substrate. After forming a crystalline Si thin film on the insulating substrate, the single crystal Si thin film device is formed.
[0100]
According to the above manufacturing method, since the non-single-crystal Si thin film is formed before the formation of the single-crystal Si thin-film device, compared with the case of forming the non-single-crystal Si thin film after forming the single-crystal Si thin-film device, It is possible to prevent the single crystal Si thin film from being contaminated or damaged.
[0101]
In a method of manufacturing a semiconductor device in which a single-crystal Si thin film device and a non-single-crystal Si thin film are formed on an insulating substrate, the method includes forming the non-single-crystal Si thin film on the insulating substrate, There is a problem that the roughness of the surface to be joined to the single crystal Si from which the non-single crystal Si is removed when forming a Si thin film device increases the micro roughness and lowers the joining force.
[0102]
On the other hand, according to the method of manufacturing a semiconductor device of the present invention, at least a region to be bonded to single-crystal Si is formed in advance with a low energy (about 3 keV) halide (CF _Four Etc.) by GCIB (Gas Cluster Ion Beam). On this, about 10 nm SiO2 was formed by PECVD using TEOS or TMCTS (Tetramethylcyclotetrasiloxane). _Two When a film is formed, it is more desirable because the bonding property is further improved.
[0103]
More preferably, the single crystal Si thin film device is a MOS type single crystal Si thin film transistor.
[0104]
Thereby, for example, in the case of a CMOS structure, the characteristics of MOS transistors such as a reduction in power consumption and a full output up to the power supply voltage can be obtained, and a semiconductor device suitable for logic with low power consumption can be obtained. A semiconductor device having the same can be manufactured.
[0105]
More preferably, the single crystal Si thin film device is a bipolar type single crystal Si thin film transistor.
[0106]
Thus, by forming the bipolar transistor on the insulating substrate, the structure of the single crystal Si thin film can be simplified as compared with the MOS type, and the thin film can be bonded to the insulating substrate without performing the planarization process.
[0107]
More preferably, a predetermined concentration of hydrogen ions is implanted at a predetermined depth into a single crystal Si substrate for forming the single crystal Si thin film device.
[0108]
Thereby, a single crystal Si thin film device can be easily formed on an insulating substrate without using an adhesive.
[0109]
That is, when a single crystal Si thin film device is formed on an insulating substrate by forming a hydrogen ion implanted portion into which hydrogen ions are implanted, the single crystal Si thin film device is heated to a temperature at which hydrogen ions are separated from Si. In addition, the bonding strength to the insulating substrate can be increased, and the bipolar single crystal Si thin film transistor can be easily formed by cleavage and separation at the hydrogen ion implanted portion.
[0110]
Note that the predetermined depth may be determined according to the target thickness of the single crystal Si thin film to be formed.
[0111]
The hydrogen ion implantation energy is obtained by subtracting the energy corresponding to the projection range of hydrogen ions corresponding to the oxide film thickness from the hydrogen ion implantation energy, the energy corresponding to the oxide film thickness. It is more preferable that the energy is set to be smaller than the energy corresponding to the projection range of the constituent atoms of the material existing in the layer formed on the oxide film.
[0112]
Thus, for example, in a MOS type single crystal Si thin film transistor, the hydrogen ions irradiated to the single crystal Si substrate collide with the constituent atoms of the gate electrode material or the metal wiring material, and thus the gate electrode material released. Can be prevented from passing through the oxide film and reaching the single-crystal Si, thereby lowering the characteristics or reliability due to the contamination of the single-crystal Si portion.
[0113]
More preferably, the thickness of the single crystal Si substrate having the hydrogen ion implanted portion is approximately 100 microns or less.
[0114]
As a result, the single-crystal Si layer can be reduced to about 1/10 of the original substrate, and the bending rigidity of the Si substrate is reduced. Even under the condition of energy, it is possible to easily follow the curve and make it less susceptible to those effects.
[0115]
Therefore, with the above thickness, it is possible to greatly reduce the bonding failure due to surface scratches, particles, and the like on the glass substrate side without greatly impairing the handleability of the divided small and thin Si substrate.
[0116]
The thickness is desirably about 70 microns or less, and even more desirably 50 microns or less.
[0117]
After the non-single-crystal Si thin film is formed on the insulating substrate, at least a surface region to be joined to the single-crystal Si from which the non-single-crystal Si has been removed is previously subjected to a GCIB (Gas Cluster Ion Beam) of a halide of about 3 keV. More preferably, it is flattened.
[0118]
Thus, when low energy (about 3 keV) oxygen or halide GCIB is irradiated, the surface of Si or SiO2 is lightly etched and the micro roughness of the surface is improved.
[0119]
Therefore, the success rate of joining can be greatly improved as compared with the joining of the conventional Si substrate.
[0120]
BEST MODE FOR CARRYING OUT THE INVENTION
[Embodiment 1]
A single crystal Si substrate, a semiconductor device and a method for manufacturing the same according to an embodiment of the present invention and a method for manufacturing the same will be described below with reference to FIGS. 1 (a) to 1 (i). .
[0121]
Note that the semiconductor device described in this embodiment is a semiconductor device suitable for high performance and high functionality in which a MOS non-single-crystal Si thin film transistor and a MOS single-crystal Si thin film transistor are formed in different regions on an insulating substrate. And is formed on an active matrix substrate of TFT.
[0122]
The MOS type thin film transistor includes an active semiconductor layer, a gate electrode, a gate insulating film, and a high-concentration impurity-doped portion (source / drain electrode) formed on both sides of the gate. Is a general transistor whose current flowing between the source and the drain is controlled.
[0123]
As a characteristic of a MOS transistor, a COMS (Complementary MOS) structure is suitable for low power consumption logic because power consumption is low and an output can be fully varied according to a power supply voltage.
[0124]
As shown in FIG. 1 (i), the semiconductor device 20 of the present embodiment _Two (Si oxide) film (oxide film) 3, MOS type non-single-crystal Si thin film transistor 1a including non-single-crystal Si thin film 5 'made of polycrystalline Si, MOS type single-crystal Si thin film transistor provided with single-crystal Si thin film 14a (Single-crystal Si thin film device) 16 a and metal wiring 22 are provided.
[0125]
The insulating substrate 2 is made of Corning's code 1737 (alkaline earth-aluminoborosilicate glass), which is a high strain point glass.
[0126]
SiO _Two The film 3 is formed on the entire surface of the insulating substrate 2 with a thickness of about 50 nm.
[0127]
A MOS type non-single-crystal Si thin film transistor 1a including a non-single-crystal Si thin film 5 'is formed of SiO as an interlayer insulating film. _Two On the film 4, a non-single-crystal Si thin film 5 ', SiO as a gate insulating film _Two A film 7 and a gate electrode 6 are provided.
[0128]
The gate electrode 6 is formed of polycrystalline Si and W silicide, but may be formed of polycrystalline Si, another silicide, polycide, or the like.
[0129]
On the other hand, a MOS type single crystal Si thin film transistor 16a including a single crystal Si thin film 14a has a flattening layer having a gate electrode 12, and a SiO 2 serving as a gate insulating film. _Two A film 13 and a single-crystal Si thin film 14a are provided.
[0130]
As a material of the gate electrode 12, a heavy-doped polycrystalline Si film and W silicide are used, but the material may be polycrystalline Si alone or another refractory metal or silicide. And heat resistance.
[0131]
The single-crystal Si thin film transistor 16a is formed on the single-crystal Si substrate before being joined to the insulating substrate 2, and the portion serving as the gate electrode 12 includes the gate insulating film 13 and the single-crystal Si thin film 14a. Then, it is joined on the insulating substrate 2. Therefore, performing gate electrode formation and source / drain impurity ion implantation on the single-crystal Si substrate 10a is better than forming a single-crystal Si thin film formed on the insulating substrate 2 and then forming a thin-film transistor. Fine processing into a thin film can be easily performed.
[0132]
As described above, the semiconductor device 20 according to the present embodiment has the characteristics by allowing the MOS non-single-crystal Si thin film transistor 1a and the MOS single-crystal Si thin film transistor 16a to coexist on one insulating substrate 2. However, a high-performance and high-performance semiconductor device in which a plurality of circuits different from each other are integrated can be obtained. Further, a high-performance and high-performance semiconductor device can be obtained at a lower cost than forming transistors composed entirely of a single-crystal Si thin film on one insulating substrate 2.
[0133]
The region of the non-single-crystal Si thin film 5 'and the region of the single-crystal Si thin film 14a are separated by at least 0.3 μm or more, preferably 0.5 μm or more. This can prevent metal atoms such as Ni, Pt, Sn, and Pd from diffusing into the single crystal Si thin film 14a, and stabilize the characteristics of the single crystal Si thin film transistor 16a.
[0134]
Further, in the semiconductor device 20 of the present embodiment, SiO 2 is used as an interlayer insulating film between the non-single-crystal Si thin film transistor 1a and the single-crystal Si thin film transistor 16a. _Two A film 4 is formed. This can prevent the single crystal Si thin film 14a from being contaminated.
[0135]
For example, in the case of an active matrix substrate of a liquid crystal display device including the semiconductor device 20 of the present invention, the liquid crystal display further includes SiN _x (Si nitride), a resin flattening film, a via hole, and a transparent electrode are formed. In the region of the non-single-crystal Si thin film 5 ′, a driver and a TFT for a display portion are formed, and in the region of the single-crystal Si thin film 14 a applicable to a device requiring higher performance, a timing controller is provided. It is formed. The driver section may be made of single-crystal Si, and may be determined in consideration of cost and performance.
[0136]
Thus, by determining the function and use of each thin film transistor according to the characteristics of the thin film transistor including the single-crystal Si thin film 14a and the non-single-crystal Si thin film 5 ′, a high-performance and high-function thin film transistor can be obtained. Can be.
[0137]
Note that the conventional N-channel TFT formed in the region of the non-single-crystal Si thin film 5 'has a thickness of about 100 cm. ^Two / V · sec, whereas the N-channel TFT formed in the region of the single-crystal Si thin film 14a has a thickness of about 550 cm ^Two / V · sec. As described above, according to the configuration of the semiconductor device 20 of the present embodiment, it is possible to obtain a TFT that can operate at a higher speed than in the related art.
[0138]
In the active matrix substrate for a liquid crystal display, the device formed in the region of the non-single-crystal Si thin film 5 'as well as the driver requires a signal of 7 to 8 V and a power supply voltage, whereas the single-crystal Si thin film 14a The timing controller, which is a device formed in the region of, stably operated at 2.7 V.
[0139]
In the semiconductor device 20, the integrated circuit is formed in the region of the non-single-crystal Si thin film 5 'and the region of the single-crystal Si thin film 14a, so that the integrated circuit including the pixel array can be adapted to the required configuration and characteristics. The circuit can be formed in a suitable region. Then, in the integrated circuits formed in the respective regions, integrated circuits having different performances such as an operation speed and an operation power supply voltage can be manufactured. For example, the design may be such that at least one of the gate length, the thickness of the gate insulating film, the power supply voltage, and the logic level is different for each region.
[0140]
Accordingly, a device having different characteristics for each region can be formed, and a semiconductor device having more various functions can be obtained.
[0141]
Furthermore, in the semiconductor device 20, since the integrated circuit is formed in the region of the non-single-crystal Si thin film 5 'and the region of the single-crystal Si thin film 14a, the integrated circuit formed in each region is different for each region. Processing rules can be applied. For example, in the case of a short channel length, since there is no grain boundary in the single crystal Si thin film region, the variation in TFT characteristics hardly increases, whereas in the polycrystalline Si thin film region, the variation is rapid due to the influence of the crystal grain boundary. This is because it is necessary to change the processing rule in each part. Therefore, the integrated circuit can be formed in an appropriate region according to the processing rule.
[0142]
Further, in the semiconductor device 20 of the present embodiment, in the MOS type single crystal Si thin film transistor 16a, the metal wiring pattern can be formed according to a looser design rule than the gate pattern.
[0143]
Thereby, the metal wiring or a part of the metal wiring of the semiconductor device on which the MOS type single crystal Si thin film transistor 16a is formed can be processed simultaneously with the metal wiring on the large-sized substrate, thereby reducing the cost and improving the processing ability. be able to. Further, connection to external wiring, another circuit block, and a TFT array is facilitated, and product yield due to poor connection to an external device or the like can be reduced.
[0144]
The size of the single-crystal Si thin film 14a formed on the semiconductor device 20 depends on the wafer size of the LSI manufacturing device. However, in order to form a high-speed, power-consuming, high-speed logic, timing generator, high-speed DAC (current buffer) requiring variation, a processor, or the like, which requires the single-crystal Si thin film 14a, a general LSI is required. The wafer size of the manufacturing equipment is sufficient.
[0145]
Here, a method for manufacturing the semiconductor device 20 will be described below with reference to FIGS. 1 (a) to 1 (i).
[0146]
First, TEOS and O are applied to the entire surface of the insulating substrate 2. _Two Of about 50 nm in thickness by plasma CVD using a mixed gas of _Two A film 21 is deposited.
[0147]
In the method of manufacturing the semiconductor device 20 according to the present embodiment, a single crystal Si substrate 10a in which a portion that becomes a single crystal Si thin film transistor 16a when thinned is separately formed is formed, and the single crystal Si substrate 10a is formed on an insulating substrate. 2 is formed.
[0148]
Specifically, a part of a CMOS process in a general IC manufacturing line, that is, a gate electrode 12, a gate insulating film 13, source / drain impurity ion implantation (BF ³⁺ , P ⁺ ), A protective insulating film, and a flattening film (BPSG) are formed, and then a flattening process is performed by CMP (Chemical-mechanical Polishing). Subsequently, a SiO2 film having a thickness of about 10 nm is formed. _Two Form a film, 5 × 10 ¹⁶ / Cm ^Two A single crystal Si substrate 10a having a hydrogen ion implanted portion 15 into which hydrogen ions of a dose of 5 are implanted at a predetermined energy is formed. Then, this is cut into a predetermined size suitable for the formation region on the insulating substrate 2.
[0149]
Then, as shown in FIG. 1B, both the transparent insulating substrate 2 and the cut single-crystal Si substrate 10a are SC-1 cleaned and activated, and then the single-crystal Si substrate 10a on the hydrogen ion implanted portion 15 side Are aligned at a predetermined position, and are adhered and joined at room temperature.
[0150]
As shown in FIG. 9, the alignment marks 94 on the single crystal Si and the alignment marks 93 on the side of the transparent substrate 2 are irradiated with visible light from the transparent substrate 2 side through the transparent substrate 2, here, Corning 1737 glass. Is detected and performed. In the example shown in FIG. 9, an alignment mark 94 on single-crystal Si on an alignment stage 91 is detected by using an alignment CCD camera 90 set on a microscope by epi-illumination, and finally detected by an electric signal. Is converted and processed.
[0151]
In the conventional method of aligning through a Si substrate by irradiating infrared rays, ICs and the like are opaque to visible light and UV light, and pass through a Si wafer that has a surface that scatters non-mirror light to prevent adsorption. Since the alignment mark is detected and alignment is performed, there is a problem that accuracy is deteriorated.
[0152]
Therefore, in the semiconductor device of the present embodiment, for example, the alignment marks 93 and 94 are detected through glass that is transparent to shorter wavelength visible light or UV light and does not scatter light. Compared with the method, it is possible to perform high-accuracy positioning.
[0153]
Further, the single crystal Si and the transparent substrate 2 made of glass are joined by Van der Waals force. Thereafter, by treatment at a temperature of 400 ° C. to 600 ° C., here, about 550 ° C., Si—OH + —Si—OH → Si—O—Si + H _Two O causes a reaction to change into a strong bond between atoms. Further, as shown in FIG. 1C, the temperature of the hydrogen ion implanted portion 15 is raised to a temperature at which hydrogen is released from the single crystal Si or higher, so that the hydrogen ion implanted portion 15 is cleaved at the boundary. Can be.
[0154]
Here, the single crystal Si thin film transistor 16 a is joined to the insulating substrate 2 via the inorganic insulating film 3. Therefore, the contamination of the single-crystal Si thin film 14a can be reliably prevented as compared with the case where bonding is performed using a conventional adhesive.
[0155]
Subsequently, an unnecessary portion of the single-crystal Si thin film 14a which has been peeled off and remains on the insulating substrate 2 is removed by etching, and the single-crystal Si is processed into an island shape, and the damaged layer on the surface is subjected to isotropic plasma etching or wet etching. Etching, here, is removed by light etching of about 10 nm by wet etching with buffered hydrofluoric acid. Thereby, as shown in FIG. 1I, a part of the MOSTFT is formed on the insulating substrate 2 on the single-crystal Si thin film 14a having a thickness of about 50 nm.
[0156]
After that, as shown in FIG. _Four And N _Two A second SiO film having a thickness of about 200 nm is formed by plasma CVD using a gas mixture with O. _Two The film 4 is deposited. In addition, SiH _Four An amorphous Si film 5 having a thickness of about 50 nm is deposited by plasma CVD using a gas.
[0157]
The amorphous Si film 5 is irradiated with an excimer laser to be heated and crystallized to grow a polycrystalline Si layer to form a non-single-crystal Si thin film 5 ′. Improve bonding strength.
[0158]
Next, as shown in FIG. 1F, unnecessary polycrystalline Si film 5 'is removed by etching to leave a portion serving as an active region of the device, thereby obtaining an island-shaped pattern.
[0159]
Next, using a mixed gas of TEOS and oxygen, a SiO 3 film having a thickness of about 350 nm is formed by plasma CVD. _Two A film is deposited, and this is etched back by about 400 nm by RIE which is anisotropic etching. Thereafter, SiH is used as a gate insulating film of the non-single-crystal Si thin film transistor 1a. _Four And N _Two SiO 2 having a thickness of about 60 nm by plasma CVD using a mixed gas with O _Two A film 7 is formed. At this time, sidewalls are formed at the ends of the pattern of the single-crystal Si thin film 14a and the pattern of the non-single-crystal Si thin film 5 '.
[0160]
Next, as shown in FIG. _Two By using a mixed gas of (oxygen) by P-CVD, as an interlayer planarizing insulating film, a SiO.sub. _Two A film 8 is deposited.
[0161]
Then, as shown in FIG. 1H, a contact hole 21 is opened, and a metal (AlSi) wiring 22 is formed in the contact hole 21 as shown in FIG.
[0162]
In the method of manufacturing a semiconductor device according to the present embodiment, as described above, the single-crystal Si thin film transistor 16a is formed before forming the non-single-crystal Si thin film (polycrystalline Si thin film) 5 '. Thereby, the single crystal Si substrate can be bonded while the flatness of the insulating substrate 2 is maintained, so that problems such as poor bonding can be prevented.
[0163]
In this embodiment, when the implantation energy of hydrogen ions is increased so that the peak position of hydrogen atoms is located deeper from the surface and the thickness of the single-crystal Si thin film 14a is increased, there is no significant change in the thickness from 50 nm to 100 nm. . However, as the thickness increased from 300 nm to 600 nm, the S value of the TFT gradually increased, and the off current increased remarkably. Therefore, the thickness of the single-crystal Si thin film 14a depends on the doping density of impurities, but is preferably about 600 nm or less, preferably about 500 nm or less, and more preferably 100 nm or less.
[0164]
Further, when the code 7059 (barium-borosilicate glass) manufactured by Corning is used instead of the code 1737 (alkali earth-aluminoborosilicate glass) manufactured by Corning as the insulating substrate 2, the bonding can be performed in the same manner, but the cleavage and peeling are performed. Success rates have worsened.
[0165]
This is because, as shown in FIG. 8, the difference in linear expansion between Si and the code 1759 when the temperature is raised from about room temperature to 600 ° C. is about 250 ppm, while the difference in the linear expansion between the code 7059 and Si is about 70 ppm. This is because it is as large as about 800 ppm.
[0166]
Therefore, from the viewpoint of improving the success rate of cleavage delamination, the difference in linear expansion between the insulating substrate and Si from room temperature to 600 ° C. is desirably about 250 ppm or less.
[0167]
The single crystal Si thin film transistor 16a is not limited to the configuration shown in the present embodiment. For example, the same effect as described above can be obtained even with a MOS-type thin film transistor having a gate bottom structure.
[0168]
[Embodiment 2]
Another embodiment of the single crystal Si substrate, the semiconductor device and the method for manufacturing the same of the present invention will be described below with reference to FIGS. 2 (a) to 2 (i). For the sake of convenience, description of members having the same functions as those described in the semiconductor device 20 of the first embodiment will be omitted.
[0169]
In the semiconductor device 30 of the present embodiment, the MOS single-crystal Si thin film transistor 16a and the non-single-crystal Si thin film transistor 1a are formed in different regions on the insulating substrate 2 similarly to the semiconductor device 20 of the first embodiment. I have. Therefore, as for the semiconductor device 30 of the present embodiment, similarly to the semiconductor device 20 of the first embodiment, a high-performance and high-function semiconductor device can be obtained.
[0170]
On the other hand, the semiconductor device 30 is different from the semiconductor device 20 of the first embodiment in that the single-crystal Si thin film transistor 16a is formed after the formation of the non-single-crystal Si thin film transistor 1a.
[0171]
The semiconductor device 30 of the present embodiment has a structure in which the SiO 2 _Two It includes a film 3, a non-single-crystal Si thin-film transistor 1a, a single-crystal Si thin-film transistor 16a, a metal wiring 22, and the like.
[0172]
The non-single-crystal Si thin film transistor 1a is composed of a non-single-crystal Si thin film 5 'and SiO as a gate insulating film. _Two A film 7 and a gate electrode 6 are provided. As described above, the single-crystal Si thin film transistor 16a is formed on the insulating substrate 2 on which the non-single-crystal Si thin film transistor 1a is formed via the interlayer insulating film 7.
[0173]
In addition, before the single-crystal Si substrate 10a for forming the single-crystal Si thin film transistor 16a is formed on the insulating substrate 2, a process for forming a MOS-type single-crystal Si thin film transistor is performed. Specifically, a gate electrode and a gate insulating film are formed, impurity ions of source / drain are implanted, and channel implantation is performed on each of the P-type and N-type channel portions. Here, a P-type Si substrate is used. In addition, the channel implantation of the N-type TFT is omitted. On the gate electrode, an interlayer planarization film, here, SiO by CVD _Two And a step of melting the BPSG after the deposition and flattening the BPSG by CMP and cutting it into a predetermined shape. Then, the single crystal Si substrate 10a having the MOS type single crystal Si thin film transistor 14a formed on the surface is washed with an SC1 cleaning solution to remove particles and activate the surface. Then, the alignment mark on the single-crystal Si and the alignment mark on the transparent substrate side were detected, and the alignment was performed. Here, the processing is performed so that the gate length becomes 0.35 μm, and the processing rule of the contact and the metal wiring portion corresponds to the photolithography accuracy on a large glass substrate and the alignment accuracy at the time of bonding. And the space was 2 microns.
[0174]
In the semiconductor device 30 of the present embodiment, MOS transistors are formed in the region of the non-single-crystal Si thin film 5 'and the region of the single-crystal Si thin film 14a. In the transistors of the same conductivity type formed in each region, at least one of the mobility, the sub-threshold coefficient, and the threshold value is different for each region. Therefore, a transistor can be formed in a corresponding single-crystal Si or non-single-crystal Si thin film region according to desired characteristics.
[0175]
Here, a method of manufacturing the semiconductor device 30 will be described below with reference to FIGS. 2A to 2I.
[0176]
First, as the insulating substrate 2, a code 1737 (alkali earth-aluminoborosilicate glass) manufactured by Corning, which is a high strain point glass, is used. Then, as shown in FIG. 2A, TEOS (Tetra Ethoxy Silane, ie, Si (OC) _Two H _Five 4) and O _Two (Oxygen) and a plasma CVD (Plasma Chemical Vapor Deposition, hereinafter referred to as P-CVD) using a mixed gas of SiO. _Two The film 3 is deposited.
[0177]
Furthermore, SiH _Four An amorphous Si film 5 having a thickness of about 50 nm is deposited by plasma CVD using a gas.
[0178]
Subsequently, as shown in FIG. 2B, the amorphous Si film 5 is irradiated with an excimer laser, heated and crystallized, and a polycrystalline Si layer is grown to form a non-single-crystal Si thin film 5 ′. . The heating of the amorphous Si film 5 is not limited to irradiation heating by excimer laser, but may be heating by irradiation with another laser or heating using a furnace, for example. Further, in order to promote crystal growth, at least one of Ni, Pt, Sn, and Pd may be added to the amorphous Si film 5 ′.
[0179]
Then, a predetermined region of the non-single-crystal Si thin film 5 'is removed by etching as shown in FIG.
[0180]
Next, as shown in FIG. 2C, SiH is used for TFT of non-single-crystal Si (here, polycrystalline Si or continuous grain boundary Si). _Four And N _Two By plasma CVD using O gas, a gate insulating film of _Two After depositing the film 7, the gate electrode 6 is formed.
[0181]
Next, as shown in FIG. 2D, source / drain impurity ions are implanted, and TEOS (Tetra Ethoxy Silane, ie, Si (OC) _Two H _Five ) _Four ) And O _Two About 250 nm thick SiO 2 as an interlayer insulating film by plasma CVD using a mixed gas with (oxygen). _Two The film 4 is deposited.
[0182]
Here, in the semiconductor device 30 of the present embodiment, similarly to the semiconductor device 20 of the first embodiment, a part of the process of the transistor that becomes the MOS type single crystal Si thin film transistor 16a is performed by implanting hydrogen ions or the like. A completed single crystal Si substrate 10a is formed.
[0183]
Then, the single-crystal Si substrate 10a is cut by dicing or anisotropic etching with KOH or the like into a slightly smaller shape than a predetermined region where the non-single-crystal Si thin film 5 'is removed by etching.
[0184]
The portion from which the non-single-crystal Si thin film has been removed in order to join the crystal Si is previously planarized by GCIB (Gas Cluster Ion Beam) of a gas containing a low-energy (about 3 keV) halide. If a SiO2 film of about 10 nm is formed thereon by PECVD using TEOS or TMCTS (Tetramethylcyclotetrasiloxane), the bonding property is further improved.
[0185]
After the insulating substrate 2 on which the non-single-crystal Si thin film 5 'is formed and the single-crystal Si substrate 10a are washed with SC-1 to remove particles and activate the surface, as shown in FIG. The hydrogen ion-implanted portion 15 side of the single-crystal Si substrate 10a is aligned at room temperature by a method similar to that of the first embodiment at the room where the above-mentioned etching has been removed, and closely bonded. Here, SC-1 cleaning is one of the cleaning methods generally called RCA cleaning, and uses a cleaning liquid including ammonia, hydrogen peroxide, and pure water.
[0186]
The single-crystal Si substrate 10a is formed on the insulating substrate 2 by using SiO.sub.2 as a gate insulating film. _Two After the formation of the film 7, SiO as an interlayer insulating film _Two It may be before the deposition of the film 4.
[0187]
Thereafter, heat treatment is performed at a temperature of 300 ° C. to 600 ° C., here about 550 ° C., and the temperature of the hydrogen ion implanted portion 15 of the single crystal Si substrate 10a is increased to a temperature at which hydrogen is released from single crystal Si or higher. As a result, the single crystal Si substrate 10a can be cleaved off at the hydrogen ion implanted portion 15 as a boundary. In this heat treatment, the hydrogen ion implanted portion 15 of the single crystal Si substrate 10a may be heated by laser irradiation or lamp annealing including a peak temperature of about 700 ° C. or more.
[0188]
Next, the damaged layer on the surface of the single-crystal Si substrate 10a, which has been peeled off and remains on the insulating substrate 2, is subjected to isotropic plasma etching or wet etching, in this case, isotropic plasma etching using buffered hydrofluoric acid to a thickness of about 20 nm. Remove by etching. Thus, as shown in FIG. 2F, a non-single-crystal Si thin film 5 ′ and a single-crystal Si thin film 14a each having a thickness of about 50 nm can be obtained on one insulating substrate 2. After bonding the single-crystal Si substrate 10a to the insulating substrate 2 at room temperature, heat-treating it at 300 to 350 ° C. for about 30 minutes, heat-treating it at about 550 ° C., and cleaving it off. Diminished.
[0189]
At this point, sufficient bonding strength between the Si and the substrate has already been obtained, but in order to further improve the bonding strength, a lamp annealing process is performed at about 800 ° C. for 1 minute. This process may be performed simultaneously with the activation of the source / drain implanted impurities.
[0190]
Then, as shown in FIG. 2G, SiO 2 is used as an interlayer planarizing insulating film. _Two The process of depositing the film 8, opening the contact hole 21 as shown in FIG. 2H, and forming the metal wiring 22 as shown in FIG. 2I is the same as in the first embodiment. .
[0191]
In the method of manufacturing a semiconductor device according to the present embodiment, as described above, the non-single-crystal Si thin film transistor 1a is formed first, and then the single-crystal Si thin film transistor 16a is formed. As compared with the semiconductor device 20 of the first embodiment, the manufacturing process can be simplified and the single crystal Si thin film can be prevented from being contaminated.
[0192]
[Embodiment 3]
Still another embodiment of the single crystal Si substrate, the semiconductor device, and the method for manufacturing the same of the present invention will be described below with reference to FIGS. 3 (a) to 3 (f) and FIG. Note that, for convenience of description, description of members having functions similar to those described in Embodiments 1 and 2 will be omitted.
[0193]
As shown in FIG. 3F, the semiconductor device 40 of this embodiment has a semiconductor in which a non-single-crystal Si thin film transistor and a single-crystal Si thin film transistor are formed on one insulating substrate 2 as in the first embodiment. An apparatus is common in that a single-crystal Si thin film transistor is formed before a non-single-crystal Si thin film is formed. On the other hand, the difference is that a transistor formed as a single crystal Si thin film transistor is not a MOS type but a bipolar type single crystal Si thin film transistor.
[0194]
As described above, by forming a MOS transistor as a non-single-crystal Si thin-film transistor and a bipolar transistor as a single-crystal Si thin-film transistor, the semiconductor device 40 having characteristics different from those of the semiconductor devices 20 and 30 described in the first and second embodiments. Can be obtained.
[0195]
Here, the bipolar thin film transistor is provided with a narrow reverse conductivity type layer (base) in the middle of the current path between the semiconductor collector and the emitter of the first conductivity type, and reverses the bias between the emitter and the base. Thus, the transistor controls the number of minority carriers flowing from the emitter to the base, and controls the current due to the minority carriers flowing into the collector by diffusing the base.
[0196]
Since the bipolar thin film transistor does not have a gate electrode unlike the MOS type, the structure can be simplified and the production yield can be improved. Further, it has advantages of excellent linearity in a saturation region and a high reaction speed, and is capable of performing linear signal processing. Therefore, it is used for an analog amplifier, a current buffer, a power supply IC, and the like.
[0197]
In the bipolar single-crystal Si thin film transistor, the contact pattern is formed according to a looser design rule than the base pattern.
[0198]
Thereby, the metal wiring or a part of the metal wiring of the semiconductor device on which the bipolar type single crystal Si thin film transistor is formed can be processed simultaneously with the metal wiring on the large-sized substrate, and the processing capability can be reduced while the cost is reduced. Alternatively, connection to other circuit blocks or TFT arrays is facilitated, and a reduction in product yield due to poor connection to an external device or the like can be reduced.
[0199]
As shown in FIG. 3 (f), the semiconductor device 40 has _Two The film 3 includes a non-single-crystal Si thin film transistor 1a including a non-single-crystal Si thin film 5 ′ made of polycrystalline Si, a bipolar single-crystal Si thin film transistor 16b including a single-crystal Si thin film 14b, and a metal wiring 22.
[0200]
As described above, since the MOS-type non-single-crystal Si thin film transistor 1a and the bipolar-type single-crystal Si thin-film transistor 16b are formed on one insulating substrate 2, the MOS-type, bipolar-type, or non-single-crystal Si thin-film transistor is formed. By utilizing the characteristics of the thin film and the single-crystal Si thin film, it is possible to obtain a semiconductor device 40 capable of coping with more uses.
[0201]
Here, a method for manufacturing the semiconductor device 40 will be described below with reference to FIGS. 3A to 3F.
[0202]
The insulating substrate 2 is made of Corning's code 1737 (alkaline earth-aluminoborosilicate glass), and has TEOS and O 2 on its surface as shown in FIG. _Two Of about 20 nm in thickness by plasma CVD using a mixed gas of _Two The film 3 is deposited.
[0203]
Here, in the semiconductor device 40 of the present embodiment, similarly to the semiconductor devices 20 and 30 of the first and second embodiments, before the single-crystal Si thin film transistor 16b is formed on the insulating substrate 2, the single-crystal Si substrate 10b is A structure that becomes a bipolar type single-crystal Si thin film transistor 16b when cleaved and separated from the hydrogen ion implanted portion is formed, and then bonded to the insulating substrate 2 in this state.
[0204]
Specifically, first, a junction portion of a PNP junction or an NPN junction of a bipolar thin film transistor is formed. Next, by oxidizing the surface or depositing an oxide film, a SiO2 film having a thickness of about 200 nm is formed. _Two The film 11 is formed. And 5 × 10 ¹⁶ / Cm ^Two A bipolar type single crystal Si thin film transistor having a hydrogen ion implanted portion 15 in which hydrogen ions of a dose of 2 are implanted to a predetermined depth with a predetermined energy is formed.
[0205]
As described above, the bipolar type single crystal Si thin film transistor 16b also has a hydrogen ion implanted portion in which a predetermined concentration of hydrogen ions is implanted at a predetermined depth, similarly to the MOS type.
[0206]
Subsequently, the single-crystal Si substrate 10b is cut into an appropriate shape in advance and formed on the insulating substrate 2.
[0207]
After the insulating substrate 2 and the cut single-crystal Si substrate 10b are cleaned by SC-1 and activated, the hydrogen ion implanted portion 15 side of the single-crystal Si thin film transistor 16b is placed on the insulating substrate 2 as shown in FIG. Are aligned at room temperature in the same manner as in Example 1, and are brought into close contact with each other and joined.
[0208]
In the semiconductor device 40 of the present embodiment, as shown in FIG. 4, impurity ions are implanted into P and N regions, and a plane (Lateral) in which the collector 25, the base 26, and the emitter 27 are planarly arranged. Although a bipolar type thin film transistor having the above structure is shown, a vertical type thin film transistor may be used like a conventional bipolar thin film transistor. Further, a junction may be formed by diffusing impurities. Further, an SIT (Static Induction Transistor) or a diode can be similarly applied.
[0209]
However, by forming a planar type bipolar thin film transistor as in the present embodiment, it is not necessary to perform a planarization process before formation, so that the manufacturing process can be further simplified and the production efficiency can be improved.
[0210]
Thereafter, heat treatment is performed at a temperature of 400 ° C. to 600 ° C., here, about 550 ° C., and the temperature of the hydrogen ion implanted portion 15 of the single-crystal Si substrate 10b is raised to a temperature at which hydrogen is released from Si, thereby implanting hydrogen ions. The unnecessary portion 11 of the single-crystal Si substrate 10b is cleaved off at the portion 15 to form a bipolar single-crystal Si thin film transistor 16b on the insulating substrate 2.
[0211]
Next, the damaged layer on the surface of the single crystal Si substrate 10b remaining on the insulating substrate 2 is removed by light etching of about 20 nm by isotropic plasma etching or wet etching, here, wet etching with buffered hydrofluoric acid. . As a result, as shown in FIG. 3C, a bipolar single crystal Si thin film transistor 16b having a thickness of about 80 nm can be formed on the insulating substrate 2.
[0212]
After that, as shown in FIG. _Four And N _Two By plasma CVD using a mixed gas with O, SiO 2 having a thickness of about 200 nm is used as an interlayer insulating film. _Two The film 4 is deposited. Further, as shown in FIG. _Four An amorphous Si film 5 having a thickness of about 50 nm is deposited by plasma CVD using a gas.
[0213]
Next, as shown in FIG. 3E, the amorphous Si film 5 is irradiated with an excimer laser to be heated and crystallized, and a polycrystalline Si layer is grown to form a non-single-crystal Si thin film 5 '. At this time, the bonding strength of the bipolar type single crystal Si thin film transistor 16b to the insulating substrate 2 can be improved.
[0214]
Next, as shown in FIG. 3F, unnecessary portions of the Si film are removed by etching while leaving a portion of the non-single-crystal Si thin film 5 'which becomes an active region of the device, thereby obtaining an island-shaped pattern. Then, by plasma CVD using a mixed gas of TEOS and oxygen, a SiO 3 film having a thickness of about 350 nm _Two A film 7 is deposited, and a photoresist of about 350 nm is further applied on the entire surface as a resin flattening film. _Four The entire resin flattening film and SiO 2 are anisotropically etched by RIE (reactive ion etching) using a gas containing _Two A part of the film 4 is etched back (not shown), and after planarization, SiH is used as a gate insulating film. _Four And N _Two SiO 2 having a film thickness of about 60 nm by plasma CVD using a mixed gas with O _Two A film 7 is formed.
[0215]
And SiO _Two A gate electrode 6 is formed on the film 7, and the gate electrode 6 and SiO as a gate insulating film are formed. _Two A non-single-crystal Si thin film transistor 1a comprising the film 7 and the non-single-crystal Si thin film 5 'can be obtained.
[0216]
Thereafter, SiO as an interlayer planarization insulating film _Two The steps of forming the film 8, opening the contact hole 21 and forming the metal wiring 22 are the same as those in the first and second embodiments, and a description thereof will be omitted.
[0219]
As described above, the method of manufacturing the semiconductor device 40 according to the present embodiment includes the steps of forming the bipolar single-crystal Si thin film transistor 16b and then forming the non-single-crystal Si thin film transistor 1a made of a polycrystalline Si thin film. 2, the bonding process can be facilitated, and the bonding strength of the bipolar type single crystal Si thin film transistor 16b to the insulating substrate 2 can be improved.
[0218]
Further, since the single crystal Si thin film transistor to be formed is of a bipolar type, flattening treatment is not required, and manufacturing cost can be reduced. Further, as in the case of the MOS type, a part of the metal wiring may be formed in advance and flattened, thereby increasing the integration density.
[0219]
Note that, in the semiconductor device 40 of the present embodiment, as shown in FIG. 3F, the transistor group is not element-separated, but leakage current is a problem, or crosstalk between elements is a problem. In this case, element isolation may be performed.
[0220]
[Embodiment 4]
Still another embodiment of the single crystal Si substrate, the semiconductor device and the method for manufacturing the same of the present invention will be described below with reference to FIGS. 5 (a) to 5 (f). Note that, for convenience of description, descriptions of members having functions similar to those described in Embodiments 1 to 3 are omitted.
[0221]
The semiconductor device 50 according to the first embodiment is different from the semiconductor device according to the first embodiment in that a MOS single-crystal Si thin film transistor and a MOS non-single-crystal Si thin film transistor are formed on one insulating substrate 2. Common to 20. On the other hand, this embodiment differs from the semiconductor device 20 of the first embodiment in that a continuous grain boundary Si (Continuous Grain Silicon) is used as the non-single-crystal Si thin film.
[0222]
As described above, by using the continuous grain Si as the non-single-crystal Si thin film, it is possible to obtain the non-single-crystal Si thin film transistor 1b having higher characteristics than the non-single-crystal Si thin film transistor made of polycrystalline Si.
[0223]
The semiconductor device 50 of the present embodiment has _Two It includes a film 3, a MOS-type non-single-crystal Si thin-film transistor 1b, and a MOS-type single-crystal Si thin-film transistor 16a.
[0224]
In particular, the non-single-crystal Si thin film transistor 1b is formed by using, as the non-single-crystal Si thin film 52 ′, polycrystalline Si having a uniform crystal growth direction, so-called continuous grain boundary Si (Continuous Grain Silicon).
[0225]
Note that the mobility of the conventional N-channel TFT formed in the continuous grain boundary Si region is approximately 200 cm. ^Two / V · sec, whereas the N-channel TFT formed in the region of the single crystal Si thin film 14a in the active matrix substrate for a liquid crystal display on which the semiconductor device 50 of the present embodiment is formed is about 550 cm. ^Two / V · sec mobility was obtained. Therefore, it is possible to obtain an active matrix substrate capable of responding faster than before.
[0226]
According to the active matrix substrate for liquid crystal display, the device formed in the region of the non-single-crystal Si thin film 52 'as well as the driver requires a signal of 7 to 8 V and a power supply voltage, whereas the single-crystal Si thin film 14a The timing controller, which is a device formed in the region of, operates stably with the 2.7 V signal and the power supply voltage.
[0227]
Here, the manufacturing process of the semiconductor device 50 will be described below with reference to FIGS. 5A to 5F.
[0228]
In this embodiment, as in the first embodiment, first, code 1737 (alkaline earth-aluminoborosilicate glass) manufactured by Corning Co., Ltd. is used as the insulating substrate 2, and as shown in FIG. TEOS and O _Two By plasma CVD using a mixed gas, about 100 nm of SiO _Two The film 3 is deposited.
[0229]
Further, as shown in FIG. _Two SiH is applied to the entire surface of the film 3 _Four An amorphous Si thin film 51 of about 50 nm is deposited by plasma CVD using a gas. In addition, SiH _Four And N _Two Approximately 200 nm SiO by plasma CVD using O mixed gas _Two A film 52 is deposited.
[0230]
SiO _Two After an opening is formed in a predetermined region of the film 52 by etching, the surface of the amorphous Si thin film 51 is thinly oxidized in order to control the hydrophilicity of the surface of the amorphous Si thin film 51 in the opening. Oxide film (SiO _Two Film), and a Ni acetate aqueous solution is spin-coated thereon.
[0231]
Next, solid phase growth is performed at a temperature of 580 ° C. for about 8 hours to grow polycrystalline Si that promotes crystal growth in a uniform crystal growth direction, that is, a so-called continuous grain boundary Si (Continuous Grain Silicon) to continuously grow the crystal. A crystal grain boundary Si thin film 51 'is formed.
[0232]
Further, as shown in FIG. 5C, the SiO on the continuous grain boundary Si thin film 51 'is _Two The film 52 is removed. Thereafter, a predetermined region of the continuous crystal grain boundary Si thin film 51 'is removed by etching.
[0233]
Here, as in the case of Example 2, the bonding property was further improved by flattening the surface with a low energy (about 3 keV) halide gas GCIB. Also in the semiconductor device 50 of the present embodiment, a structure that becomes a MOS type single crystal Si thin film transistor is formed by cleavage and thinning in the same manner as in the first embodiment, and a single ion implanted with hydrogen ions at a predetermined concentration and a predetermined energy is formed. A crystalline Si substrate 10a is prepared.
[0234]
Then, as shown in FIG. 5D, the insulating substrate 2 and the single-crystal Si substrate 10a on which the continuous crystal grain boundary Si thin film 51 'is formed are activated by SC-1 cleaning, and then the single-crystal Si substrate 10a is activated. Is positioned at room temperature in the same manner as in Example 1 to the region where the hydrogen ion implanted portion 15 has been removed by etching, and adhered and joined.
[0235]
At this time, the distance between the continuous grain boundary Si thin film 51 ′ and the single crystal Si substrate 10a is at least 0.3 μm, preferably 0.5 μm or more. This prevents metal atoms such as Ni, Pt, Sn, and Pd used in the later-described manufacturing process from diffusing into the region of the single-crystal Si thin film 14a, and stabilizes the characteristics of the single-crystal Si thin-film transistor. it can.
[0236]
Thereafter, the temperature of the hydrogen ion implanted portion 15 of the single-crystal Si substrate 10a is increased by laser irradiation or lamp annealing including a peak temperature of about 700 ° C. or more to a temperature equal to or higher than the temperature at which hydrogen is released from the single-crystal Si. As shown in FIG. 5E, the unnecessary portion 11 of the single-crystal Si substrate 10a is cleaved off at the hydrogen ion implanted portion 15.
[0237]
Next, the damaged layer of the single-crystal Si thin film 10a remaining on the insulating substrate 2 is removed by isotropic plasma etching or wet etching, here, about 10 nm lightly etched by wet etching with buffered hydrofluoric acid.
[0238]
As a result, a continuous grain boundary Si thin film 51 ′ and a single crystal Si thin film 14a each having a thickness of about 50 nm can be formed on the insulating substrate 2.
[0239]
Next, unnecessary portions on the continuous crystal grain boundary Si thin film 51 'are removed by etching.
[0240]
Next, the SiO 2 near the active region of the device _Two An opening is formed in the film and SiO _Two Using the film as a mask to getter Ni added to promote crystal growth, a high concentration of P ⁺ Ions are implanted (15 keV, 5 × 10 ^Fifteen / Cm ^Two ), Heat treatment at RTA at a temperature of about 800 ° C. for 1 minute.
[0241]
Although a physical space is provided to prevent Ni atoms from diffusing into the single-crystal Si thin film 14a, a very small amount of Ni atoms may be mixed during the process. Therefore, it is desirable to perform gettering also on the active region of the single-crystal Si thin film 14a. However, when space is prioritized, gettering may be omitted as a design option.
[0242]
Next, an unnecessary portion of the unnecessary continuous crystal grain boundary Si thin film 51 'and the single-crystal Si thin film 14a are removed by etching, leaving a portion serving as an active region of the device, thereby obtaining an island-like pattern.
[0243]
Next, an about 350 nm-thick SiO 2 film is formed by P-CVD using a mixed gas of TEOS and oxygen. _Two After depositing a film and etching it back about 400 nm by RIE which is an anisotropic etching, _Four And N _Two An approximately 60 nm-thick SiO 2 film serving as a gate insulating film is formed by plasma CVD using a gas mixture with O. _Two A film 7 is formed.
[0244]
At this time, sidewalls are formed at the ends of the pattern of the continuous crystal grain boundary Si thin film 51 ′ and the pattern of the single crystal Si thin film 14a.
[0245]
Thereafter, SiO as an interlayer planarization insulating film _Two The steps of forming the film 8, opening the contact hole 21 and forming the metal wiring 22 are the same as those in the first and second embodiments, and a description thereof will be omitted.
[0246]
As described above, in the method of manufacturing the semiconductor device 50 according to the present embodiment, after forming polycrystalline Si as a non-single-crystal Si thin film, a single-crystal Si thin-film transistor 16a is formed, and then the gate insulation of the non-single-crystal Si thin-film transistor 1b is formed. SiO as film _Two Since the film 7 is formed, SiO _Two The process can be simplified by reducing the number of films.
[0247]
[Embodiment 5]
Another embodiment of the single crystal Si substrate, the semiconductor device and the method for manufacturing the same of the present invention will be described below with reference to FIGS. 6 (a) to 6 (h). For convenience of explanation, members having the same functions as those described in the first to fourth embodiments will not be described.
[0248]
The semiconductor device 60 according to the third embodiment is different from the semiconductor device according to the third embodiment in that a bipolar single-crystal Si thin film transistor and a MOS non-single-crystal Si thin film transistor are formed on one insulating substrate 2. Common to 40.
[0249]
On the other hand, it differs from the semiconductor device 40 of Embodiment 3 in that a bottom-gate transistor is formed as a non-single-crystal Si thin film transistor.
[0250]
The semiconductor device 60 according to the present embodiment is manufactured by the same manufacturing process as the semiconductor device 30 according to the second embodiment, with respect to the steps up to the bonding and cleavage separation of the single crystal Si substrate shown in FIG. The semiconductor device has the same structure as the semiconductor device 30.
[0251]
In the subsequent steps, as shown in FIG. 6 (i), after element isolation of a single crystal device portion, an interlayer insulating film is formed entirely, and an amorphous Si TFT and a circuit are formed thereon. A gate insulating film 62 and a non-doped amorphous Si 63 are formed in an island shape on the gate electrode 6. ⁺ An amorphous Si thin film 64 and metal wiring 65 for source / drain wiring are formed.
[0252]
Although not shown, for a liquid crystal display or the like, a protective insulating film, a planarizing film, and a transparent conductive film for display are further formed thereon.
[0253]
Here, the method of manufacturing the semiconductor device 60 will be described below with reference to FIGS. 6A to 6H.
[0254]
First, as shown in FIG. 6 (a), Corning's code 1737 (alkaline earth-aluminoborosilicate glass) is used as the insulating substrate 2, and TEOS and O _Two About 50 nm in thickness by plasma CVD using a mixed gas of _Two The film 3 is deposited.
[0255]
Here, similarly to the semiconductor device 40 of the third embodiment, a single-crystal Si substrate 10b in which a structure 16b to be a bipolar-type single-crystal Si thin film transistor is formed in advance after cleavage into a thin film is prepared. After implanting hydrogen ions with energy, it is cut into a predetermined size.
[0256]
After the insulating substrate 2 and the cut single-crystal Si substrate 10b are activated by SC-1 cleaning, as shown in FIG. 6B, the hydrogen ion implanted portion 15 side of the single-crystal Si substrate 10b is set at a predetermined position. Alignment is performed at the position in the same manner as in Example 1, and it is brought into close contact at room temperature and joined. Although not shown in the figure, metal wiring may be formed in advance on the single crystal Si substrate, and in this case, there is an advantage that high integration by miniaturization is possible.
[0257]
Thereafter, a heat treatment is performed at a temperature of 400 ° C. to 600 ° C., here about 550 ° C., and the temperature of the hydrogen ion implanted portion 15 of the single crystal Si substrate 10b is increased to a temperature at which hydrogen is released from the single crystal Si. As shown in FIG. 6C, the single-crystal Si substrate 10b is cleaved off at the hydrogen ion implanted portion 15. Even in the case where metal wiring is formed in advance, if the temperature is within this temperature range, even if the metal is an Al-based alloy, the metal is below the melting point and can be used.
[0258]
Next, a part of the single-crystal Si thin film 14b remaining on the insulating substrate 2 is removed by etching, and the single-crystal Si thin film 14b is processed into an island shape, and then the damaged layer on the surface is subjected to isotropic plasma etching or wet etching. Here, it is removed by light etching of about 10 nm by wet etching with buffered hydrofluoric acid.
[0259]
As a result, a part of the MOS thin film transistor including the single-crystal Si thin film 14b having a thickness of about 50 nm is formed on the insulating substrate 2.
[0260]
Thereafter, as shown in FIG. 6D, the entire surface of the insulating substrate 2 is covered with SiH. _Four And N _Two SiO 2 having a thickness of about 200 nm by plasma CVD using a mixed gas with O _Two A film 61 is deposited.
[0261]
Further, a TaN thin film is deposited on the entire surface by sputtering, and processed into a predetermined pattern to form wiring of a gate layer such as a gate electrode 6 and a gate bus line.
[0262]
Note that the material of the wiring of the gate layer is not limited to this material, and various metal materials such as Al and Al alloy can be selected according to resistance, heat resistance, compatibility with a later manufacturing process, and the like.
[0263]
Subsequently, as shown in FIG. _Four Gas and NH _Three A silicon nitride film 62 of about 200 nm is formed as a gate insulating film by plasma CVD using a gas. And on top of that, _Four An amorphous Si film 63 having a thickness of about 50 nm is formed by plasma CVD using a gas, and SiH is further formed thereon. _Four Gas and PH _Three About 30 nm thick N doped with P by mixed gas ⁺ An amorphous Si film 64 is sequentially and sequentially deposited.
[0264]
Next, as shown in FIG. 6 (f), the non-doped and P-doped amorphous Si film is etched into an island shape except for a portion to be a transistor, and further, as shown in FIG. 6 (g). A Ti thin film is deposited thereon as a metal film 65 for source bus wiring by sputtering, and is processed into a predetermined pattern.
[0265]
The metal film 65 for the source bus wiring is not limited to Ti, but may be made of various metal materials, such as Al and Al alloy, depending on the resistance, heat resistance, compatibility with later processes, and the like. Can be selected.
[0266]
Next, as shown in FIG. 6 (h), N in a predetermined (portion-to-drain channel) region of the island pattern of the amorphous Si63. ⁺ The layer is etched away (part of the non-doped layer is also etched) to form an amorphous SiTFT.
[0267]
Then, as a protective insulating film, SiH _Four Gas and NH _Three A silicon nitride film of about 200 nm is deposited by plasma CVD using a gas.
[0268]
Thereafter, in the same manner as in the process of manufacturing an active matrix substrate using ordinary amorphous Si, for example, by forming a resin interlayer film and forming a display transparent electrode, an active matrix substrate used for a liquid crystal display is completed.
[0269]
As described above, since the semiconductor device 60 of the present embodiment uses amorphous Si as the non-single-crystal Si thin film transistor 1c, the manufacturing process of the non-single-crystal Si thin film is simplified, and the cost of the semiconductor device 60 is reduced. Can be achieved. Further, the semiconductor device 60 can be applied to a low power consumption type LCD or the like due to a low off current characteristic which is a characteristic of amorphous Si.
[0270]
Further, since the structure of the non-single-crystal Si thin film transistor 1c is a so-called bottom gate structure in which the gate electrode 6 is arranged on the insulating substrate 2, the formation of amorphous Si becomes easy, and the productivity is reduced due to simplification of the process. And the cost of the semiconductor device can be reduced.
[0271]
As shown in FIG. 7, each of the semiconductor devices described in the first to fifth embodiments includes a high-function circuit unit (high-speed DAC, high-speed timing controller, image processing circuit, etc.) on an active matrix substrate 70 having a display unit 72. ) 71 can be formed.
[0272]
In the single-crystal Si thin film transistors 16a and 16b of the first to fifth embodiments, a wiring layer made of a refractory metal may be further formed on the gate layer. Here, a wiring of a circuit portion requiring fine processing is formed using a TiW alloy, and furthermore, TEOS or SiH _Four And N _Two After an interlayer insulating film is formed by CVD or PECVD using O gas or the like, the interlayer insulating film may be planarized by CMP or the like, and hydrogen ions may be implanted therein at a predetermined energy and a predetermined concentration.
[0273]
In this manner, a semiconductor device having a double metal wiring structure can be obtained by forming a single crystal Si thin film transistor on which a metal wiring is formed in advance on an insulating substrate, forming an oxide film, and further forming a metal wiring. Further, a functional circuit with high integration density can be formed.
[0274]
Here, the wiring layer made of the refractory metal only needs to have heat resistance to the heat treatment temperature at the time of cleavage and separation of the single crystal Si substrate. Polycrystalline Si, silicide of various metals, Ti, W, Mo, TiW, TaN, A material such as Ta can be used. Furthermore, when the single crystal Si substrate is cleaved and separated by a laser, the heat resistance may be low.
[0275]
In addition, the present invention is not limited to the contents described in the above embodiment. For example, the non-single-crystal Si forming method, the material of the interlayer insulating film, the film thickness, and the like may be determined by other means known to those skilled in the art. Can be realized.
[0276]
Further, the semiconductor device formed of single-crystal Si is not limited to a MOS transistor or a bipolar transistor, but may be, for example, an SIT or a diode.
[0277]
The semiconductor device of the present invention is an important advantage of the present invention in that a plurality of types of semiconductor devices having different characteristics can be integrated on the same glass substrate.
[0278]
In the first to fifth embodiments, an example in which two types of thin-film Si transistors having different characteristics are formed has been described. However, the present invention is not limited to this, and three or more types of characteristics may be used. Semiconductor device in which different devices are formed on one substrate.
[0279]
For example, when a MOS device and a bipolar transistor are formed as a single-crystal Si thin film transistor and a semiconductor device is formed as a non-single-crystal Si thin film transistor, a semiconductor device having three types of characteristics is formed. A semiconductor device which can be formed over one substrate and has higher performance and higher function can be obtained.
[0280]
In such a semiconductor device, it is more preferable that the thickness of the single-crystal Si thin film of the MOS thin film transistor made of single-crystal Si is smaller than that of the single crystal Si thin film of the bipolar thin film transistor.
[0281]
This is because it is known that a MOS thin film transistor generally has better characteristics when the film thickness is small, and a bipolar thin film transistor has good characteristics when the film thickness is relatively large.
[0282]
It is more preferable that the gate line width of the MOS thin film transistor made of a single crystal Si thin film is 1 μm or less. It is also preferable that the base width of a bipolar thin film transistor made of a single-crystal Si thin film be approximately 2.5 μm or less.
[0283]
Further, the base width is more preferably 1 μm or less. This is because the narrower the base width, the better the efficiency of the diffusion and passage of minority carriers and the shorter the time.
[0284]
Thus, the switching speed of the transistor can be increased.
[0285]
[Embodiment 6]
The following will describe still another embodiment of the single crystal Si substrate, the semiconductor device, and the method for manufacturing the same of the present invention. Note that, for convenience of description, descriptions of members having the same functions as the members described in Embodiments 1 to 5 are omitted.
[0286]
In the embodiment of the present invention, in the semiconductor devices of Embodiments 1 to 5, the thickness of the single crystal Si substrate before bonding is set to about 70 μm. Here, the same material and method were used except for the thickness of the single-crystal Si substrate before bonding, but the bondability between the glass substrate and the Si substrate was excellent in each case. Significantly reduced.
[0287]
In this embodiment, the thickness is reduced after the hydrogen ion implantation by the polishing method used for the IC card. Note that the thickness of the single-crystal Si is preferably as small as possible from the viewpoint of the bonding property, but it is preferably about 50 to 100 μm as a trade-off with ease of handling.
[0288]
In the first to sixth embodiments, a MOS transistor has been described, but the present invention is not limited to a MOS transistor. For example, even with a MIS transistor, the same effect as that obtained by using a MOS transistor can be obtained.
[0289]
Here, the MIS transistor uses a silicon nitride film or the like as a gate insulating film. Therefore, even if the gate insulating film has a high dielectric constant, the electric field effect becomes strong even when the gate insulating film has the same thickness. Is a transistor having such a characteristic that it can be operated at a low voltage.
[0290]
It is needless to say that the semiconductor device and the manufacturing method thereof according to the present invention are not limited to use in a liquid crystal display device, but are also effective for other devices such as an organic EL device. Further, it may be generally used not only as a display device but also as a high-performance integrated circuit.
[0291]
It should be noted that the present invention is not limited to the embodiments described above, and various changes can be made within the scope shown in the claims, and are obtained by appropriately combining the technical means disclosed in the different embodiments. Embodiments are also included in the technical scope of the present invention.
[0292]
【The invention's effect】
As described above, the single-crystal Si substrate according to the present invention is planarized after the oxide film, the gate pattern, and the impurity ion implanted portion are formed on the surface, and a predetermined concentration of hydrogen ions is formed at a predetermined depth. This is a configuration including an implanted hydrogen ion implantation unit.
[0293]
Therefore, a single-crystal Si substrate is bonded to an insulating substrate or the like on the oxide film forming side, and heat treatment is performed to change the bonding between the substrates into a bond between atoms to form a strong bond. By performing cleavage separation by heat treatment, there is an effect that a MOS single crystal Si thin film transistor can be easily obtained without using an adhesive.
[0294]
Also, for example, by joining the single crystal Si substrate of the present invention on an insulating substrate having a non-single crystal Si thin film transistor such as a polycrystalline Si thin film formed on the surface, and forming a MOS type single crystal Si thin film transistor, A semiconductor device in which a single-crystal Si transistor and a single-crystal Si transistor are formed in different regions over one substrate can be easily obtained.
[0295]
As described above, the single crystal Si substrate of the present invention has an impurity ion implanted portion or diffusion region having a pnp junction structure or an npn junction structure in which impurity ions are implanted in the vicinity of the surface, and a portion on the impurity ion implanted portion or the diffusion region. And an oxide film deposited on the substrate.
[0296]
Therefore, there is an effect that a bipolar thin film transistor including a single crystal Si thin film which can be easily formed on another insulating substrate can be obtained.
[0297]
Since a hydrogen ion implanted portion into which hydrogen ions of a predetermined concentration are implanted at the predetermined depth is provided, a single crystal Si substrate is bonded to an insulating substrate or the like on an oxide film deposition side, and a hydrogen ion implantation side is formed. By performing cleavage peeling in the above, there is an effect that a bipolar single crystal Si thin film transistor can be easily obtained without using an adhesive.
[0298]
More preferably, the oxide film is formed so as to have a thickness of 200 nm or more.
[0299]
Therefore, in the MOS transistor made of single-crystal Si, the variation in the threshold value, and in the bipolar type TFT made of single-crystal Si, the characteristic variation is small, and the on-resistance is suppressed low. _Two This has the effect of obtaining a single-crystal Si substrate that is appropriate for the balance between the efficiency of the film forming process and the step.
[0300]
As described above, the semiconductor device of the present invention has a configuration in which a non-single-crystal Si thin-film device and a single-crystal Si thin-film device are formed in different regions on an insulating substrate.
[0301]
Therefore, for example, a single crystal Si thin film device such as a single crystal Si thin film device is used for a device requiring higher performance such as a timing controller, and a non-single crystal Si thin film transistor or the like is used for the remaining devices. Using a single crystal Si thin film device, a semiconductor device in which a low-cost, high-performance, high-performance circuit system is integrated can be obtained. Further, for example, a large-sized semiconductor device capable of supporting a large-sized liquid crystal display panel, an organic EL panel, or the like can be manufactured.
[0302]
More preferably, the single crystal Si thin film device is joined to the insulating substrate via an inorganic insulating film.
[0303]
Therefore, since a device such as a single crystal Si thin film transistor can be formed on an insulating substrate without using an adhesive, there is an effect that single crystal Si can be prevented from being contaminated. Further, after the bonding, formation of a metal wiring, an inorganic insulating film, or etching can be easily performed. Furthermore, there is an effect that a device can be formed at low cost by forming a metal wiring and the like in common with the TFT process on a large substrate.
[0304]
It is more preferable that both the non-single-crystal Si thin film device and the single-crystal Si thin film device are MOS-type or MIS-type single-crystal Si thin-film transistors.
[0305]
Therefore, for example, in the case of a CMOS structure, power consumption can be reduced and a full output up to the power supply voltage is possible, so that a semiconductor device suitable for logic with low power consumption can be obtained.
[0306]
The MOS type single crystal Si thin film transistor is more preferably formed in the order of a gate, a gate insulating film, and Si from the insulating substrate side.
[0307]
Therefore, since the MOS thin film transistor is formed in a state where the gate is arranged on the insulating substrate side, a semiconductor device in which a MOS single crystal Si thin film transistor upside down is formed on a so-called insulating substrate can be obtained. The self-alignment process using the gate as a mask can be applied to the source / drain formation on the single crystal Si substrate, and the effect of the fixed charge on the glass substrate surface can be reduced. In addition, the effect of fixed charge, which is likely to occur at the junction interface between single crystal Si and the glass substrate, can be reduced by the gate shielding effect, and an established process using single crystal Si with the gate as a mask and using source / drain impurity ion implantation. Is applicable, so that there is an advantage that the yield can be increased.
[0308]
The thickness of the single-crystal Si thin film of the MOS thin film transistor is more preferably about 600 nm or less.
[0309]
Therefore, the S value (sub-threshold coefficient) of the semiconductor device can be reduced, and the off-state current can be reduced.
[0310]
The thickness of the single crystal Si thin film of the MOS thin film transistor is more preferably about 100 nm or less.
[0311]
Therefore, the S value (sub-threshold coefficient) of the semiconductor device can be further reduced, and the off-state current can be reduced. Therefore, there is an effect that the characteristics of the MOS type single crystal Si thin film transistor can be maximized.
[0312]
More preferably, the metal wiring pattern of the MOS type single crystal Si thin film transistor includes a portion formed by a looser wiring formation rule than the gate pattern of the MOS type single crystal Si thin film transistor.
[0313]
Therefore, the metal wiring or at least a part of the metal wiring of the semiconductor device in which the MOS type single crystal Si thin film transistor is formed can be processed simultaneously with the metal wiring on the large substrate, so that the cost can be suppressed and the processing capability can be improved. Alternatively, connection to an external device, an external wiring, another circuit block, or a TFT array is facilitated, and an effect of reducing a product yield due to poor connection to an external device or the like is achieved.
[0314]
The non-single-crystal Si thin-film device is a MOS-type or MIS-type non-single-crystal Si thin-film transistor, and the single-crystal Si thin-film device is more preferably a bipolar-type single-crystal Si thin-film transistor.
[0315]
Therefore, since a bipolar single-crystal Si thin film transistor is formed in addition to the MOS or MIS non-single-crystal Si thin film transistor, a multifunctional semiconductor device can be obtained.
[0316]
The non-single-crystal Si thin-film device is a MOS-type or MIS-type non-single-crystal thin-film transistor, and the single-crystal Si thin-film device is either a MOS-type or a bipolar-type single-crystal silicon thin-film transistor, or both. More preferably, it includes a bipolar type single crystal Si thin film transistor.
[0317]
Therefore, there is an effect that a semiconductor device having three kinds of characteristics, that is, a MOS or MIS type non-single-crystal Si thin film transistor, a single-crystal Si thin film transistor, and a bipolar single-crystal Si thin film transistor can be formed on one substrate. Therefore, a semiconductor device with higher performance and higher function can be obtained.
[0318]
The non-single-crystal Si thin-film device is a MOS-type or MIS-type non-single-crystal Si thin-film transistor. The single-crystal Si thin-film device includes a MOS-type single-crystal Si thin-film transistor and a Schottky or PN junction diode. More preferably, a sensor or a CCD image sensor is provided.
[0319]
Therefore, a thin film device having a different design or structure can be integrated in a different region individually, and a device having a different structure from a CMOS device such as an image sensor, which has been extremely difficult to coexist with the conventional method, can be easily integrated. This makes it possible to create a high-performance device that has been impossible up to now.
[0320]
It is more preferable that the thickness of the single crystal Si thin film of the MOS thin film transistor made of the single crystal Si is smaller than that of the single crystal Si thin film of the bipolar thin film transistor.
[0321]
Therefore, by specifying the thickness of the Si thin film of the MOS type and the bipolar type by comparison with each other, it is possible to obtain a semiconductor device capable of effectively utilizing the characteristics of both the MOS type and the bipolar type.
[0322]
It is more preferable that the bipolar type single crystal Si thin film transistor has a planar structure in which a base, a collector, and an emitter region are formed and arranged on the same plane.
[0323]
Therefore, since it is a so-called lateral transistor having no gate and a planar structure like a MOS thin film transistor, an oxide film is simply formed on the Si surface, and impurities of P and N are formed in a predetermined pattern (region). ) And activation annealing can be performed to form a completely flat Si substrate, so that a single-crystal Si substrate can be easily joined to an insulating substrate without performing a planarization process by CMP. This has the effect that it can be performed.
[0324]
It is more preferable that the contact pattern of the bipolar type single crystal Si thin film transistor is formed by a looser design rule than the base pattern of the bipolar type single crystal Si thin film transistor.
[0325]
This facilitates connection to an external device of a semiconductor device, external wiring, another circuit block, or a TFT array, thereby reducing the product yield due to poor connection to an external device or the like.
[0326]
Therefore, the metal wiring or a part of the metal wiring of the semiconductor device in which the bipolar type single crystal Si thin film transistor is formed can be processed simultaneously with the metal wiring on the large substrate, so that the cost can be suppressed and the processing capability can be improved. Alternatively, the connection to the external device or the external wiring is facilitated, and the effect that the product yield due to poor connection to the external device or the like can be reduced.
[0327]
The thickness of the single crystal Si thin film of the bipolar single crystal Si thin film transistor is more preferably about 800 nm or less.
[0328]
Therefore, by setting the film thickness to about 800 nm or less, which is the thickness limit for the characteristic variation of the single crystal Si thin film of the bipolar type single crystal Si thin film transistor, the characteristic variation can be suppressed to a small value without deteriorating the characteristics. There is an effect that a type single crystal Si thin film transistor can be obtained.
[0329]
The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film, and the MOS type thin film transistor made of the non-single-crystal Si thin film has a non-single-crystal Si, a gate insulating film, and a gate in this order from the substrate side. More preferably, it is formed.
[0330]
Therefore, by configuring the MOS type thin film transistor such that the gate is formed above the insulating substrate, a general self-alignment process using the gate as a mask can be performed, and a polycrystalline Si thin film or a continuous grain boundary Si can be used. The thin film transistor can be easily manufactured, and the productivity can be improved.
[0331]
The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film. The MOS thin film transistor made of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. It is more preferred that
[0332]
Therefore, since the MOS type non-single-crystal Si thin film transistor has the opposite configuration when viewed from the substrate, the influence of fixed charges near the surface of the glass substrate can be avoided, and the characteristics can be stabilized. Further, the degree of freedom in setting the doping profile of the channel portion is increased, the countermeasure against hot electron deterioration is facilitated, and the effect of increasing the number of configuration variations that can achieve the same effect as above can be obtained.
[0333]
The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS or MIS thin-film transistor made of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. Is more preferable.
[0334]
Therefore, by forming a MOS-type or MIS-type thin film transistor having a so-called bottom gate structure in which the gate is formed below the insulating substrate, a process which has been widely and generally used can be applied, and a high yield can be obtained. This has the effect of simplifying the process of forming an amorphous Si thin film, reducing costs, and improving productivity. Further, since amorphous Si has low off-current characteristics, a semiconductor device suitable for a low power consumption type LCD or the like can be obtained.
[0335]
The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS thin-film transistor formed of the non-single-crystal Si thin film is formed from the substrate side in the order of non-single-crystal Si, a gate insulating film, and a gate. More preferred.
[0336]
Therefore, even if the MOS-type non-single-crystal Si thin film transistor has the opposite configuration when viewed from the substrate, it is possible to increase the variation of the configuration that can obtain the same effect as described above, and increase the degree of freedom in process design. To play.
[0337]
The difference in linear expansion between the single crystal Si constituting the single crystal Si thin film device and the insulating substrate is more preferably about 250 ppm or less in a temperature range from about room temperature to 600 ° C.
[0338]
Therefore, a difference in linear expansion between the insulating substrate and the single-crystal Si thin film with respect to a large temperature rise is reduced. Therefore, in the process for forming a single-crystal Si thin film on an insulating substrate, it is necessary to surely prevent destruction, bonding interface separation, or generation of defects in crystals in the cleavage separation process from the hydrogen implantation position due to the difference in thermal expansion. In addition, there is an effect that the heat bonding strength can be improved.
[0339]
The insulating substrate has SiO2 on at least the surface of the region where the single crystal Si thin film device is formed. _Two It is more preferable that the glass is a high strain point glass composed of an alkaline earth-aluminoborosilicate glass having a film formed thereon.
[0340]
Therefore, it is not necessary to use crystallized glass whose composition is adjusted to be used for bonding with a single crystal Si substrate, so that the insulating substrate can be used in a high strain point generally used for a liquid crystal display panel driven by active matrix. This is advantageous in that a low-cost semiconductor device made of glass can be manufactured.
[0341]
The insulating substrate is made of barium-borosilicate glass, barium-aluminoborosilicate glass, alkaline earth-aluminoborosilicate glass, borosilicate glass, alkaline earth-zinc-lead-aluminoborosilicate glass and alkaline earth-zinc- More preferably, it is formed of any of the aluminoborosilicate glasses.
[0342]
Therefore, since the insulating substrate is made of the glass described above, which is a high strain point glass generally used for a liquid crystal display panel driven by active matrix, a semiconductor device suitable for the active matrix substrate can be manufactured at low cost. This has the effect.
[0343]
The alignment margin of at least a part of the pattern in the single-crystal Si region is smaller than the alignment margin of the pattern of the entire mother substrate or the display region or the entire device, and is more preferably high precision.
[0344]
Therefore, when forming a metal wiring pattern or the like common to the non-single-crystal Si region, it is possible to align a part of the pattern with a high-precision pattern in the single-crystal Si region by a more accurate exposure system. It has the effect of being able to do it. Therefore, a single-crystal Si region having a high-precision pattern and a non-single-crystal region having a low-precision pattern can be easily and efficiently connected with a high yield using a metal wiring pattern or the like.
[0345]
The alignment mark in the single-crystal Si region and the alignment mark on the transparent substrate are obtained by detecting the alignment mark formed on the single-crystal Si with visible light or light of a shorter wavelength than visible light from the transparent substrate side. It is more preferable that the shape is such that it can be aligned with the alignment mark formed on the transparent substrate.
[0346]
Therefore, since the alignment mark can be detected through the glass substrate, the optical resolution can be improved, and the alignment can be performed with higher precision than before.
[0347]
As described above, the method of manufacturing a semiconductor device of the present invention is a method of forming a non-single-crystal Si thin film after forming a circuit including a single-crystal Si thin-film device on an insulating substrate.
[0348]
Therefore, a single crystal Si thin film device is formed on an insulating substrate having the best flatness, and thereafter, a non-single crystal Si thin film is formed. Therefore, there is an effect that a semiconductor device with few defects due to poor bonding and high yield can be manufactured.
[0349]
More preferably, an inter-protection insulating film, a contact hole, and a metal wiring are formed on the single crystal Si thin film device.
[0350]
Therefore, since the single-crystal Si thin-film device formed before the formation of the non-single-crystal Si thin film has metal wiring, miniaturization can be performed, and integration of circuits formed on the single-crystal Si thin film can be achieved. Dramatic increase in density can be realized. Further, by providing metal wiring in the same process on a non-single-crystal Si thin film formed after forming a single crystal Si thin film device on a glass substrate, a semiconductor device having a double metal wiring structure can be manufactured efficiently and in a simple process. It has the effect that it can be done.
[0351]
It is more preferable to form an interlayer insulating film after forming the single-crystal Si thin film device and before forming the non-single-crystal Si thin film.
[0352]
Therefore, since the interlayer insulating film is formed between the single-crystal Si thin film device and the non-single-crystal Si thin film, there is an effect that the single-crystal Si thin film can be reliably prevented from being contaminated with single-crystal Si.
[0353]
As described above, the method of manufacturing a semiconductor device according to the present invention is a method of forming a non-single-crystal Si thin film on the insulating substrate and then forming the single-crystal Si thin-film device.
[0354]
Therefore, since the non-single-crystal Si thin film is formed before the formation of the single-crystal Si thin-film device, the single-crystal Si thin film is formed as compared with the case where the non-single-crystal Si thin film is formed after forming the single-crystal Si thin-film device. This has the effect of preventing contamination and damage.
[0355]
More preferably, the single crystal Si thin film device is a MOS type single crystal Si thin film transistor.
[0356]
Therefore, for example, in the case of a CMOS structure, the characteristics of MOS transistors such as a reduction in power consumption and a full output up to the power supply voltage can be obtained, and a semiconductor device suitable for low power consumption logic can be obtained. This has the effect that a semiconductor device having the same can be manufactured.
[0357]
More preferably, the single crystal Si thin film device is a bipolar type single crystal Si thin film transistor.
[0358]
Therefore, by forming the bipolar transistor on the insulating substrate, the structure of the single crystal Si thin film can be simplified as compared with the MOS type, and the effect can be obtained that the single crystal Si thin film can be bonded to the insulating substrate without performing the planarization process. .
[0359]
More preferably, a predetermined concentration of hydrogen ions is implanted at a predetermined depth into a single crystal Si substrate for forming the single crystal Si thin film device.
[0360]
Therefore, there is an effect that the single crystal Si thin film device can be easily formed on the insulating substrate without using an adhesive.
[0361]
The hydrogen ion implantation energy is obtained by subtracting the energy corresponding to the projection range of hydrogen ions corresponding to the oxide film thickness from the hydrogen ion implantation energy, the energy corresponding to the oxide film thickness. It is more preferable that the energy is set to be smaller than the energy corresponding to the projection range of the constituent atoms of the material existing in the layer formed on the oxide film.
[0362]
Therefore, for example, in a MOS type single crystal Si thin film transistor, a hydrogen ion irradiated on a single crystal Si substrate collides with a constituent atom of a gate electrode material or a metal wiring material, and is repelled by elastic scattering. The constituent atoms of the electrode material pass through the oxide film, reach the single-crystal Si, and the effect of preventing deterioration in characteristics or reliability due to contamination of the single-crystal Si portion can be prevented.
[0363]
More preferably, the thickness of the single crystal Si substrate having the hydrogen ion implanted portion is approximately 100 microns or less.
[0364]
Therefore, the single-crystal Si layer can be reduced to about 1/10 of the original substrate, and the bending rigidity of the Si substrate is reduced, so that the same bonding can be performed with respect to fine irregularities due to surface scratches or particles on the glass substrate side. Even under the condition of energy, there is an effect that it is easy to bend and the influence of those can be reduced.
[0365]
Therefore, with the above thickness, it is possible to greatly reduce the bonding failure due to surface scratches, particles, and the like on the glass substrate side without greatly impairing the handleability of the divided small and thin Si substrate.
[0366]
After the non-single-crystal Si thin film is formed on the insulating substrate, at least a surface region to be joined to the single-crystal Si from which the non-single-crystal Si has been removed is previously subjected to a GCIB (Gas Cluster Ion Beam) of a halide of about 3 keV. More preferably, it is flattened.
[0367]
Therefore, when low energy (about 3 keV) oxygen or halide GCIB is irradiated, the Si or SiO2 surface is lightly etched and the micro roughness of the surface is improved. Therefore, there is an effect that the success rate of the bonding can be greatly improved as compared with the bonding of the conventional Si substrate.
[Brief description of the drawings]
FIGS. 1A to 1I are cross-sectional views illustrating a manufacturing process of a semiconductor device showing one embodiment of a semiconductor device according to the present invention.
FIGS. 2A to 2I are cross-sectional views illustrating a semiconductor device manufacturing process according to another embodiment of the semiconductor device according to the present invention.
FIGS. 3A to 3I are cross-sectional views illustrating a manufacturing process of a semiconductor device showing still another embodiment of the semiconductor device according to the present invention.
FIG. 4 is a cross-sectional view schematically showing a configuration of the bipolar single-crystal Si thin film transistor shown in FIG.
FIGS. 5A to 5F are cross-sectional views illustrating a manufacturing process of a semiconductor device showing still another embodiment of the semiconductor device according to the present invention.
FIGS. 6A to 6I are cross-sectional views illustrating a manufacturing process of a semiconductor device showing still another embodiment of the semiconductor device according to the present invention.
FIG. 7 is a plan view showing an active matrix substrate formed using the semiconductor device according to the present invention.
FIG. 8 is a graph showing a difference in linear expansion between single crystal Si and a glass substrate with respect to a temperature from room temperature to 600 ° C. in a semiconductor device according to the present invention.
FIG. 9 is a conceptual diagram when performing alignment between single crystal Si and a glass substrate at room temperature in the method for manufacturing a semiconductor device of the present invention.
[Explanation of symbols]
1a ・ 1b ・ 1c Non-single-crystal Si thin film transistor
2 Insulating substrate
3 SiO _Two Film (oxide film)
8 SiO _Two Film (interlayer planarization insulating film)
4 SiO _Two Film (interlayer insulating film)
5 Amorphous Si thin film
5 'non-single crystal Si thin film
6.12 Gate electrode
7.13.61 SiO _Two Film (gate insulating film)
10a ・ 10b ・ 10c Single crystal Si substrate
11 Unnecessary parts
14a ・ 14b Single-crystal Si thin film
15 Hydrogen ion implanter
16a ・ 16b Single crystal Si thin film transistor
20, 30, 40, 50, 60 Semiconductor Devices
21 Contact hole
22 Metal wiring
25 Collector
26 base
27 Emitter
51 Amorphous Si thin film
51 'continuous grain boundary Si thin film
52 Non-single-crystal Si thin film
62 silicon nitride film
63 Amorphous Si film
64 N ⁺ Amorphous Si film
65 metal film
70 Active matrix substrate
71 Drive Circuit
72 Display
90 CCD camera for positioning
91 Positioning Stage
93 Alignment mark on glass substrate
94 Alignment mark on single crystal Si

Claims (37)

After the oxide film, the gate pattern, and the impurity ion implanted portion are formed on the surface, the surface is flattened, and a hydrogen ion implanted portion having a predetermined concentration of hydrogen ions implanted at a predetermined depth is provided. Characteristic single crystal Si substrate. It is necessary to have an impurity ion implanted or diffused region having a pnp junction structure or an npn junction structure in which impurity ions are implanted in the vicinity of the surface, and an oxide film deposited on the impurity ion implanted portion or the diffusion region. Characteristic single crystal Si substrate. 3. The single crystal Si substrate according to claim 2, further comprising a hydrogen ion implanted portion into which hydrogen ions of a predetermined concentration are implanted at the predetermined depth. The single-crystal Si substrate according to claim 1, wherein the oxide film is formed to have a thickness of 200 nm or more. A semiconductor device, wherein a non-single-crystal Si thin-film device and a single-crystal Si thin-film device are formed in different regions on an insulating substrate. The semiconductor device according to claim 5, wherein the single crystal Si thin film device is joined to the insulating substrate via an inorganic insulating film. 7. The semiconductor device according to claim 5, wherein the non-single-crystal Si thin-film device and the single-crystal Si thin-film device are both MOS type or MIS type thin film transistors. 8. The semiconductor device according to claim 7, wherein the MOS thin film transistor is formed from a gate, a gate insulating film, and Si in this order from the insulating substrate side. 9. The semiconductor device according to claim 7, wherein the thickness of the Si thin film of the MOS thin film transistor is about 600 nm or less. 9. The semiconductor device according to claim 7, wherein the thickness of the single-crystal Si thin film of the MOS thin film transistor is approximately 100 nm or less. The metal wiring pattern of the MOS type single crystal Si thin film transistor includes a portion formed by a wiring forming rule that is looser than the gate pattern of the MOS type single crystal Si thin film transistor. 2. The semiconductor device according to claim 1. The non-single-crystal Si thin film device is a MOS or MIS type non-single-crystal Si thin film transistor,
The semiconductor device according to claim 6, wherein the single crystal Si thin film device is a bipolar single crystal Si thin film transistor. The non-single-crystal Si thin film device is a MOS or MIS type non-single-crystal Si thin film transistor,
13. The semiconductor device according to claim 6, wherein the single crystal Si thin film device includes one of a MOS type and a bipolar type, or both of them. The non-single-crystal Si thin film device is a MOS or MIS type non-single-crystal Si thin film transistor,
7. The semiconductor device according to claim 6, wherein the single crystal Si thin film device includes an image sensor including a MOS type single crystal Si thin film transistor and a Schottky type or PN junction type diode or a CCD type image sensor. . 14. The semiconductor device according to claim 13, wherein the single crystal Si thin film of the MOS thin film transistor made of single crystal Si has a smaller thickness than the single crystal Si thin film of the bipolar thin film transistor. 15. The semiconductor device according to claim 12, wherein the bipolar single-crystal Si thin film transistor has a planar structure in which a base, a collector, and an emitter region are formed and arranged on the same plane. 17. The method according to claim 12, wherein the metal wiring and the contact pattern of the bipolar type single crystal Si thin film transistor include a portion formed by a wiring forming rule that is looser than the base pattern of the bipolar type single crystal Si thin film transistor. The semiconductor device according to claim 1. 18. The semiconductor device according to claim 12, wherein the thickness of the single crystal Si thin film of the bipolar single crystal Si thin film transistor is approximately 800 nm or less. The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film, and the MOS thin film transistor made of the non-single-crystal Si thin film is formed from the substrate side in the order of non-single-crystal Si, a gate insulating film, and a gate. The semiconductor device according to any one of claims 7 to 11, and 13 to 15, wherein: The non-single-crystal Si thin film is a polycrystalline Si thin film or a continuous grain Si thin film. The MOS thin film transistor made of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. The semiconductor device according to any one of claims 7 to 11, 13 to 15, and 19, wherein: The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS or MIS thin-film transistor formed of the non-single-crystal Si thin film is formed in the order of a gate, a gate insulating film, and non-single-crystal Si from the substrate side. The semiconductor device according to any one of claims 7 to 11, 13 to 15, and 20. The non-single-crystal Si thin film is an amorphous Si thin film, and the MOS or MIS thin-film transistor made of the non-single-crystal Si thin film is formed by forming non-single-crystal Si, a gate insulating film, and a gate in this order from the substrate side. The semiconductor device according to any one of claims 7 to 11, 13 to 15, and 21. 23. The method according to claim 5, wherein a difference in linear expansion between the single crystal Si forming the single crystal Si thin film device and the insulating substrate is about 250 ppm or less in a temperature range from about room temperature to 600 ° C. 2. The semiconductor device according to claim 1. The insulating substrate is a high strain point glass made of an alkaline earth-aluminoborosilicate glass having an SiO ₂ film formed on at least a surface of a region where the single crystal Si thin film device is formed. Item 24. The semiconductor device according to any one of Items 5 to 23. The insulating substrate is made of barium-borosilicate glass, barium-aluminoborosilicate glass, alkaline earth-aluminoborosilicate glass, borosilicate glass, alkaline earth-zinc-lead-aluminoborosilicate glass and alkaline earth-zinc- The semiconductor device according to any one of claims 5 to 23, wherein the semiconductor device is formed of any one of aluminoborosilicate glass. 6. The alignment margin of at least a part of the pattern in the single-crystal Si region is smaller than the alignment margin of the pattern of the entire mother substrate, the display region, or the entire device, and has high accuracy. 26. The semiconductor device according to any one of items 25 to 25. The alignment mark in the single-crystal Si region and the alignment mark on the transparent substrate are obtained by detecting the alignment mark formed on the single-crystal Si with visible light or light of a shorter wavelength than visible light from the transparent substrate side. 27. The semiconductor device according to claim 5, wherein the semiconductor device has a shape capable of being aligned with an alignment mark formed on a transparent substrate. A method for manufacturing a semiconductor device, comprising: forming a circuit including a single-crystal Si thin film device on an insulating substrate; and then forming the non-single-crystal Si thin film. 29. The method for manufacturing a semiconductor device according to claim 28, wherein an inter-protection insulating film, a contact hole, and a metal wiring are formed on the single crystal Si thin film device. 30. The method according to claim 28, wherein an interlayer insulating film is formed after forming the single-crystal Si thin film device and before forming the non-single-crystal Si thin film. In a method of manufacturing a semiconductor device in which a single-crystal Si thin-film device and a non-single-crystal Si thin film are formed on an insulating substrate,
A method of manufacturing a semiconductor device, comprising: forming the non-single-crystal Si thin film on the insulating substrate and then forming the single-crystal Si thin-film device. The method according to any one of claims 28 to 31, wherein the single crystal Si thin film device is a MOS type single crystal Si thin film transistor. 33. The method according to claim 28, wherein the single crystal Si thin film device is a bipolar single crystal Si thin film transistor. 34. A single crystal Si substrate for forming the single crystal Si thin film device, wherein a predetermined concentration of hydrogen ions is implanted at a predetermined depth. Manufacturing method of a semiconductor device. The hydrogen ion implantation energy is obtained by subtracting the energy corresponding to the projection range of hydrogen ions corresponding to the oxide film thickness from the hydrogen ion implantation energy, the energy corresponding to the oxide film thickness. 35. The method for manufacturing a semiconductor device according to claim 34, wherein the energy is set to be smaller than the energy corresponding to the projection range of the constituent atoms of the material existing in the layer formed on the oxide film. 36. The method according to claim 34, wherein the thickness of the single crystal Si substrate having the hydrogen ion implanted portion is about 100 μm or less. After the non-single-crystal Si thin film is formed on the insulating substrate, at least a surface region to be joined to the single-crystal Si from which the non-single-crystal Si has been removed is previously subjected to a GCIB (Gas Cluster Ion Beam) of a halide of about 3 keV. The method for manufacturing a semiconductor device according to claim 31, wherein planarization is performed.

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