JP4744820B2 - Semiconductor device manufacturing method and semiconductor device manufacturing apparatus - Google Patents

Description

  The present invention relates to a semiconductor device useful for a display device such as an active matrix display device, a manufacturing method thereof, and a manufacturing apparatus.

  Conventionally, after forming a non-single crystal semiconductor film such as a silicon film on a light-transmitting amorphous material such as a glass substrate, a thin film transistor (Thin Film Transistor) that is processed into a transistor to manufacture a pixel or driver of a liquid crystal display : TFT) -Liquid Crystal Display Technology or TFT-Organic EL (Electro Luminescence) Display Technology continues to develop greatly with the spread of personal information terminals using computers and flat panel displays.

Among these, in the amorphous silicon TFT-liquid crystal display, the pixel portion is formed of an amorphous silicon film. The mobility of the amorphous silicon TFT is about 0.5 cm ² / V · sec, and has a feature that the OFF current is low, and is used for pixel switching.

  Then, the driver is made of single crystal silicon, connected to a liquid crystal pixel by chip on glass (COG) technology or chip on film (COF) technology, and the TFT of the pixel is controlled on / off. is doing.

  In the COG, a space for joining a driver chip is provided in the vicinity of the end of the panel, and the driver chip is bonded thereto via an anisotropic conductive film (ACF). The COF presses a flexible printed circuit (FPC) to a terminal at the end of the panel. A circuit such as a driver is incorporated in the FPC.

On the other hand, in the polycrystalline silicon TFT-liquid crystal display, the amorphous silicon film is melted and polycrystallized by heat of a laser or the like to increase the mobility, and the mobility of the transistor is 100 to 300 cm ² / V · sec. Therefore, the driver can be manufactured on a glass substrate.

  However, non-single-crystal silicon semiconductors such as polycrystalline silicon TFTs are made on a light-transmitting amorphous material substrate with a large area such as a glass substrate. It is extremely difficult to make this functional semiconductor. An analog driver, a low bit digital driver, or the like can be created. In other words, with the usual technique of amorphous silicon film formation-polycrystallization by energy beam, although the silicon film can be brought close to the performance of single crystal silicon, it is still a multi-step process. Development steps must be taken. As an example, it is not easy to make an 8-bit digital driver. In addition, a line-sequential drive driver cannot be made with a polycrystalline silicon semiconductor alone.

  Therefore, if a display semiconductor is formed of a single crystal silicon film, functional circuits such as these drivers and DA converters can be made sufficiently compact in a limited space.

  A single crystal silicon film can be formed on an amorphous glass substrate by applying SOI (Silicon on Insulator) technology. The SOI technology is a technology for forming a single crystal semiconductor thin film on a substrate whose portion in contact with the single crystal silicon film is an amorphous insulating film.

  However, when a single crystal silicon semiconductor is formed on the entire surface of the substrate by applying these SOI technologies, the area of the single crystal silicon becomes enormous, and it becomes expensive to spread a single crystal silicon wafer on the entire surface of the glass. In addition, the transistor in the pixel portion does not need to be as high-performance (high mobility) as the single crystal silicon film transistor, and thus has overspec. In addition, when a single crystal silicon transistor is manufactured from a single crystal silicon film on glass, a thin film transistor process has a wider processing line width than that of an integrated circuit, and thus cannot have a sufficiently high degree of integration.

  On the other hand, the above-mentioned COG technology for producing a single crystal silicon film on an amorphous glass substrate is a driver chip that is cut out from a silicon wafer in the form of a chip in both amorphous silicon TFT and polysilicon TFT liquid crystal displays. As is, it is possible to obtain a liquid crystal panel by pressure-bonding the film to a predetermined position via a anisotropic conductive film (ACF) on a glass substrate.

  If an attempt is made to manufacture a liquid crystal display using these COG techniques, the liquid crystal material is divided into a predetermined size for a plurality of liquid crystal panels, and then a liquid crystal material is injected between the base glass and the facing glass to seal the injection port. Then paste the driver. For this reason, the number of times of the number of the liquid crystal displays, for example, 100 times of each divided liquid crystal panel that can be taken from one mother glass, the number of times of pasting is performed 100 times. In this case, a medium-to-small liquid crystal display or the like such as a mobile phone display having a screen size of 1 inch on the diagonal side requires a considerable tact time just to be bonded, and production efficiency is not necessarily good. I could not say.

  In addition, since the bonding accuracy between the chip and the liquid crystal panel is about 10 μm, a large number of wirings cannot be arranged in a limited bonding space, and the resolution of the liquid crystal panel is limited or the small number of wirings. By reassembling the circuit board on the base glass or forming another circuit on the base glass, it is necessary to increase the area of the wiring on the base material substrate. It was something that would make it bigger.

These facts can be understood from a comparison with prior arts such as Patent Document 1 and Patent Document 2, for example.
JP 2001-313310 A (released on November 9, 2001) JP 2001-217411 A (published on August 10, 2001)

  However, the above conventional semiconductor device manufacturing method and semiconductor device manufacturing apparatus have the following problems.

  That is, in Patent Document 1, the bottom surface of a semiconductor chip is conical and positioned on a transfer jig. In this method, the shape of the bottom surface of the semiconductor chip is limited to a conical shape, and the position of the concave portion of the transfer jig cannot be formed with high accuracy. In addition, after being bonded (mounted), the connection portion is cured using a photo-curable resin, so that not only a thin film transistor process having a process of passing a temperature of 400 to 500 ° C. or more cannot be flowed. The process in a clean room represented by a thin film transistor process cannot be carried out because of the influence of impurities oozing out from the curing agent. Moreover, it is thought that the conductive resin etc. are also used.

  Further, in Patent Document 1, since a thin film transistor is formed in a semiconductor chip, it is not possible to expect a higher function as that of single crystal silicon.

  Next, Patent Document 2 uses a normal dicing saw when cutting silicon into chips, and is trying to position using one or more sides of the cut size. The error is directly reflected in the positioning accuracy, and high accuracy cannot be obtained. Furthermore, this patent document 2 is also bonded (mounted) using an adhesive or solder. In addition, a photocurable resin or a conductive resin is used. After using such a resin, a thin film transistor process for processing this substrate in a clean room cannot be performed.

  The present invention has been made in view of the above-described conventional problems, and its object is to have higher productivity than display panel manufacturing by COG technology, and to perform the bonding process with high accuracy within ± 1 μm. An object of the present invention is to provide a semiconductor device manufacturing method and a semiconductor device manufacturing apparatus.

  In order to solve the above-described problems, the semiconductor device manufacturing method of the present invention places the semiconductor circuit member on a positioning substrate having a positioning portion, and moves the semiconductor circuit member on the surface of the positioning substrate to move the positioning portion. And the step of temporarily fixing the one or more semiconductor circuit members to the positioning substrate and the step of collectively bonding the temporarily fixed semiconductor circuit members to the bonding substrate.

  According to the above invention, when the semiconductor circuit members are collectively bonded to the bonding substrate, the semiconductor circuit member is first placed on the positioning substrate having the positioning portion on the bonding substrate. Subsequently, these semiconductor circuit members are moved on the surface of the positioning substrate. As a result, all the semiconductor circuit members are automatically positioned at the corresponding positions so as to be the set positions of the bonded substrates by contacting the positioning portions, and are temporarily fixed at the positions. Therefore, the semiconductor circuit members can be bonded together by bonding one or more semiconductor circuit members positioned on the positioning substrate to the set position of the bonding substrate.

  As a result, at the stage where the semiconductor circuit member is placed on the positioning substrate, the semiconductor circuit member is moved thereafter, so that the precision of the placement position is not required. On the other hand, after the semiconductor circuit member is moved in parallel and brought into contact with the positioning portion, the contact position with the positioning portion corresponds to an accurate setting position of the bonding substrate. Can be bonded to the substrate at once.

  Therefore, a semiconductor device manufacturing method capable of bonding a semiconductor circuit member on a bonding substrate, having higher productivity than display panel manufacturing by COG technology, and capable of performing a bonding process with high accuracy within a predetermined range. Can be provided.

  The semiconductor device manufacturing method of the present invention is characterized in that in the semiconductor device manufacturing method described above, the one or more semiconductor circuit members are simultaneously moved by moving the surface of the positioning substrate.

  According to the above invention, the one or more semiconductor circuit members are simultaneously positioned by moving the surface of the positioning substrate, so that all the semiconductor circuit members are brought into contact with the positioning portion, so that the set position of the bonded substrate is set. Are automatically positioned simultaneously at the positions associated with each other and temporarily fixed at the positions. Therefore, all the semiconductor circuit members can be positioned efficiently.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, when the semiconductor circuit member is moved on the surface of the positioning substrate, the positioning substrate is inclined and moved by gravity. It is characterized by that.

  According to the above invention, all the semiconductor circuit members are automatically moved on the positioning substrate all at once by gravity only by tilting the positioning substrate on which the semiconductor circuit members are placed. It can be easily moved to the positioning part.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the semiconductor circuit member is formed with a contact member for a positioning portion of the positioning substrate.

  According to the above invention, the contact member for the positioning portion of the positioning substrate is formed, so that the contact member contacts the positioning substrate and the positioning portion. Accordingly, a contact member with high positional accuracy can be easily formed on the semiconductor circuit member, and the semiconductor circuit member itself does not contact the positioning substrate and its positioning portion. Contact and damage can be prevented.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the semiconductor circuit member is based on a single crystal silicon substrate.

  According to the above invention, since the semiconductor circuit member is based on the single crystal silicon substrate, the single crystal silicon substrate can be easily bonded to the bonding substrate.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein the semiconductor circuit member is formed of a single crystal silicon substrate, and at least a part of the semiconductor structure is previously formed on the single crystal silicon substrate. It is characterized by being built.

  According to the above invention, the single crystal is formed of a single crystal silicon substrate, and at least a part of the semiconductor structure is built in advance in the single crystal silicon substrate. The silicon substrate can be easily bonded to the bonding substrate.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, a semiconductor structure including at least a part of the bonding substrate before or after bonding of the semiconductor circuit member is integrally formed. It is characterized by being a substrate.

  According to the above invention, since the bonding substrate is a substrate on which a semiconductor structure including at least a part is integrally formed before or after bonding of the semiconductor circuit member, a part of the semiconductor structure is integrally formed. The semiconductor circuit member can be accurately bonded to the bonding substrate formed or formed.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein at least a part of the semiconductor device structure is previously formed on the bonding substrate before the semiconductor circuit member is bonded to the bonding substrate. It is characterized by being formed.

  According to the above invention, before the semiconductor circuit member is bonded to the bonding substrate, at least a part of the semiconductor structure is formed on the bonding substrate in advance. Therefore, when the semiconductor circuit member is bonded to the bonding substrate, a semiconductor device in which, for example, a non-single crystal silicon semiconductor and a single crystal silicon semiconductor are mixed on the bonding substrate can be provided.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, both the bonding surfaces of the semiconductor circuit member and the bonding substrate are both activated. The term “joint activation” refers to, for example, a state where OH groups exist on each joint surface.

  According to the above invention, since both of the bonding surfaces of the semiconductor circuit member and the bonding substrate are bonded and activated, the bonding proceeds by pressing only one point of the bonding surface. Both can be easily joined without.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein the semiconductor circuit member is bonded to the bonding substrate and then formed on the semiconductor device structure and the bonding substrate in the semiconductor circuit member. And a step of forming a wiring pattern of the semiconductor device structure in a common step.

  According to the above invention, instead of mounting, for example, a single crystal silicon semiconductor completed like a conventional COG on a bonding substrate, after a part of the semiconductor structure in the single crystal silicon semiconductor is bonded to the bonding substrate, Both wiring patterns are formed integrally with a part of a semiconductor structure made of, for example, non-single crystal silicon formed in advance on the bonding substrate.

  Accordingly, for example, a non-single crystal silicon semiconductor and a single crystal silicon semiconductor are mixed on the bonding substrate, and the productivity is higher than the display panel manufacturing by the COG technology. Therefore, it is possible to provide a method for manufacturing a semiconductor device that can be connected to the wiring of the semiconductor device and can manufacture a highly accurate and highly functional display semiconductor efficiently and in a space-saving manner.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, the positioning portion of the positioning substrate is formed as a positioning pattern corresponding to a set position of the semiconductor circuit member on the bonding substrate. It is characterized by including the process to perform.

  According to the above invention, the positioning portion of the positioning substrate is formed as a positioning pattern corresponding to the set position of the semiconductor circuit member on the bonding substrate, thereby forming the plurality of positioning portions on the positioning substrate with high accuracy. Can do.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the positioning pattern of each positioning portion of the positioning substrate has a shape in which the planar shape regulates two sides of the semiconductor circuit member. It is formed and a gap is provided at a corner where two sides intersect. Note that the shape in which the planar shape restricts two sides of the single crystal silicon substrate refers to a shape such as an L shape, a V shape, an X shape, or a T shape.

  According to the above invention, the positioning pattern of each positioning portion of the positioning substrate is formed so that the planar shape regulates the two sides of the semiconductor circuit member. The position at can be defined. Further, since a gap is provided at the corner where the two sides intersect, it is possible to prevent the structurally weak corner of the semiconductor circuit member from coming into contact with the positioning portion and being damaged.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein the contact member for the positioning portion of the positioning substrate on the temporary fixing surface side of the single crystal silicon substrate is a resin having alkali resistance. It is characterized by including the process of forming by. In the specification of the abutting member, alkali resistance is necessary when cleaning is performed for activation after bonding after positioning to a positioning part parallel to the surface of the positioning substrate. This is to prevent the contact member from peeling off.

  According to said invention, the contact member with respect to the positioning part of the said positioning board | substrate is formed with the resin which has alkali resistance on the temporary fixed surface side of a single crystal silicon substrate.

  Therefore, the contact member can be easily formed with resin. Further, since it is a resin, it can be easily removed by etching. Furthermore, since this resin has alkali resistance, the abutting member does not deteriorate even when the single crystal silicon substrate and the bonding substrate are bonded to each other by alkali treatment to activate both bonding surfaces. Can be.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the above-described method for manufacturing a semiconductor device, wherein the step of forming a contact member made of a resin on a temporary fixing surface side of the single crystal silicon substrate Resin is applied to the entire surface of the temporary fixing surface of the substrate, and alignment is performed with reference to a marker formed on the other surface of the single crystal silicon substrate, and the contact member is processed to be uneven.

  According to the above-described invention, the resin is applied to the entire back surface of the single crystal silicon substrate, the alignment is performed on the basis of the marker formed on the temporarily fixed surface side of the single crystal silicon substrate, and the contact member is processed to be uneven. Thereby, the contact member made of resin can be formed on the temporary fixing surface side of the single crystal silicon substrate.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the above-described method of manufacturing a semiconductor device, wherein a part of the single crystal silicon substrate on the temporary fixing surface side is etched to a predetermined depth. It includes a step of forming a contact portion that contacts the positioning portion formed on the surface.

  According to the above invention, the contact portion that contacts the positioning portion formed on the surface of the positioning substrate is formed by etching a part of the single-crystal silicon substrate on the temporary fixing surface side to a predetermined depth. To do.

  Therefore, the contact portion that contacts the positioning portion can be formed using only the single crystal silicon substrate without using a separate contact member for the single crystal silicon substrate.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the positioning portion formed on the surface of the positioning substrate is replaced with a part of the surface of the positioning substrate made of a flat plate. It is characterized by etching to form a concave or convex shape.

  According to the above invention, the positioning portion can be formed on the surface of the positioning substrate by etching a part of the surface of the positioning substrate made of a flat plate to form a concave or convex shape.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device, wherein the positioning portion formed on the surface of the positioning substrate is alkali-resistant on the surface of the positioning substrate made of a flat plate. It is characterized by being formed into a convex shape by patterning with a resin having it.

  According to the above invention, the positioning portion can be formed on the surface of the positioning substrate by forming a convex shape by patterning the surface of the positioning substrate made of a flat plate with the resin. In addition, since this resin has alkali resistance, the positioning part should not be deteriorated even if alkali treatment is performed to activate both bonding surfaces before bonding the single crystal silicon substrate and the bonding substrate. Can do.

  According to another aspect of the present invention, there is provided a method for manufacturing a semiconductor device according to the above-described method for manufacturing a semiconductor device, wherein hydrogen ions or a rare gas is implanted at a predetermined depth in the single crystal silicon substrate to form a hydrogen ion implanted layer or a rare gas ion. A step of forming an implantation layer; and a step of separating a part of the single crystal silicon substrate with the hydrogen ion implantation layer or the rare gas ion implantation layer by heat treatment after the single crystal silicon substrate is bonded to the bonding substrate. It is characterized by including.

  According to the above invention, hydrogen ions or rare gas ions are implanted to a predetermined depth in the single crystal silicon substrate. When the single crystal silicon substrate is bonded to the bonding substrate and then heat-treated, part of the single crystal silicon substrate can be peeled off by the hydrogen ion implantation layer or the rare gas ion implantation layer. Thereby, the single crystal silicon substrate can be thinned.

  According to another aspect of the present invention, there is provided a method of manufacturing a semiconductor device according to the above-described method of manufacturing a semiconductor device, wherein the bonding activation of both bonding surfaces of the semiconductor circuit member and the bonding substrate includes ammonia water and hydrogen peroxide water. It is characterized by being washed with a liquid or a liquid containing hydrogen peroxide solution or exposed to oxygen plasma.

  According to the above invention, the bonding activation of both bonding surfaces of the single crystal silicon substrate and the bonding substrate is cleaned with a liquid containing ammonia water and hydrogen peroxide water or a liquid containing hydrogen peroxide water, or oxygen. Performed by exposure to plasma. Thereby, for example, it is possible to obtain bonding activation in which OH groups exist on each bonding surface.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the semiconductor circuit member placed on the positioning substrate is moved to the positioning portion of the positioning substrate. The semiconductor circuit member is floated by minutely vibrating the positioning substrate.

  According to the above invention, the positioning substrate on which the semiconductor circuit member is placed is microvibrated. Thereby, since the semiconductor circuit member floats, the placed semiconductor circuit member can be moved to the positioning portion in parallel with the surface of the positioning substrate.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, when the positioning substrate is vibrated minutely, the floating height of the semiconductor circuit member placed on the positioning substrate is reduced. The frequency range and the amplitude range do not exceed the height of the positioning portion of the positioning substrate.

  That is, when the positioning substrate on which the semiconductor circuit member is placed is microvibrated, if the microvibration is too large, the semiconductor circuit member exceeds the height of the positioning portion of the positioning substrate, and the semiconductor circuit member is It cannot be defined in the positioning part. Therefore, in the present invention, the positioning substrate is microvibrated in a frequency range and an amplitude range in which the floating height of the semiconductor circuit member placed on the positioning substrate does not exceed the height of the positioning portion of the positioning substrate. Therefore, this problem can be prevented.

  The semiconductor device manufacturing method of the present invention is the semiconductor device manufacturing method described above, wherein the semiconductor circuit member positioned on the positioning substrate has a vacuum suction hole formed in the positioning substrate. It is characterized in that it is temporarily fixed on the positioning substrate by sucking it through.

  According to the above invention, the semiconductor circuit member positioned on the positioning substrate is temporarily fixed on the positioning substrate by suction through a vacuum suction hole formed on the positioning substrate. The semiconductor circuit member can be temporarily fixed.

  According to the semiconductor device manufacturing method of the present invention, in the semiconductor device manufacturing method described above, the planar shape of the positioning substrate matches a shot area of an exposure projector used when patterning the bonding substrate. It is characterized by.

  According to the above invention, since the planar shape of the positioning substrate matches the shot area of the exposure projector used when patterning the bonding substrate, the positioning portion is patterned on the positioning substrate having the same width as the bonding substrate. be able to.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, the planar shape of the positioning substrate is the same as the planar shape of the bonding substrate.

  According to the above invention, since the planar shape of the positioning substrate is the same as the planar shape of the bonding substrate, the semiconductor circuit member placed on the positioning substrate can be bonded to the insulating substrate in a 1: 1 relationship. .

  The semiconductor device manufacturing method of the present invention is characterized in that, in the above-described semiconductor device manufacturing method, the material of the positioning substrate is silicon (Si).

  According to the above invention, since the positioning substrate is made of silicon (Si), a highly accurate positioning portion is easily formed by photolithography using a silicon wafer which is a generally used flat substrate. can do.

  The semiconductor device manufacturing method of the present invention is characterized in that, in the semiconductor device manufacturing method described above, irregularities of 100 nm or more are formed on the surface of the positioning substrate.

  According to the above invention, since the unevenness of 100 nm or more is formed on the surface of the positioning substrate, the placed semiconductor circuit member is easily slipped.

  Further, in order to solve the above problems, a method for manufacturing a semiconductor device according to the present invention includes a single crystal silicon in which at least a gate electrode and a hydrogen ion or rare gas injection layer are formed at a predetermined depth as a part of a semiconductor device structure. A substrate is placed on a positioning substrate made of a flat plate having a positioning portion on the surface, and the positioning substrate is tilted to give a slight vibration to move the positioning substrate surface to the positioning portion. A step of positioning one or more single crystal silicon substrates corresponding to the positioning portions, and temporarily fixing the single crystal silicon substrates by vacuum suction; and a part of a semiconductor device structure made of non-single crystal silicon. In the bonding substrate formed in advance, the step of collectively bonding to the set position corresponding to the positioning portion of the positioning substrate, and the heat treatment after bonding Ri is characterized in that it comprises a step of peeling the portion of the monocrystalline silicon substrate at the hydrogen ion implanted layer, or a noble gas injection layer.

  According to the above invention, for example, a non-single crystal silicon semiconductor and a single crystal silicon semiconductor are mixed on the bonding substrate, and the productivity is higher than the display panel manufacturing by the COG technology, and the bonding process is within ± 1 μm. Provided is a method for manufacturing a semiconductor device that can be connected to a large number of thin wires from a bonded single crystal silicon substrate with high accuracy, and can manufacture a high-precision and high-performance display semiconductor efficiently and in a space-saving manner. can do.

In order to solve the above problems, a semiconductor device manufacturing apparatus of the present invention is a single crystal silicon in which at least a gate electrode and a hydrogen ion or rare gas injection layer are formed at a predetermined depth as part of a semiconductor device structure. A substrate is placed on a positioning substrate made of a flat plate having a positioning portion on the surface, and the positioning substrate is tilted to give a slight vibration to move the positioning substrate surface to the positioning portion. Means for positioning one or more single crystal silicon substrates corresponding to the positioning portions and temporarily fixing by vacuum suction;
Means for collectively bonding the single crystal silicon substrate to a set position corresponding to a positioning portion of the positioning substrate in a bonding substrate in which a part of a semiconductor device structure made of non-single crystal silicon is formed in advance;
And a means for peeling off part of the single crystal silicon substrate by the hydrogen ion implanted layer or the rare gas implanted layer by heat treatment after bonding.

  According to the above invention, for example, a non-single crystal silicon semiconductor and a single crystal silicon semiconductor are mixed on the bonding substrate, and the productivity is higher than the display panel manufacturing by the COG technology, and the bonding process is within ± 1 μm. Providing a semiconductor device manufacturing apparatus that can be connected to a large number of thin wires from a bonded single crystal silicon substrate with high precision, and can manufacture high-precision and high-performance display semiconductors efficiently and in a space-saving manner. can do.

  As described above, the semiconductor device manufacturing method of the present invention places a semiconductor circuit member on a positioning substrate having a positioning portion, and moves the surface of the positioning substrate to position the semiconductor circuit member on the positioning portion. The manufacturing method includes a step of temporarily fixing one or more semiconductor circuit members to the positioning substrate and a step of collectively bonding the temporarily fixed semiconductor circuit members to a bonding substrate.

  The semiconductor device manufacturing apparatus of the present invention, as described above, includes a single crystal silicon substrate in which at least a gate electrode and a hydrogen ion or rare gas injection layer are formed at a predetermined depth as part of a semiconductor device structure. The substrate is placed on a positioning substrate made of a flat plate having a positioning portion on the surface, and the positioning substrate is tilted to give a slight vibration, so that the surface of the positioning substrate is moved to the positioning portion, so that one or more A part of the semiconductor device structure made of non-single-crystal silicon is formed in advance, and a means for positioning the single-crystal silicon substrate corresponding to the positioning portion and temporarily fixing the single-crystal silicon substrate by vacuum suction. Means for collectively bonding to a set position corresponding to the positioning portion of the positioning substrate in the bonding substrate, and the hydrogen ion after the bonding by heat treatment. At injection layer or a rare gas injection layer is intended to include a means for peeling a portion of the monocrystalline silicon substrate.

  Therefore, for example, non-single crystal silicon semiconductor and single crystal silicon semiconductor are mixed on the bonding substrate, and has higher productivity than display panel manufacturing by COG technology, and the bonding process is highly accurate within ± 1 μm. The semiconductor device manufacturing method and the semiconductor device can be connected to a large number of thin wirings from the bonded single crystal silicon substrate and can manufacture a high-precision and high-performance display semiconductor efficiently and in a small space. There exists an effect that a manufacturing apparatus can be provided.

  An embodiment of the present invention will be described with reference to FIGS. 1 to 18 as follows.

  As shown in FIGS. 1A and 1B, the method of manufacturing a semiconductor device of this embodiment includes one or more single crystal silicon substrates (hereinafter referred to as “single crystal Si”) on which at least a part of the semiconductor structure is formed. (Referred to as “substrate”) 10 on a positioning substrate 30 having a positioning portion on the surface, and simultaneously placing, fixing, and individually activating the single crystal Si substrate 10 and then individually A step of aligning and bonding a pattern on a polycrystalline Si glass substrate 40 as a light-transmitting amorphous insulating substrate having an activated surface of the single crystal Si substrate 10 to form a semiconductor. Yes. The polycrystalline Si glass substrate 40 is formed with a polycrystalline silicon TFT (Thin Film Transistor) 50 which is a switching for turning on / off each pixel, as will be described later.

  Hereinafter, each process will be described. In the present embodiment, the positioning substrate 30 and the single crystal Si substrate 10 will be described first, and then the polycrystalline Si glass substrate 40 will be described.

[Production of positioning substrate]
As shown in FIG. 2, the positioning substrate 30 has a recess 32 having a function as a stopper formed on its surface by etching, and is manufactured on the surface of a flat substrate 31 such as a silicon wafer by photolithography. .

  As shown in the figure, after designing the position on the substrate 31 where the single crystal Si substrate 10 is to be mounted, a photoresist is applied to the surface of the substrate 31 by photolithography technique or the like, and is exposed and developed for patterning. To do.

  With the resist applied, the 1% potassium hydroxide solution is heated to 100 ° C. to immerse the substrate 31. For example, a step 33 of about 20 μm is formed by soaking for 60 minutes. An edge 32a as one positioning portion of the recess 32 is a place where the contact member 19 at the lower portion of a single crystal Si1 chip to be described later stops. After the etching is completed, the photoresist is removed by wet stripping or the like.

  Note that the positioning substrate 30 shown in FIG. 2 has the concave portion 32 that functions as a stopper. However, the present invention is not limited to this, and for example, as shown in FIG. 3, a convex portion that functions as a stopper. 34 can be formed of resin.

  In that case, as shown in the figure, a photosensitive resin is applied to the surface of a flat substrate 31 such as a silicon wafer by a spin coating method. When the resin has positive photosensitivity, exposure is performed through a mask that does not allow light to hit the portions where the protrusions 34 are formed. Thereafter, by performing a development process, the resin at the portion irradiated with light is removed, and the convex portion 34 is formed. Also in this case, the semiconductor design on the substrate 31 is made so that one edge 34a of the convex portion 34 is a place where the contact member 19 at the lower portion of a single crystal Si1 chip to be described later stops.

  In the case where the convex portion 34 is formed of a resin, for example, as shown in FIGS. 4A and 4B, for example, it is preferable to have a planar shape L shape. Thus, as will be described later, when the single crystal Si substrate 10 is moved in one direction by tilting the positioning substrate 30 on which the single crystal Si substrate 10 is placed, the vertical position and the horizontal position Can be determined uniquely at the same time.

  Moreover, when the shape of the convex part 34 is made into the planar shape L shape, it is preferable that a corner corner part has a clearance gap. Thereby, it is possible to prevent the corners of the single crystal Si substrate 10 from being damaged.

  Next, a vacuum suction hole 35 for sucking the single crystal Si substrate 10 is formed in the positioning substrate 30. The vacuum suction hole 35 is opened by laser processing or the like before the step 33 described above is formed.

  On the other hand, the positioning substrate 30 is sequentially reduced in size when processing the polycrystalline Si glass substrate 40 as an insulating substrate described in [Manufacture of Insulating Substrate] and [Manufacturing Semiconductor Device on Insulating Substrate]. If the exposure size of one shot of the exposure projector (stepper) is the same, it can be manufactured with good consistency with the subsequent steps.

  In addition, when the positioning substrate 30 has a contact portion 19a formed of a concave portion as shown in FIG. 5A, the shape of the single crystal Si substrate 10 is as shown in FIG. It is also possible to form the convex part 36 along the contact part 19a made of the concave part of the single crystal Si substrate 10. In this case, the convex portion 36 does not necessarily have to be fitted into the concave portion of the single crystal Si substrate 10. If it is formed so as to fit, accuracy is required to fit the concave portion of the single crystal Si substrate 10 to the convex portion 36. In this embodiment, as described later, the positioning substrate 30 has This is because the placed single crystal Si substrate 10 is moved and brought into contact with the edge of the convex portion 36 to be positioned, so that it is not always necessary to fit it. Further, since this type of single crystal Si substrate 10 can omit the contact member 19, the process can be simplified.

[Production of single crystal silicon substrate]
Next, the single crystal Si substrate 10 for transfer devices will be described with reference to FIGS.

  First, as shown in FIG. 6, the single crystal Si substrate 10 immediately before being cut out in a chip shape and placed on the positioning substrate 30 is composed of the single crystal Si 1 and the contact member 19 formed thereon.

  In the single crystal Si 1, a gate oxide film 4 is formed on a single crystal silicon (Si) substrate 2 (hereinafter referred to as “single crystal Si substrate”) 2 having a source / drain impurity implanted portion 3 formed on the surface thereof. A gate electrode 5 is formed thereon, and an interlayer insulating film 6 is further formed thereon to cover the gate electrode 5 and the like. Further, a hydrogen ion implanted layer 7 is formed at a predetermined depth of the source / drain impurity implanted portion 3 in the single crystal Si substrate 2. The above process is performed by a microfabrication process of about 0.5 μm, for example. The single crystal Si substrate 10 has a size of about 10 mm × 10 mm, for example.

  A method for manufacturing the single crystal Si substrate 10 having the above structure will be described.

  First, as shown in FIG. 7, from the state of the single crystal silicon wafer 2a having a diameter of about 6 inches (about 15 cm) or 8 inches (about 20 cm), if necessary, LOCOS (Local Oxidation of Silicon: selective oxidation method). )) Oxidation element isolation (isolation) process and, in some cases, shallow trench isolation process, to perform element isolation, and as shown in FIG. 6, thermal oxidation of the gate oxide film 4, formation and patterning of the gate electrode 5 Impurity implantation into the source / drain impurity implantation part 3, impurity activation, formation of the interlayer insulation film 6, planarization of the interlayer insulation film 6 by CMP (Chemical Mechanical Polishing), hydrogen ion implantation layer 7 undergoes a process of hydrogen ion implantation into 7.

  In the above process, after the interlayer insulating film 6 is formed, contact hole opening (not shown), source / drain metal film formation, patterning, passivation film formation, planarization by CMP, and the hydrogen ion implantation layer are performed. The process may be advanced, such as hydrogen ion implantation into 7.

  By proceeding with the above steps, as shown in FIG. 8, a single crystal silicon wafer 10a in which single crystal Si1 is formed in each partitioned region is completed. This single crystal silicon wafer 10 a is formed by forming a plurality of single crystal Si substrates 10 before attaching the contact member 19.

  Next, predetermined patterning is performed on the back side of the single crystal silicon wafer 10a, and the positioning substrate 30 and the edge 32a of the concave portion 32 shown in FIG. 2 (the positioning substrate 30 and the convex portion edge 34a in FIG. 3) are formed. The abutting members 19 that abut are collectively formed as a positioning pattern.

  As a method for forming the contact member 19, a method using a photolithography method, for example, will be described as shown in FIG.

  As shown in the drawing, first, positioning pattern alignment marks (Alignment Marks) 8 and 8 as markers that can be recognized by infrared rays are provided at, for example, both ends on the surface of the single crystal silicon wafer 10a (the lower side in the drawing). Then, a protective film 11 made of a positive photosensitive resin such as a photoresist is applied to the surface of the single crystal silicon wafer 10a by about 2 μm. This protective film 11 is for preventing the surface of the single crystal silicon wafer 10a from being damaged when the single crystal silicon wafer 10a is turned over and patterned.

  Next, as shown in the figure, the single crystal silicon wafer 10a is turned over, and a positive photosensitive resin film 12, for example, is applied to the back surface (upper side in the figure) of the single crystal silicon wafer 10a by spin coating. A thickness of 1 to 10 μm is applied. Subsequently, the single crystal silicon wafer 10a is placed on a sample stage with an exposure projector (not shown) while keeping the back side of the single crystal silicon wafer 10a up.

  Next, the positioning pattern alignment marks 8 and 8 on the surface side that is the lower surface of the single crystal silicon wafer 10a are observed from above the sample stage with, for example, infrared microscopes 9 and 9 using infrared light having a wavelength of 1300 nm. Read. Here, when observing the front surface side with infrared light from the back surface of the single crystal silicon wafer 10a, roughness of the back surface of the single crystal silicon wafer 10a hinders image observation, so the observation spot 13 is in a mirror state. It is preferable to polish to a minimum. As described above, the positioning pattern alignment marks 8 and 8 are read by the infrared microscopes 9 and 9 because the single crystal silicon wafer 10a is opaque. This is because the pattern boundary on the surface side of the crystal Si1 cannot be recognized.

  Next, after the positioning pattern alignment marks 8 and 8 are read, the positions are stored, and the upper side is observed with visible light with the same infrared microscopes 9 and 9 and provided above the single crystal silicon wafer 10a. The optical mask 14 is positioned by the optical mask alignment marks 14a and 14a formed on the optical mask 14. That is, the optical mask alignment marks 14a and 14a at both ends are read, and the optical mask alignment marks 14a and 14a are aligned with the positioning pattern alignment marks 8 and 8, whereby the optical mask 14 is uniquely positioned. Is done.

  Next, after positioning the optical mask 14, the infrared microscopes 9 and 9 are moved to the side, and the positive photosensitive resin film 12 is exposed through the optical mask 14 on which a predetermined pattern is formed. After the exposure, the positive photosensitive resin resin 12 on the single crystal silicon wafer is developed to remove the portion irradiated with light in the positive photosensitive resin film 12 as shown in FIG. After development, the resin is hardened by baking. At that time, it is important not to raise the baking temperature excessively so that the taper shape of the pattern edge becomes steep. Thereby, the contact member 19 aligned for each single crystal Si1 is formed on the single crystal silicon wafer 10a.

  Note that the method for forming the contact member 19 is not limited to the method using infrared light, but a marker reading mechanism is provided above and below the single crystal silicon wafer 10a to provide a stage (coordinates not shown). The position of the single crystal silicon wafer 10a may be stored in a stage that can be stored, and the upper and lower substrates may be aligned separately. That is, first, when aligning the insulating substrate, the upper silicon substrate is retracted to the side, and the marker position of the lower insulating substrate is read with a camera arranged downward above the stage to store the coordinates. . Next, when aligning the upper silicon substrate, the lower insulating substrate is withdrawn to the side, and the coordinates of the marker position of the silicon substrate are read and stored by a camera arranged upward below the stage. Then, the upper and lower substrates are moved to predetermined positions according to the coordinates stored in the stage to perform alignment.

  As described above, the abutting member 19 has an advantage that a joint member having a high positional accuracy within ± 1 μm can be easily formed by a photolithography method well known in the semiconductor manufacturing field. In particular, when a part of the semiconductor structure is formed in advance on the single crystal Si substrate 10 as described above, it is very useful because it can be sufficiently matched with the semiconductor structure.

  On the other hand, the contact member 19 is preferably formed on the back surface of the single crystal Si substrate 10 as described above in terms of high positional accuracy and easy formation. However, instead of such contact member, high-precision laser dicing is used. If the single crystal Si substrate 10 can be cut with a certain degree of accuracy by using an apparatus or the like with reference to the positioning mark, the cut outer shape itself may be used as the contact portion. For example, in the case where a part of the semiconductor structure is not formed in advance on the single crystal Si substrate 10, it may be ± 1 μm or more and can be used. Recently, a high-precision laser dicing apparatus with high accuracy of around ± 1 μm has been put into practical use. The alignment by this high-precision dicing apparatus can be performed by a method equivalent to the method described above.

  Next, as shown in the figure, the single crystal silicon wafer 10a on which the contact member 19 is formed is cut by a cutting means 15 such as a normal dicing apparatus or a laser dicing method. In the cutting operation, it is preferable to make a cut on the single crystal silicon wafer 10a in advance by using, for example, a dicing saw. The dimension of this cut is, for example, about several millimeters square.

  After the cutting, the protective film 11 on the surface of the single crystal silicon wafer 10a becomes unnecessary and is removed with a chemical solution. Here, when the protective film 11 is formed of a positive photosensitive resin such as a photoresist, it is removed with acetone followed by isopropyl alcohol or the like. That is, since positive type photosensitive resin such as photoresist must be completely removed, it is removed by using isopropyl alcohol as a shower following acetone. In the subsequent pure water cleaning, a positive photosensitive resin such as a photoresist is completely removed by showering.

  By cutting out in this way, as shown in FIG. 6, the single crystal Si substrate 10 having the contact member 19 formed on the back surface is completed.

[Placement of single crystal silicon substrate on insulating substrate]
Next, the single crystal Si substrate 10 formed as described above is placed at the position of the recess 32 of the positioning substrate 30 as shown in FIG. That is, in the present embodiment, the position where the contact member 19 is brought into contact with the edge 32 a of the recess 32 is an accurate placement position of the single crystal Si substrate 10 on the positioning substrate 30. In the present embodiment, as shown in the figure, the positioning substrate 30 is tilted to slide the single crystal Si substrate 10 so that the contact member 19 contacts the edge 32 a of the recess 32. Therefore, in this embodiment, when the single crystal Si substrate 10 is placed in the concave portion 32 of the positioning substrate 30, the single crystal Si substrate 10 may be placed in the concave portion 32, so that the accuracy is about 2 to 300 μm. It can be placed with coarse accuracy.

  As described above, after the single crystal Si substrate 10 is placed in the concave portion 32 of the positioning substrate 30, in this embodiment, the positioning substrate 30 is slightly tilted as shown in FIG. The inclination angle at this time is preferably 10 degrees to 20 degrees, for example. Further, in the present embodiment, vibration with a frequency close to the audible region in the direction of arrow A is applied while the positioning substrate 30 is tilted. When the positioning substrate 30 is kept horizontal, the arrow A direction is the vertical direction.

  By applying this vibration, the single crystal Si substrate 10 floats in the direction of arrow A. Since the positioning substrate 30 is inclined, the single crystal Si substrate 10 slides in the direction of the arrow B due to gravity, and the abutting member 19 abuts against the edge 32 a of the recess 32 eventually. As described above, in the present embodiment, by applying vibration to the positioning substrate 30, the positioning substrate 30 can be automatically moved to a predetermined position for positioning.

  Further, as a result of examining the amplitude of the vibration described above, it was found that the amplitude in the frequency range of the portion described as “the region where the chip stops” should be given as shown in FIG. Specifically, for example, when the level difference 33 is 20 μm, vibration with a frequency of 200 Hz or more with a one-side amplitude of 10 μm or less may be applied.

  In other words, when the single crystal Si substrate 10 is far away from the positioning substrate 30 by a height greater than the height of the step 33, the single crystal Si substrate 10 exceeds the edge 32a, so that the desired positioning cannot be performed. . Therefore, the frequency and amplitude of vibration applied to the positioning substrate 30 must be determined appropriately.

  Next, the single crystal Si substrate 10 on the positioning substrate 30 positioned with high accuracy of ± 1 μm described above is in contact with the lower side of the positioning substrate 30 in advance as shown in FIG. At 37, it is fixed by suction. At this time, it is important that the positioning substrate 30 is placed on a surface plate-like vacuum chuck 37 as shown in the figure so that the positioning substrate 30 does not warp.

[Production of insulating substrate]
Next, the polycrystalline Si glass substrate 40 as an insulating substrate will be described.

  As shown in FIG. 14, the polycrystalline Si glass substrate 40 includes a light transmissive amorphous glass plate 41, a silicon dioxide insulating film 42 formed on the light transmissive amorphous glass plate 41, Furthermore, it comprises a polycrystalline silicon TFT 50 formed on each pixel portion of the liquid crystal display formed thereon.

  When the polycrystalline Si glass substrate 40 is manufactured, as shown in the figure, first, a silicon dioxide insulating film 42 serving as a base coat film is formed on the light-transmitting amorphous glass plate 41 to a thickness of about 200 nm. . Next, an amorphous silicon film is formed to a thickness of about 30 to 200 nm. The silicon dioxide insulating film 42 and the amorphous silicon film are formed by plasma chemical vapor deposition. The two-layer film can be formed by maintaining a vacuum during each of the two-layer film forming steps, for example, by using a cluster type multi-chamber plasma CVD apparatus.

Subsequently, in order to desorb hydrogen in the amorphous silicon film, heat treatment (annealing) is performed for 30 to 60 minutes with heat of about 450 to 600 ° C., for example. By this heat treatment, the hydrogen content in the amorphous silicon film can be reduced to 1 × 10 ¹⁹ cm ⁻³ or less. This heat treatment may also serve as solid phase crystal growth.

In the present embodiment, for example, the amorphous silicon film is removed by patterning and etching only at the portion where the single crystal Si substrate 10 is bonded (see FIG. 14 or FIG. 1B).
By performing this patterning removal, even if the light-transmitting amorphous glass plate 41 is sequentially irradiated with laser, the laser beam is transmitted through the portion to be bonded. The temperature of the surface of the plate 41 does not rise to near the melting point of amorphous silicon.

  The amorphous silicon film is polycrystallized by an excimer laser having a near-ultraviolet wavelength obtained by shaping the beam intensity distribution into a rectangular wave or the like. For example, when a XeCl excimer laser is used, the wavelength is in the near ultraviolet region of wavelength λ = 308 nm.

  Further, the portion where the single crystal Si substrate 10 is joined by the patterning removal process described above is such that the temperature of the light transmissive amorphous glass plate 41 does not rise to the vicinity of the melting point of silicon, and the light transmissive amorphous glass plate. The laser crystallization process can be performed without causing thermal damage to 41. However, the present invention is not limited to this. For example, the amorphous silicon film is not patterned, and the single-crystal Si substrate 10 is mounted successively by a laser crystallization method using a lateral growth method (SLS method: Sequential Lateral Solidification method). You may crystallize avoiding a location.

  Further, after the non-single crystal silicon film 50 is removed by patterning so that the bonding process at the time of bonding can be smoothly processed, a silicon dioxide insulating film 42 that also serves as a gate insulating film may be formed to a thickness of about 100 nm. good.

[Activation / bonding / peeling of insulating substrate]
As shown in FIG. 15, a plurality of single crystal Si substrates 10 positioned and placed on the positioning substrate 30 described above are bonded to the polycrystalline Si glass substrate 40 produced as described above.

  At the time of bonding, the bonding surfaces of the polycrystalline Si glass substrate 40 and the single crystal Si substrate 10 are washed with a mixed solution (SC1 solution) of ammonia water, hydrogen peroxide solution, and pure water, and OH is formed on the surfaces. The group is present and remains active for bonding. For example, instead of the surface activation by the SC1 cleaning, the surface may be activated by exposure to oxygen plasma.

  As shown in the figure, the process of joining the two after cleaning is performed by bringing the surfaces of the single crystal Si substrate 10 and the polycrystalline Si glass substrate 40 into contact with each other and pressing them with a slight force, thereby spontaneously bonding. Is something that goes on. At this time, the positioning substrate 30 is placed on the surface plate as described above so that the positioning substrate 30 is not easily bent due to gravity or a load although it is adhered with a slight force. It is essential.

  When the bonding is completed, as shown in FIG. 16, the contact member 19 provided on the back surface of the single crystal Si1 in the single crystal Si substrate 10 is removed, for example, by performing oxygen plasma treatment in a vacuum. It is desirable to keep it.

  As described above, a plurality of single crystal Si substrates 10 are placed on the positioning substrate 30 and aligned with high accuracy, and then collectively bonded to a predetermined position of the polycrystalline Si glass substrate 40. At this time, since one side is the polycrystalline Si glass substrate 40 having light translucency, it can be aligned by visible light.

  After bonding, as shown in FIG. 17, the single crystal Si 1 mounted on the polycrystalline Si glass substrate 40 is subjected to hydrogen ion implantation as an unnecessary portion by heat treatment in a peeling process at about 600 ° C. Peel from layer 7.

[Semiconductor fabrication on polycrystalline Si glass substrate]
Next, as shown in FIG. 18, the polycrystalline Si glass substrate 40 is formed with a single crystal Si1 thin film transistor and a polycrystalline silicon TFT 70, and the polycrystalline silicon TFT 70 and the single crystal Si1 thin film transistor 1 are connected by wiring. Thus, a semiconductor in which the single crystal Si1 and the polycrystalline silicon TFT 70 are mixed is formed.

  The details are as follows.

  First, the gate insulating film 51 of the polycrystalline silicon TFT 70 is formed. The gate insulating film 51 is also formed on the single crystal Si1 side. Subsequently, film formation / patterning of the gate electrode 52 of the polycrystalline silicon TFT 50, impurity doping 53/53, and impurity activation are performed on the source / drain portions. In this impurity doping, it is preferable to carry out, for example, an ion doping method and a process such as covering with a photoresist so that impurities do not enter the single crystal Si1 side.

  At this time, at the time of alignment of the optical mask by the successive reduction exposure projector (stepper) at the time of film formation / patterning of the gate electrode 52, the activation / bonding / peeling process of the one shot exposure region and the previous insulating substrate If the size of the positioning substrate used in the above is equal, even if a positional deviation occurs due to a marker reading error, it affects only the exposure area of one shot. For this reason, it is possible to minimize the positional deviation from the portion of the single crystal Si thin film transistor. This can be said for all subsequent patterning processes by photolithography.

  Next, an interlayer insulating film 54 made of a silicon dioxide-based insulating film is formed to 200 to 300 nm on both the polycrystalline silicon TFT 70 and the single crystal Si1 thin film transistor, and a contact hole 55 is opened. Etching for opening the contact hole 55 is performed by photolithography. Further, in the opening etching of the contact hole 55, as shown in the figure, the wiring contacts 56 and 56 of the single crystal Si1 thin film transistor, the gate contact 57, and the wiring contacts 58 and 58 of the polycrystalline silicon TFT 70 are opened. Next, the source / drain / gate metal film 59 is formed and patterned as a wiring pattern connected to the wiring contacts 56, 56, the gate contact 57, and the wiring contacts 58, 58.

  In the above process, the following process may be performed so that the wiring connection between the single crystal Si1 and the polycrystalline silicon TFT 70 is smoothly performed.

  That is, the exposure at the time of patterning the source / drain / gate metal film 59 to be a wiring may be performed in two steps. That is, the first exposure is light-shielded around the single crystal Si1, and aligned with reference to a marker (not shown) formed on the polycrystalline Si glass substrate 40, and the second exposure is performed only around the single crystal Si1. Light is irradiated, and alignment is performed with reference to a marker (not shown) formed on the single crystal Si1.

  Thus, in the thin film transistor process performed by processing the polycrystalline Si glass substrate 40 whose wiring rule is gentler than the manufacturing process of the single crystal Si1, the single crystal Si1 wiring contacts 56 and 56 and the gate contact 57 and the source / drain / gate are formed. Contact with the wiring pattern of the metal film can be made with high accuracy.

  On the other hand, before forming the source / drain / gate metal film 59 to be a wiring, a boundary portion 60 between the single crystal Si1 side and the polycrystalline silicon TFT 50 side is formed by a GCIB (Gas Cluster Ion Beam) method (2002 IEEE: International SOI). Even if the source / drain / gate metal film 59 is formed as a wiring by flattening by Conference Proceedings, p.192), etc., it is possible to prevent disconnection at the boundary portion 60.

  As described above, as shown in FIG. 1A, the polycrystalline Si glass substrate 40 in which the single crystal Si1 and the polycrystalline silicon TFT 70 are mixed is formed. Thereafter, after a step of enclosing the liquid crystal material between the opposing glass substrate, the polycrystalline Si glass substrate 40 is divided, for example, a polycrystalline silicon TFT 70 for switching pixels in a liquid crystal display, and scanning. A semiconductor device including a single crystal Si1 serving as a driver IC for the signal line driver circuit and the data signal line driver circuit is completed.

  As a result, a plurality of driver chips and other functional circuit chips are bonded only to predetermined portions on a mother glass size (for example, 1500 mm × 1800 mm), and a non-single crystal silicon semiconductor and a single crystal silicon semiconductor are respectively connected. Transistors of any material can be placed in the right place. Thereby, a non-single crystal silicon TFT and a single crystal silicon TFT can be mixed on the substrate.

  Further, as shown in FIG. 1B, by bonding a plurality of driver chips on a mother glass at a time, it can be manufactured with higher productivity than the display panel manufacturing by the conventional COG technology. This can be processed efficiently in a thin film transistor process where bonding can be done without adhesive and large mother glass can be processed.

  In addition, the bonding process can be aligned with high accuracy within ± 1 μm, and the bonded single crystal silicon chip can be connected to a large number of thin wires, effectively and efficiently eliminating high-precision and high-performance display semiconductors. Can be manufactured in space.

  As a result, semiconductors that take advantage of each advantage can be formed on the same glass substrate, and high-performance semiconductors can be mounted on the display substrate. Can be manufactured.

  In other words, in this embodiment, an amorphous substrate in which a thin film transistor including a non-single crystal silicon film manufactured by film formation and polycrystallization and a single crystal silicon thin film semiconductor manufactured by transfer technology is mixed is used. In order to bond the single crystal silicon chip or the semi-finished single crystal silicon chip to a predetermined portion of a part of the substrate with high accuracy, a positioning pattern is formed on the silicon chip by a back surface alignment method using infrared light. First, it is placed at a predetermined rough position on a substrate called a positioning substrate 30. Next, the positioning substrate 30 is vibrated at a predetermined frequency and a slight amplitude, and is guided to a predetermined joining position where a stopper on the positioning substrate 30 is formed with an accuracy of ± 1 μm. As a result, not only high-definition wiring can be aligned and bonded with high precision, but also a plurality of chips can be bonded together on the substrate, producing a liquid crystal panel with high productivity. can do. Note that since the bonding in this embodiment mode is performed without an adhesive, there is no possibility of impurities oozing out in subsequent processes, and thus the transistor manufacturing process can be performed.

  Accordingly, the transfer device made of single crystal silicon and the thin film transistor made of non-single crystal silicon film are respected on one substrate such as an amorphous high strain point glass substrate having light transmittance while respecting the advantages of both. In addition to being able to be manufactured with high productivity, it is possible to manufacture a high-definition and high-functional display panel with a narrow frame area while keeping manufacturing costs low. The strain point is a physical property value of a solid such as glass and refers to “temperature at which strain starts to occur”. In a general liquid crystal display glass, the temperature is about 650 ° C. Further, “high” means that the strain point is higher than that of ordinary glass (other than for liquid crystal display).

  Thus, in the semiconductor device manufacturing method of the present embodiment, at least a part of the semiconductor structure is formed on the single crystal Si substrate 10. When one or more single crystal Si substrates 10 are collectively bonded to the set positions of the polycrystalline Si glass substrate 40, first, as shown in FIG. 11, the single crystal Si substrate 10 has an edge 32a on the surface. Is placed on the positioning substrate 30. Next, one or more single crystal Si substrates 10 are simultaneously moved to the edge 32 a in parallel with the surface of the positioning substrate 30. As a result, as shown in FIG. 1B, all the single crystal Si substrates 10 come into contact with the edges 32a, and are automatically set to positions corresponding to the set positions of the polycrystalline Si glass substrate 40. And is temporarily fixed at that position. Therefore, by bonding one or more single crystal Si substrates 10 positioned on the positioning substrate 30 to the set position of the polycrystalline Si glass substrate 40, the single crystal Si substrates 10 can be bonded together. it can.

  As a result, as shown in FIG. 11, in the stage where the single crystal Si substrate 10 is placed on the positioning substrate 30, the single crystal Si substrate 10 is moved thereafter, so that the precision of the placement position is not required. . On the other hand, after the single crystal Si substrate 10 is translated and brought into contact with the edge 32a, the contact position with the edge 32a corresponds to the accurate setting position of the polycrystalline Si glass substrate 40. The single crystal Si substrate 10 can be bonded to the polycrystalline Si glass substrate 40 at once.

  Therefore, single crystal Si1 can be bonded onto the polycrystalline Si glass substrate 40, and it has higher productivity than the display panel manufacturing by COG technology, and the bonding process is performed with high accuracy within ± 1 μm. Therefore, it is possible to provide a method for manufacturing a semiconductor device capable of manufacturing a high-performance display semiconductor efficiently and in a space-saving manner.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 11, all the single crystal Si substrates 10 are obtained by simply tilting the positioning substrate 30 on which the single crystal Si substrate 10 is placed. Since it moves automatically and collectively by gravity on the positioning substrate 30, it can be easily moved to the edge 32a.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 6, the contact member 19 is formed on the single crystal Si substrate 10, so that the contact member 19 serves as the positioning substrate 30 and its edge 32a. Abut. Therefore, a contact member with high positional accuracy can be easily formed on the single crystal Si substrate 10, and the single crystal Si substrate 10 itself does not contact the positioning substrate 30 and the edge 32a. It is possible to prevent the substrate 30 and its edge 32a from being contacted and damaged.

  Further, in the method of manufacturing the semiconductor device of the present embodiment, as shown in FIG. 15, both the joint surfaces of the single crystal Si substrate 10 and the polycrystalline Si glass substrate 40 are both joined and activated. Adhesion proceeds only by pressing, and both can be easily joined without an adhesive. The term “joint activation” refers to, for example, a state where OH groups exist on each joint surface.

  Further, in the method for manufacturing a semiconductor device of the present embodiment, as shown in FIG. 1A, the polycrystalline Si glass substrate 40 is preliminarily provided with a portion of a semiconductor structure made of non-single-crystal silicon. A crystalline silicon TFT 50 is formed. Therefore, when the single crystal Si substrate 10 is bonded to the polycrystalline Si glass substrate 40, a semiconductor device in which the polycrystalline silicon TFT 50 and the single crystal Si1 are mixed on the polycrystalline Si glass substrate 40 can be provided.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, a single crystal silicon semiconductor completed as in the conventional COG is not mounted on the polycrystalline Si glass substrate 40, but as shown in FIG. After a part of the semiconductor structure in the Si semiconductor is bonded to the polycrystalline Si glass substrate 40, both of the semiconductor structure made of non-single crystal silicon formed in advance on the polycrystalline Si glass substrate 40 are integrated. A wiring pattern is formed.

  Thereby, as shown in FIG. 1 (a), the polycrystalline silicon TFT 50 and the single crystal Si1 are mixed on the polycrystalline Si glass substrate 40, and has higher productivity than the display panel manufacturing by the COG technology, Furthermore, it is possible to provide a method for manufacturing a semiconductor device that can be connected to a large number of thin wirings from the bonded single crystal Si substrate 10 and can manufacture a highly accurate and highly functional display semiconductor efficiently and in a space-saving manner. it can.

  Further, in the manufacturing method of the semiconductor device of the present embodiment, by forming the edge 32a of the positioning substrate 30 as a positioning pattern corresponding to the set position of the single crystal Si substrate 10 on the polycrystalline Si glass substrate 40, The plurality of edges 32a can be formed on the positioning substrate 30 with high accuracy.

  In the semiconductor device manufacturing method of the present embodiment, as shown in FIG. 4, the positioning pattern of each edge 32 a of the positioning substrate 30 has a planar shape that regulates two sides of the single crystal Si substrate 10. Since it is formed, the two sides of the single crystal Si substrate 10 can be regulated and the position on the plane can be defined. In addition, since a gap is provided at the corner angle where the two sides intersect, the structurally weak corner portion of the single crystal Si substrate 10 can be prevented from coming into contact with the edge 32a and being damaged. Note that the shape in which the planar shape restricts the two sides of the single crystal Si substrate 10 refers to a shape such as an L shape, a V shape, an X shape, or a T shape.

  Further, in the method of manufacturing the semiconductor device according to the present embodiment, as shown in FIG. 1B, after forming at least the gate electrode 5 on the single crystal Si substrate 10, the substrate 30 for positioning and each edge 32a thereof are contacted. The contact member 19 formed on the back surface of the single crystal Si substrate 10 that is in contact is formed of a resin having alkali resistance.

  Therefore, the contact member 19 can be easily formed of resin. Further, since it is a resin, it can be easily removed by etching. Further, since this resin has alkali resistance, the abutting member 19 can be used even when the single crystal Si substrate 10 and the polycrystalline Si glass substrate 40 are joined even if alkali treatment is performed to activate the joining surfaces. Can be prevented from deteriorating.

  In the method of manufacturing a semiconductor device according to the present embodiment, resin is applied to the entire back surface of single crystal Si substrate 10, and positioning pattern alignment marks 8 and 8 formed on the front surface side of single crystal Si substrate 10 are used. The contact member 19 made of a resin can be formed on the back surface side of the single crystal Si substrate 10 by aligning as a reference and processing the contact member 19 to be uneven.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 5, at least the gate electrode 5 is formed on the single crystal Si substrate 10. Thereafter, a part of the back surface of the single crystal Si substrate 10 is etched to a predetermined depth to form the contact portion 19a that contacts the edge 36a formed on the surface of the positioning substrate 30.

  Therefore, the contact portion that contacts the positioning portion can be formed by using only the single crystal silicon substrate without forming a separate contact member on the positioning substrate.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 2, a part of the surface of the positioning substrate 30 made of a flat plate is etched to form a concave or convex shape. Edges 32 a and 36 a can be formed on the surface of 30.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, as shown in FIG. 3, the positioning substrate can also be formed by patterning with resin on the surface of the positioning substrate 30 formed of a flat plate. An edge 34 a can be formed on the surface of 30. In addition, since this resin has alkali resistance, the edge 34a is not deteriorated even when the single crystal Si substrate 10 and the polycrystalline Si glass substrate 40 are bonded to each other by alkali treatment to activate the bonding surfaces. Can be.

  Further, in the method of manufacturing the semiconductor device of the present embodiment, after forming at least the gate electrode 5 on the single crystal Si substrate 10 having the appearance shown in FIG. 8, it is cut at the arrow as shown in FIG. Hydrogen ions or rare gas ions are implanted to a predetermined depth in the crystalline Si substrate 10. When the single crystal Si substrate 10 is bonded to the polycrystalline Si glass substrate 40 and then heat-treated, the single crystal silicon film 1a of the single crystal Si1 can be peeled off by the hydrogen ion implantation layer 7 or the rare gas ion implantation layer. it can. Thereby, the single crystal Si substrate 10 can be made thin.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, the bonding activation of both the bonding surfaces of the single crystal Si substrate 10 and the polycrystalline Si glass substrate 40 is performed by using a liquid containing ammonia water and hydrogen peroxide water or peroxidation. Cleaning is performed with a liquid containing hydrogen water or exposure to oxygen plasma. Thereby, for example, it is possible to obtain bonding activation in which OH groups exist on each bonding surface.

  Further, in the method of manufacturing a semiconductor device according to the present embodiment, at least the gate electrode 5 is formed on the single crystal Si substrate 10. After that, as shown in FIG. 10, the single crystal Si substrate 10a is cut at the position indicated by the arrow, and the positioning substrate 30 on which the single crystal Si substrate 10 is placed is microvibrated. Thereby, since the single crystal Si substrate 10 floats, the placed single crystal Si substrate 10 can be moved to the edge 32 a in parallel to the surface of the positioning substrate 30.

  By the way, when the positioning substrate 30 on which the single crystal Si substrate 10 is placed is microvibrated, if the microvibration is too large, the single crystal Si substrate 10 exceeds the height of the edge 32 a of the positioning substrate 30. As a result, the single crystal Si substrate 10 cannot be defined at the edge 32a (see a region out of the graph shown in FIG. 12). Therefore, in this embodiment, the single crystal Si substrate 10 placed on the positioning substrate 30 is positioned in a frequency range and an amplitude range in which the floating height does not exceed the height of the edge 32a of the positioning substrate 30. This problem can be prevented by minutely vibrating the working substrate 30.

  In the method for manufacturing the semiconductor device of the present embodiment, at least the gate electrode 5 is formed on the single crystal Si substrate 10a. Thereafter, as shown in FIG. 10, the single crystal Si substrate 10 cut at the arrow and positioned on the positioning substrate 30 is sucked through the vacuum suction holes 35 formed in the positioning substrate 30. Since it is temporarily fixed on the positioning substrate 30, the single crystal Si substrate 10 can be easily fixed temporarily.

  In the semiconductor device manufacturing method of the present embodiment, the planar shape of the positioning substrate 30 is the same as the shot area of the exposure projector used when patterning the polycrystalline Si glass substrate 40. The edge 32 a can be patterned on the positioning substrate 30 having the same area as the one-shot exposure region of the crystalline Si glass substrate 40.

  In the method for manufacturing the semiconductor device of the present embodiment, the planar shape of the positioning substrate 30 is the same as the planar shape of the polycrystalline Si glass substrate 40, and thus the single crystal Si substrate 10 placed on the positioning substrate 30. Can be bonded to the polycrystalline Si glass substrate 40 in a 1: 1 relationship.

  Further, in the method of manufacturing the semiconductor device of the present embodiment, as shown in FIGS. 2 and 3, since the material of the positioning substrate 30 is silicon (Si), silicon which is a generally used flat substrate is used. Using the wafer, the highly accurate edge 32a can be easily formed by photolithography.

  In the method for manufacturing a semiconductor device according to the present embodiment, since the unevenness of 100 nm or more is formed on the surface of the positioning substrate 30, the placed single crystal Si substrate 10 is easily slipped.

  Further, in the method of manufacturing the semiconductor device of this embodiment, as shown in FIGS. 11, 13 and 15, after forming at least the gate electrode 5 as a part of the semiconductor structure, One or more single crystal Si substrates 10 implanted with rare gas ions are placed on a positioning substrate 30 formed of a flat plate having an edge 32a on the surface, and one or more substrates are simultaneously applied with slight vibration while tilting the positioning substrate 30. A process of positioning by moving to the edge 32a parallel to the surface of the positioning substrate 30 and then temporarily fixing by vacuum suction, and a part of the semiconductor structure made of non-single-crystal silicon is previously formed on the single-crystal Si substrate 10 In the polycrystalline Si glass substrate 40 thus formed, a step of collectively bonding to a set position corresponding to the edge 32a of the positioning substrate 30, and a hydrogen treatment by heat treatment after the bonding. At on-injecting layer 7 or rare gas ion implanted layer and a step of separating the single-crystal silicon film 1a of the single crystal Si substrate 10.

  Therefore, the non-single crystal silicon semiconductor and the single crystal silicon semiconductor are mixed on the polycrystalline Si glass substrate 40, and the productivity is higher than the display panel manufacturing by the COG technology, and the bonding process is within ± 1 μm. A method of manufacturing a semiconductor device which can be performed with high accuracy and can be connected to a large number of thin wirings from the bonded single crystal Si substrate 10 and can manufacture a high-precision and high-performance display semiconductor efficiently and in a space-saving manner. Can be provided.

  Further, in the method of manufacturing the semiconductor device of the present embodiment, exposure is performed twice in the process of forming the source / drain / gate metal film 59, and the first alignment is performed on the entire surface of the polycrystalline Si glass substrate 40. On the other hand, the second exposure is performed with the shot aligned with the single crystal Si substrate 10.

  Therefore, compared to a non-single-crystal silicon semiconductor whose wiring rule is more gradual than that of single-crystal Si1, the source / drain / gate metal film 59 is formed under the high-precision wiring rule in the single-crystal Si1 manufacturing process. Contact can be made with high accuracy.

  Further, as shown in FIGS. 1, 6, 11, and 17, the semiconductor device manufacturing apparatus of the present embodiment forms at least a gate electrode 5 as a part of the semiconductor structure, and then has a predetermined depth. A single crystal Si substrate 10 implanted with hydrogen ions or rare gas ions is placed on a positioning substrate 30 formed of a flat plate having an edge 32a on the surface, and a slight vibration is applied while tilting the positioning substrate 30. A part of the semiconductor structure made of non-single-crystal silicon and means for temporarily fixing the single-crystal Si substrate 10 by vacuum suction after moving to the edge 32a parallel to the surface of the positioning substrate 30 and positioning them. In the polycrystalline Si glass substrate 40 formed in advance, means for collectively bonding to a set position corresponding to the edge 32a of the positioning substrate 30, and after bonding, water treatment is performed by heat treatment. And means for peeling the single crystal silicon film 1a of the single crystal Si substrate 10 by ion implantation layer 7 or rare gas ion implanted layer.

  Therefore, the non-single crystal silicon semiconductor and the single crystal silicon semiconductor are mixed on the polycrystalline Si glass substrate 40, and the productivity is higher than the display panel manufacturing by the COG technology, and the bonding process is within ± 1 μm. A semiconductor device manufacturing apparatus that can be connected to a large number of thin wirings from a bonded single crystal Si substrate 10 with high accuracy, and can manufacture a high-precision and high-performance display semiconductor efficiently and in a space-saving manner. Can be provided.

  A semiconductor device manufacturing method and a semiconductor device manufacturing apparatus according to the present invention include a silicon semiconductor used in manufacturing an integrated circuit and a thin film transistor, and an amorphous substrate such as glass as a substrate among transistors manufactured from the silicon semiconductor. And a display device such as an active matrix display device using a transistor material manufactured using a single crystal silicon film and a non-single crystal silicon film as a semiconductor material for forming the transistor.

(A) shows one embodiment in the present invention, and is a perspective view showing a plurality of semiconductors immediately after single crystal Si is bonded to a polycrystalline Si glass substrate on which a polycrystalline silicon TFT is mounted. b) is a cross-sectional view showing a process of attaching single crystal Si to a polycrystalline Si glass substrate on which a polycrystalline silicon TFT is mounted. It is sectional drawing which is used when sticking single crystal Si to the said polycrystal Si glass substrate, and shows the structure of the board | substrate for positioning which produced the edge used as a stopper guide by the photolithography and the etching by the recessed part. It is sectional drawing which is used when sticking single crystal Si to the said polycrystalline Si glass substrate, and shows the structure of the board | substrate for positioning which produced the convex part by the photolithographic and the etching which used the edge used as a stopper guide with resin. (A) is a plan view of a positioning substrate having a planar L-shaped convex portion formed of resin, and (b) is moved on the positioning substrate to contact the planar L-shaped convex portion. It is a top view which shows the single crystal silicon substrate which contact | connected. (A) is sectional drawing which shows the structure of the single crystal Si which has another shape, (b) shows the structure of the positioning substrate which formed the edge used as a stopper guide according to the back surface shape of the said single crystal Si. It is sectional drawing. It is sectional drawing which shows the structure of the said single crystal silicon substrate. It is a perspective view which shows the structure of the single crystal silicon wafer for producing the said single crystal silicon substrate. It is a perspective view which shows the structure of the single crystal silicon wafer before attaching a positioning pattern. It is sectional drawing which shows the process of forming a positioning pattern in the said single crystal silicon wafer. It is sectional drawing which shows the structure of the single crystal silicon wafer in which the said positioning pattern was formed. It is sectional drawing which shows the process which moves the single crystal silicon substrate mounted in the said positioning substrate to the edge in the recessed part of the positioning substrate which is a predetermined | prescribed arrangement position by a micro vibration, and contacts. It is a graph which shows the relationship between a frequency and an amplitude area | region when a single crystal silicon substrate stops at an edge, when vibrating the said positioning substrate. It is sectional drawing which shows the process of temporarily fixing the single crystal silicon substrate on the said board | substrate for positioning by vacuum suction. It is sectional drawing which shows the structure of the polycrystal Si glass substrate carrying the said polycrystal silicon TFT. It is sectional drawing which shows the process of sticking the said single crystal silicon substrate to a polycrystal Si glass substrate. It is sectional drawing which shows the structure of the polycrystal Si glass substrate which mounts the polycrystal silicon TFT after sticking the said single crystal silicon substrate. It is sectional drawing which shows the process of peeling a single-crystal silicon film | membrane by heat processing, after sticking the said single-crystal silicon substrate to the polycrystalline Si glass substrate carrying a polycrystalline-silicon TFT. It is sectional drawing which shows the process of forming wiring between the said polycrystal silicon TFT and single crystal Si.

Explanation of symbols

1 Single crystal Si (single crystal silicon)
1a Single crystal silicon film (part)
2a Single crystal silicon wafer 5 Gate electrode 7 Hydrogen ion implantation layer 8 Mark for positioning pattern alignment (marker)
9 Infrared microscope 10 Single crystal silicon substrate (semiconductor circuit member)
10a Single crystal silicon wafer 19 Contact member 19a Contact portion 30 Positioning substrate 32 Recess 32a Edge (positioning portion)
34 Convex part 34a Edge (positioning part)
36a Edge (positioning part)
35 Vacuum suction hole 37 Vacuum chuck 40 Polycrystalline Si TFT glass substrate (bonding substrate)
41 light transmissive amorphous glass plate 50 polycrystalline silicon film 59 source / drain / gate metal film (wiring pattern)
70 Polycrystalline silicon TFT

Claims (30)

Forming a positioning portion of the positioning substrate as a positioning pattern corresponding to a set position of the semiconductor circuit member on the bonding substrate;
Placing the semiconductor circuit element on the positioning substrate having the positioning portion, the semiconductor circuit element by moving the surface of the positioning substrate is positioned in the positioning unit, one or more of the above semiconductor circuit member the positioning substrate Temporarily fixing to,
See containing and bonding to the bonding substrate collectively temporarily fixed above the semiconductor circuit element,
The positioning pattern of each positioning part of the positioning substrate is formed so that the planar shape regulates two sides of the semiconductor circuit member, and a gap is provided at a corner where the two sides intersect. A method of manufacturing a semiconductor device.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the one or more semiconductor circuit members are simultaneously positioned by moving the surface of the positioning substrate.   3. The method of manufacturing a semiconductor device according to claim 1, wherein when the semiconductor circuit member is moved on the surface of the positioning substrate, the positioning substrate is inclined and moved by gravity.   4. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor circuit member forms an abutting member for a positioning portion of the positioning substrate.   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor circuit member uses a single crystal silicon substrate as a base material.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor circuit member is made of a single crystal silicon substrate, and at least a part of the semiconductor structure is built in the single crystal silicon substrate in advance. The bonding substrate, at least a portion of a semiconductor device according to claim 1, 5 or 6, wherein it is a substrate formed integrally of semi-conductor structures Te bonded before or after bonding the smell of the semiconductor circuit member Production method.   8. The method of manufacturing a semiconductor device according to claim 7, wherein at least a part of a semiconductor structure is formed on the bonding substrate in advance before bonding the semiconductor circuit member to the bonding substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein both of the bonding surfaces of the semiconductor circuit member and the bonding substrate are bonded and activated. After bonding the semiconductor circuit member to the bonding substrate,
8. The method of manufacturing a semiconductor device according to claim 7, further comprising a step of forming a wiring pattern of the semiconductor device structure formed in the semiconductor circuit member and the semiconductor device structure formed on the bonding substrate in a common step.   Etching a part of the single crystal silicon substrate on the temporary fixing surface side to a predetermined depth to form a contact portion that contacts the positioning portion formed on the surface of the positioning substrate. 7. A method of manufacturing a semiconductor device according to claim 5, wherein the method is a semiconductor device.   2. The semiconductor device according to claim 1, wherein the positioning portion formed on the surface of the positioning substrate is formed in a concave shape or a convex shape by etching a part of the surface of the positioning substrate made of a flat plate. Manufacturing method.   The bonding activation of both bonding surfaces of the semiconductor circuit member and the bonding substrate is performed by cleaning with a liquid containing ammonia water and hydrogen peroxide water or a liquid containing hydrogen peroxide water, or by exposure to oxygen plasma. 10. A method for manufacturing a semiconductor device according to claim 9, wherein:   The semiconductor circuit member placed on the positioning substrate is moved to the positioning portion of the positioning substrate so as to float the semiconductor circuit member by minutely vibrating the positioning substrate. Item 14. A method for manufacturing a semiconductor device according to Item 1. When minutely vibrating the positioning substrate,
Claim floating height of the semiconductor circuit element placed on the positioning substrate, characterized in that said not exceed the height frequency range and amplitude range of the positioning portion of the positioning substrate 14 The manufacturing method of the semiconductor device of description.   The semiconductor circuit member positioned on the positioning substrate is temporarily fixed on the positioning substrate by suction through a vacuum suction hole formed in the positioning substrate. 2. A method of manufacturing a semiconductor device according to 1.   3. The method of manufacturing a semiconductor device according to claim 2, wherein the planar shape of the positioning substrate matches a shot area of an exposure projector used when patterning the bonding substrate. The method of manufacturing a semiconductor device according to claim 17 , wherein the planar shape of the positioning substrate is the same as the planar shape of the bonding substrate. The method of manufacturing a semiconductor device according to claim 12 , wherein a material of the positioning substrate is silicon (Si). 20. The method for manufacturing a semiconductor device according to claim 19, wherein the surface of the positioning substrate is formed with unevenness of 100 nm or more. Forming a contact member for the positioning portion of the positioning substrate on the temporary fixing surface side of the single crystal silicon substrate serving as a base material of the semiconductor circuit member with a resin having alkali resistance;
The semiconductor circuit member in which the contact member is formed placed on the positioning board, the semiconductor circuit member to move the surface of the positioning substrate is positioned in the positioning unit, the one or more of the semiconductor circuit member Temporarily fixing to the positioning substrate;
And a step of collectively bonding the semiconductor circuit members temporarily fixed to a bonding substrate. At least a part of the semiconductor structure is pre-fabricated on the single crystal silicon substrate that is the base material of the semiconductor circuit member, and the contact member for the positioning portion of the positioning substrate is placed on the temporary fixing surface side of the single crystal silicon substrate to provide alkali resistance. Forming a resin having
The semiconductor circuit member in which the contact member is formed placed on the positioning board, the semiconductor circuit member to move the surface of the positioning substrate is positioned in the positioning unit, the one or more of the semiconductor circuit member Temporarily fixing to the positioning substrate;
And a step of collectively bonding the semiconductor circuit members temporarily fixed to a bonding substrate. In the step of forming a contact member made of resin on the temporary fixing surface side of the single crystal silicon substrate,
Resin is applied to the entire surface of the single-crystal silicon substrate on the temporarily fixed surface side, alignment is performed with reference to a marker formed on the other surface of the single-crystal silicon substrate, and the contact member is processed to be uneven. A method for manufacturing a semiconductor device according to claim 21 or 22 . A semiconductor circuit member is placed on a positioning substrate having a positioning portion, the semiconductor circuit member is moved on the surface of the positioning substrate to be positioned on the positioning portion, and one or more of the semiconductor circuit members are temporarily placed on the positioning substrate. Fixing, and
See containing and bonding the bonded substrate collectively temporarily fixed above the semiconductor circuit element,
Manufacturing of a semiconductor device, wherein the positioning portion formed on the surface of the positioning substrate is formed into a convex shape by patterning the surface of the positioning substrate made of a flat plate with a resin having alkali resistance. Method. 25. The method of manufacturing a semiconductor device according to claim 24 , wherein a material of the positioning substrate is silicon (Si). 26. The method of manufacturing a semiconductor device according to claim 25 , wherein unevenness of 100 nm or more is formed on the surface of the positioning substrate. A step of injecting hydrogen ions or a rare gas to a predetermined depth in a single crystal silicon substrate which is a base material of a semiconductor circuit member to form a hydrogen ion implanted layer or a rare gas ion implanted layer;
The semiconductor circuit member in which a hydrogen ion implanted layer or a rare gas ion implanted layer is formed on the single crystal silicon substrate is placed on a positioning substrate having a positioning portion, and the semiconductor circuit member is moved on the surface of the positioning substrate. Positioning in the positioning part and temporarily fixing the one or more semiconductor circuit members to the positioning substrate;
A step of collectively bonding the semiconductor circuit members temporarily fixed to a bonding substrate ;
And a step of peeling a part of the single crystal silicon substrate by the hydrogen ion implantation layer or the rare gas ion implantation layer by heat treatment after the semiconductor circuit member is bonded to the bonding substrate. Manufacturing method. At least a part of a semiconductor structure is pre-fabricated in a single crystal silicon substrate which is a base material of a semiconductor circuit member, and hydrogen ions or a rare gas is injected to a predetermined depth in the single crystal silicon substrate to form a hydrogen ion implanted layer or a rare Forming a gas ion implantation layer;
The semiconductor circuit member in which a hydrogen ion implanted layer or a rare gas ion implanted layer is formed on the single crystal silicon substrate is placed on a positioning substrate having a positioning portion, and the semiconductor circuit member is moved on the surface of the positioning substrate. Positioning in the positioning part and temporarily fixing the one or more semiconductor circuit members to the positioning substrate;
A step of collectively bonding the semiconductor circuit members temporarily fixed to a bonding substrate ;
And a step of peeling a part of the single crystal silicon substrate by the hydrogen ion implantation layer or the rare gas ion implantation layer by heat treatment after the semiconductor circuit member is bonded to the bonding substrate. Manufacturing method. As a part of the semiconductor device structure, a single crystal silicon substrate having at least a gate electrode and a hydrogen ion or rare gas injection layer formed at a predetermined depth is placed on a positioning substrate having a positioning portion on the surface. Applying a slight vibration while tilting the positioning substrate, moving the surface of the positioning substrate to the positioning portion, and positioning one or more single crystal silicon substrates corresponding to the positioning portions, A step of temporarily fixing by vacuum adsorption;
A step of collectively bonding the single crystal silicon substrate to a set position corresponding to a positioning portion of the positioning substrate in a bonding substrate in which a part of a semiconductor device structure made of non-single crystal silicon is previously formed;
And a step of peeling a part of the single crystal silicon substrate by heat treatment after the bonding in the hydrogen ion implanted layer or the rare gas implanted layer. As a part of the semiconductor device structure, a single crystal silicon substrate having at least a gate electrode and a hydrogen ion or rare gas injection layer formed at a predetermined depth is placed on a positioning substrate having a positioning portion on the surface. Then, a slight vibration is applied while tilting the positioning substrate, the surface of the positioning substrate is moved to the positioning portion, and one or more single crystal silicon substrates are positioned corresponding to the positioning portions, respectively, and vacuum Means for temporary fixation by adsorption;
Means for collectively bonding the single crystal silicon substrate to a set position corresponding to a positioning portion of the positioning substrate in a bonding substrate in which a part of a semiconductor device structure made of non-single crystal silicon is formed in advance;
And a means for peeling off part of the single crystal silicon substrate with the hydrogen ion implanted layer or the rare gas implanted layer by heat treatment after bonding.

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