WO2021033989A1 - Substrate for use in manufacturing display and manufacturing method therefor - Google Patents

Substrate for use in manufacturing display and manufacturing method therefor Download PDF

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Publication number
WO2021033989A1
WO2021033989A1 PCT/KR2020/010639 KR2020010639W WO2021033989A1 WO 2021033989 A1 WO2021033989 A1 WO 2021033989A1 KR 2020010639 W KR2020010639 W KR 2020010639W WO 2021033989 A1 WO2021033989 A1 WO 2021033989A1
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manufacturing
single crystal
substrate
crystal silicon
display
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PCT/KR2020/010639
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French (fr)
Korean (ko)
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박진원
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(주)더숨
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Priority to CN202080044740.9A priority Critical patent/CN114008780A/en
Publication of WO2021033989A1 publication Critical patent/WO2021033989A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K77/00—Constructional details of devices covered by this subclass and not covered by groups H10K10/80, H10K30/80, H10K50/80 or H10K59/80
    • H10K77/10—Substrates, e.g. flexible substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133302—Rigid substrates, e.g. inorganic substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a substrate for manufacturing a display and a method for manufacturing the same. More specifically, it relates to a substrate for manufacturing a display and a method of manufacturing the same, which can overcome the limitations of a display based on polycrystalline silicon, simplify a structure, and improve productivity.
  • a device is formed based on polycrystalline silicon in consideration of the convenience of a large area process and production cost.
  • Polycrystalline silicon is deposited on a large-area glass substrate to manufacture a display.
  • polycrystalline silicon is crystallized and used through a method such as laser or heat application.
  • the present invention has been devised to solve the problems of the prior art as described above, and provides a display manufacturing substrate capable of performing a display manufacturing process on a large area substrate using single crystal silicon and a manufacturing method thereof. For that purpose.
  • the present invention is to overcome the limitations of a display based on polycrystalline silicon, to implement the ultra-high quality of the display, to provide a display manufacturing substrate and a manufacturing method that can simplify the structure and improve productivity. do.
  • the above object of the present invention is a large area substrate for manufacturing a plurality of displays, comprising: a base substrate; And a plurality of single crystal silicon plates disposed on the base substrate.
  • the single crystal silicon plate may have a square shape.
  • the size of a single crystal silicon plate may correspond to n (n is an integer) display size.
  • a plurality of single crystal silicon plates may have the same shape, and may be disposed on the base substrate with equal intervals along a first direction and a second direction perpendicular to the first direction.
  • a device portion may be formed on a single crystal silicon plate.
  • the base substrate may be made of at least one of glass, polymer, quartz, and ceramic.
  • the single crystal silicon plate may be used by cutting a wafer.
  • the above object of the present invention is a method of manufacturing a large-area substrate for manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; And (b) adhering a plurality of single crystal silicon plates onto the base substrate.
  • the above object of the present invention is a method of manufacturing a large-area substrate for manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; And (b) adhering a plurality of single crystal silicon plates formed on the upper portion of the device portion onto the base substrate.
  • a step of flattening the top surfaces of the single crystal silicon plate and the filling portion by forming a filling portion between the plurality of single crystal silicon plates may be further included.
  • the above object of the present invention is a method of manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; (b) adhering a plurality of single crystal silicon plates on a base substrate; And (c) forming element portions on each of the plurality of single crystal silicon plates, respectively.
  • the present invention has an effect of overcoming the limitations of a display based on polycrystalline silicon, realizing ultra-high quality of the display, simplifying a structure, and improving productivity.
  • FIG. 1 is a schematic perspective view showing a substrate for manufacturing a display according to an embodiment of the present invention.
  • FIGS. 2 to 5 are schematic diagrams illustrating a manufacturing process of a substrate for manufacturing a display according to an embodiment of the present invention.
  • a display may be understood to mean a series of display panels that provide visual information to a user such as a smartphone, tablet, or TV.
  • the display manufacturing substrate 10 is not limited to the form shown in the drawing, and the size and shape of the base substrate 110 and the single crystal silicon plate 150 may be changed according to the size and shape of the display. Put.
  • FIG. 1 is a schematic perspective view showing a substrate 10 for manufacturing a display according to an embodiment of the present invention.
  • a display manufacturing substrate 10 of the present invention is a large-area substrate for manufacturing a plurality of displays, and a base substrate 110 and a plurality of single crystal silicon plates disposed on the base substrate 110 It characterized in that it includes (150).
  • a substrate for manufacturing a display 10 is prepared before turning to form an element unit 250 (refer to FIGS. 4 and 5) of the display.
  • a process of forming a TFT part on which a gate, a source/drain, an electrode, an insulating film, etc. of the display are formed, and an electron/hole injection layer, an electron/hole transport layer, and a light emitting layer are formed.
  • a process of forming a pixel portion, a process of forming an encapsulation portion, and the like may be performed to finally manufacture a display.
  • the base substrate 110 may have a large area so that a plurality of single crystal silicon plates 150 can be disposed.
  • the base substrate 110 may have a rectangular shape so that a plurality of single crystal silicon plates 150 corresponding to a display having a generally rectangular shape may be disposed at intervals. However, it is not limited thereto.
  • Each of the plurality of single crystal silicon plates 150 has the same shape, and a length of one side may be greater than at least several inches.
  • the single crystal silicon plate 150 may have a rectangular shape corresponding to a display of a smartphone and may have a diagonal length of several inches.
  • the single crystal silicon plate 150 may have a rectangular shape corresponding to a display of a TV and may have a diagonal length of several tens of inches.
  • the size of the single crystal silicon plate 150 may be n times the size of the display.
  • a single crystal silicon plate 150 corresponding to n (n is an integer) display size can be used.
  • a single crystal silicon plate 150 corresponding to twice the size of the display may be used to manufacture them.
  • the plurality of single crystal silicon plates 150 may be disposed on the base substrate 110 with the same spacing along the horizontal direction (first direction) and the vertical direction (second direction). At this time, if the distance between the single crystal silicon plates 150 is too far, productivity and uniformity may be lowered in the process of forming the device. If they are too close, the process of separating the individual single crystal silicon plate 150 [or display] after completion of the process Since this may be difficult, it is preferable that the mutual spacing of the single crystal silicon plate 150 is about several tens of ⁇ m to several mm.
  • FIGS. 2 to 5 are schematic diagrams showing a manufacturing process of the substrate 10 for manufacturing a display according to an embodiment of the present invention.
  • a base substrate 110 may be prepared.
  • the base substrate 110 has a rectangular flat plate shape and may have a large area shape for manufacturing a plurality of displays.
  • the base substrate 110 may be made of a material such as glass, polymer, quartz, or ceramic having insulating properties.
  • the base substrate 110 is preferably a large-area glass substrate.
  • the surface of the base substrate 110 may be in a state in which a cleaning process and a surface treatment process have been further performed as necessary.
  • a plurality of single crystal silicon plates 150 may be prepared.
  • the single crystal silicon plate 150 a commercially available single crystal silicon plate may be used, and in particular, the single crystal silicon plate 150 may be manufactured from a single crystal wafer 50 used in a semiconductor process. The single crystal wafer 50 may be cut into a square shape to obtain a plurality of single crystal silicon plates 150.
  • bonding may be performed.
  • placement may be performed while adhering a plurality of single crystal silicon plates 150 on the base substrate 110.
  • a method of adhering the single crystal silicon plate 150 on the base substrate 110 may be performed using a known method without limitation.
  • the single crystal silicon plate 150 may be adhered to the base substrate 110 by pressing or applying heat, and a predetermined bonding means may be used.
  • the interface between the single crystal silicon plate 150 and the base substrate 110 may have a specific group or a specific charge, so that adhesion may be implemented by force such as covalent bonding or van der Waals bonding.
  • an oxidation treatment, a mirror surface treatment, or the like may be performed on one surface of the single crystal silicon plate 150 (a surface in contact with the base substrate 110 ).
  • the element unit 250 may be formed on the single crystal silicon plate 150.
  • the single crystal silicon plate 150 is already a TFT including a gate, a source/drain, an electrode, an insulating film, etc., and/or an element portion such as a pixel portion including an electron/hole injection layer, an electron/hole transport layer, and a light emitting layer. 250 may be formed.
  • the process of forming the device unit 250 may be performed on the single crystal wafer 50 of FIG. 3 using a general semiconductor manufacturing process.
  • a plurality of single crystal silicon plates 150 on which the device unit 250 is formed may be prepared.
  • the display manufacturing substrate 10 Can be completed.
  • the filling part 190 may be formed in the space between the plurality of single crystal silicon plates 150.
  • the filling unit 190 may be made of a material such as polycrystalline silicon, silicon oxide, a polymer, or a metal, which is different from a single crystal silicon material.
  • the filling part 190 may fill a gap between the single crystal silicon plates 150.
  • the degree to which the filling part 190 is filled may correspond to the thickness of the single crystal silicon plate 150. That is, as the filling unit 190 is filled by the thickness of the single crystal silicon plate 150, planarization is performed so that the upper surfaces of the plurality of single crystal silicon plates 150 and the filling unit 190 have a flat surface. Can be done.
  • a device layer 210 may be formed on the single crystal silicon plate 150 and the filling part 190.
  • a portion of the device layer 210 that substantially functions as a device may be formed directly above the single crystal silicon plate 150.
  • the top surfaces of the single crystal silicon plate 150 and the filling part 190 are flattened in step (a) of FIG. 5, it is easy to form the device layer 210 on the top, and since there is no step, the device layer There is an advantage in that uniformity between layers can be secured in the formation process.
  • the filling portion 190 and a portion of the device layer 210 (dummy device layer) directly above the filling portion 190 may be removed. Accordingly, it is possible to obtain a plurality of single crystal silicon plates 150 in which the device unit 250 is formed on the base substrate 110.
  • the substrate 10 for manufacturing a display of the present invention uses the single crystal silicon plate 150 as a basis for forming the element unit 250 such as a TFT and a pixel unit, thus limiting the limitations of a TFT based on polycrystalline silicon or a crystallized polycrystalline silicon thin film. All can be overcome. That is, since it is a single crystal material, defects due to crystal are eliminated, high mobility can be secured, and uniformity between pixels is increased. Accordingly, it is possible to implement an ultra-high-definition display exceeding 800 PPI (pixel per inch).
  • a plurality of displays can be manufactured by a large-area display process, so that the manufacturing quality of the plurality of displays is uniform and productivity is remarkably increased. , It has the advantage of using the existing production equipment as it is.

Abstract

The present invention relates to a substrate for use in manufacturing a display and a manufacturing method therefor. The substrate for use in manufacturing a display according to an embodiment of the present invention is a large-area substrate used to manufacture a plurality of displays, and comprises: a base substrate; and a plurality of single-crystal silicon plates disposed on the base substrate.

Description

디스플레이 제조용 기판 및 이의 제조 방법Display manufacturing substrate and manufacturing method thereof
본 발명은 디스플레이 제조용 기판 및 이의 제조 방법에 관한 것이다. 보다 상세하게는, 다결정 실리콘을 기반으로 하는 디스플레이의 한계를 극복하고, 구조를 단순화하며 생산성을 향상시킬 수 있는 디스플레이 제조용 기판 및 이의 제조 방법에 관한 것이다.The present invention relates to a substrate for manufacturing a display and a method for manufacturing the same. More specifically, it relates to a substrate for manufacturing a display and a method of manufacturing the same, which can overcome the limitations of a display based on polycrystalline silicon, simplify a structure, and improve productivity.
일반적으로, 디스플레이의 TFT를 제조할 때 대면적 공정의 편의성, 생산원가 등을 고려하여 다결정 실리콘을 기반으로 소자를 형성하게 된다. 디스플레이를 제조할 대면적의 글래스 기판 상에 다결정 실리콘을 증착으로 형성한다. 그리고, TFT 등의 소자를 형성하기 위해 다결정 실리콘을 레이저, 열 인가 등의 방법을 통해 결정화하여 사용하게 된다.In general, when manufacturing a TFT of a display, a device is formed based on polycrystalline silicon in consideration of the convenience of a large area process and production cost. Polycrystalline silicon is deposited on a large-area glass substrate to manufacture a display. Further, in order to form devices such as TFTs, polycrystalline silicon is crystallized and used through a method such as laser or heat application.
하지만, 다결정 실리콘은 결정립계(grain boundary)를 비롯한 결함을 가지고, 결정의 크기가 불균일 하기 때문에 결정화를 수행한 후라고 하더라도, 불균일성에 의한 디스플레이의 성능 제한이 발생하기 마련이다. 단결정 실리콘에 비해 모빌리티(mobility)가 낮고, 화소간에 균일성이 낮아지는 문제가 발생할 수 있다. 이에 따라, 800 PPI(pixel per inch)를 넘는 초고화질의 디스플레이를 구현하기에는 한계가 있다. 또한, 화소간의 균일성을 향상시키기 위해 복수개의 트랜지스터를 포함하는 보상회로, 캐패시터 등을 TFT에 더 구비할 수 있지만, 이는 공정원가의 상승으로 이어지는 문제점이 있다.However, since polycrystalline silicon has defects including grain boundaries, and the crystal size is non-uniform, even after crystallization is performed, the performance of the display is limited due to non-uniformity. Compared to single crystal silicon, mobility may be lower and uniformity between pixels may be lowered. Accordingly, there is a limit to implementing an ultra-high quality display exceeding 800 PPI (pixel per inch). In addition, in order to improve uniformity between pixels, a compensation circuit including a plurality of transistors, capacitors, etc. may be further provided in the TFT, but this has a problem that leads to an increase in process cost.
따라서, 단결정 실리콘을 이용하여 대면적의 글래스 기판 상에서 디스플레이의 제조 공정을 수행할 수 있는 방안이 필요한 실정이다.Accordingly, there is a need for a method capable of performing a display manufacturing process on a large-area glass substrate using single crystal silicon.
따라서, 본 발명은 상기와 같은 종래 기술의 제반 문제점을 해결하기 위하여 안출된 것으로서, 단결정 실리콘을 이용하여 대면적의 기판 상에서 디스플레이의 제조 공정을 수행할 수 있는 디스플레이 제조용 기판 및 이의 제조 방법을 제공하는 것을 그 목적으로 한다.Accordingly, the present invention has been devised to solve the problems of the prior art as described above, and provides a display manufacturing substrate capable of performing a display manufacturing process on a large area substrate using single crystal silicon and a manufacturing method thereof. For that purpose.
또한, 본 발명은 다결정 실리콘을 기반으로 하는 디스플레이의 한계를 극복하고, 디스플레이의 초고화질을 구현하며, 구조를 단순화하고 생산성을 향상시킬 수 있는 디스플레이 제조용 기판 및 이의 제조 방법을 제공하는 것을 그 목적으로 한다.In addition, the present invention is to overcome the limitations of a display based on polycrystalline silicon, to implement the ultra-high quality of the display, to provide a display manufacturing substrate and a manufacturing method that can simplify the structure and improve productivity. do.
그러나 이러한 과제는 예시적인 것으로, 이에 의해 본 발명의 범위가 한정되는 것은 아니다.However, these problems are exemplary, and the scope of the present invention is not limited thereby.
본 발명의 상기의 목적은, 복수의 디스플레이를 제조하기 위한 대면적 기판으로서, 베이스 기판; 및 베이스 기판 상에 배치되는 복수의 단결정 실리콘 플레이트를 포함하는, 디스플레이 제조용 기판에 의해 달성된다.The above object of the present invention is a large area substrate for manufacturing a plurality of displays, comprising: a base substrate; And a plurality of single crystal silicon plates disposed on the base substrate.
본 발명의 일 실시예에 따르면, 단결정 실리콘 플레이트는 사각형 형상일 수 있다.According to an embodiment of the present invention, the single crystal silicon plate may have a square shape.
본 발명의 일 실시예에 따르면, 단결정 실리콘 플레이트의 크기는 n개(n은 정수)의 디스플레이 크기에 대응할 수 있다.According to an embodiment of the present invention, the size of a single crystal silicon plate may correspond to n (n is an integer) display size.
본 발명의 일 실시예에 따르면, 복수의 단결정 실리콘 플레이트는 동일한 형상을 가지고, 제1 방향 및 제1 방향에 수직하는 제2 방향을 따라서 동일한 간격을 이루며 베이스 기판 상에 각각 배치될 수 있다.According to an exemplary embodiment of the present invention, a plurality of single crystal silicon plates may have the same shape, and may be disposed on the base substrate with equal intervals along a first direction and a second direction perpendicular to the first direction.
본 발명의 일 실시예에 따르면, 단결정 실리콘 플레이트 상에는 소자부가 형성될 수 있다.According to an embodiment of the present invention, a device portion may be formed on a single crystal silicon plate.
본 발명의 일 실시예에 따르면, 베이스 기판은 글래스, 고분자, 석영, 세라믹 중 적어도 어느 하나의 재질일 수 있다.According to an embodiment of the present invention, the base substrate may be made of at least one of glass, polymer, quartz, and ceramic.
본 발명의 일 실시예에 따르면, 단결정 실리콘 플레이트는 웨이퍼를 절단하여 사용하는 것일 수 있다.According to an embodiment of the present invention, the single crystal silicon plate may be used by cutting a wafer.
그리고, 본 발명의 상기의 목적은, 복수의 디스플레이를 제조하기 위한 대면적 기판의 제조 방법으로서, (a) 베이스 기판을 제공하는 단계; 및 (b) 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계를 포함하는, 디스플레이 제조용 기판의 제조 방법에 의해 달성된다.In addition, the above object of the present invention is a method of manufacturing a large-area substrate for manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; And (b) adhering a plurality of single crystal silicon plates onto the base substrate.
그리고, 본 발명의 상기의 목적은, 복수의 디스플레이를 제조하기 위한 대면적 기판의 제조 방법으로서, (a) 베이스 기판을 제공하는 단계; 및 (b) 소자부가 상부에 형성된 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계를 포함하는, 디스플레이 제조용 기판의 제조 방법에 의해 달성된다.In addition, the above object of the present invention is a method of manufacturing a large-area substrate for manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; And (b) adhering a plurality of single crystal silicon plates formed on the upper portion of the device portion onto the base substrate.
본 발명의 일 실시예에 따르면, (b) 단계 후, 복수의 단결정 실리콘 플레이트의 사이에 충진부를 형성하여, 단결정 실리콘 플레이트 및 충진부의 상면을 평탄화하는 단계를 더 포함할 수 있다.According to an embodiment of the present invention, after step (b), a step of flattening the top surfaces of the single crystal silicon plate and the filling portion by forming a filling portion between the plurality of single crystal silicon plates may be further included.
그리고, 본 발명의 상기의 목적은, 복수의 디스플레이의 제조 방법으로서, (a) 베이스 기판을 제공하는 단계; (b) 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계; 및 (c) 복수의 단결정 실리콘 플레이트 상에 각각 소자부를 형성하는 단계를 포함하는, 디스플레이 제조 방법에 의해 달성된다.In addition, the above object of the present invention is a method of manufacturing a plurality of displays, comprising the steps of: (a) providing a base substrate; (b) adhering a plurality of single crystal silicon plates on a base substrate; And (c) forming element portions on each of the plurality of single crystal silicon plates, respectively.
상기와 같이 구성된 본 발명에 따르면, 단결정 실리콘을 이용하여 대면적의 기판 상에서 디스플레이의 제조 공정을 수행할 수 있는 효과가 있다.According to the present invention configured as described above, there is an effect of performing a display manufacturing process on a substrate having a large area using single crystal silicon.
또한, 본 발명은 다결정 실리콘을 기반으로 하는 디스플레이의 한계를 극복하고, 디스플레이의 초고화질을 구현하며, 구조를 단순화하고 생산성을 향상시킬 수 있는 효과가 있다.In addition, the present invention has an effect of overcoming the limitations of a display based on polycrystalline silicon, realizing ultra-high quality of the display, simplifying a structure, and improving productivity.
물론 이러한 효과에 의해 본 발명의 범위가 한정되는 것은 아니다.Of course, the scope of the present invention is not limited by these effects.
도 1은 본 발명의 일 실시예에 따른 디스플레이 제조용 기판을 나타내는 개략 사시도이다.1 is a schematic perspective view showing a substrate for manufacturing a display according to an embodiment of the present invention.
도 2 내지 도 5는 본 발명의 일 실시예에 따른 디스플레이 제조용 기판의 제조 과정을 나타내는 개략도이다.2 to 5 are schematic diagrams illustrating a manufacturing process of a substrate for manufacturing a display according to an embodiment of the present invention.
<부호의 설명><Explanation of code>
10: 디스플레이 제조용 기판10: Display manufacturing substrate
110: 베이스 기판110: base substrate
150: 단결정 실리콘 플레이트150: single crystal silicon plate
190: 충진부190: filling part
210: 소자층210: element layer
250: 소자부250: element unit
후술하는 본 발명에 대한 상세한 설명은, 본 발명이 실시될 수 있는 특정 실시예를 예시로서 도시하는 첨부 도면을 참조한다. 이들 실시예는 당업자가 본 발명을 실시할 수 있기에 충분하도록 상세히 설명된다. 본 발명의 다양한 실시예는 서로 다르지만 상호 배타적일 필요는 없음이 이해되어야 한다. 예를 들어, 여기에 기재되어 있는 특정 형상, 구조 및 특성은 일 실시예에 관련하여 본 발명의 정신 및 범위를 벗어나지 않으면서 다른 실시예로 구현될 수 있다. 또한, 각각의 개시된 실시예 내의 개별 구성요소의 위치 또는 배치는 본 발명의 정신 및 범위를 벗어나지 않으면서 변경될 수 있음이 이해되어야 한다. 따라서, 후술하는 상세한 설명은 한정적인 의미로서 취하려는 것이 아니며, 본 발명의 범위는, 적절하게 설명된다면, 그 청구항들이 주장하는 것과 균등한 모든 범위와 더불어 첨부된 청구항에 의해서만 한정된다. 도면에서 유사한 참조부호는 여러 측면에 걸쳐서 동일하거나 유사한 기능을 지칭하며, 길이 및 면적, 두께 등과 그 형태는 편의를 위하여 과장되어 표현될 수도 있다.DETAILED DESCRIPTION OF THE INVENTION The detailed description of the present invention to be described later refers to the accompanying drawings, which illustrate specific embodiments in which the present invention may be practiced. These embodiments are described in detail sufficient to enable a person skilled in the art to practice the present invention. It is to be understood that the various embodiments of the present invention are different from each other, but need not be mutually exclusive. For example, specific shapes, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the present invention in relation to one embodiment. In addition, it is to be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the present invention. Accordingly, the detailed description to be described below is not intended to be taken in a limiting sense, and the scope of the present invention, if appropriately described, is limited only by the appended claims, along with all scopes equivalent to those claimed by the claims. In the drawings, similar reference numerals refer to the same or similar functions over several aspects, and the length, area, thickness, and the like may be exaggerated and expressed for convenience.
이하에서는, 본 발명이 속하는 기술분야에서 통상의 지식을 가진 자가 본 발명을 용이하게 실시할 수 있도록 하기 위하여, 본 발명의 바람직한 실시예들에 관하여 첨부된 도면을 참조하여 상세히 설명하기로 한다.Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to enable those of ordinary skill in the art to easily implement the present invention.
본 명세서에서 디스플레이라 함은 스마트폰, 태블릿, TV 등의 사용자에게 시각적 정보를 제공하는 일련의 디스플레이 패널을 의미하는 것으로 이해될 수 있다. 또한, 디스플레이 제조용 기판(10)은 도면의 도시 형태에 제한되는 것은 아니며, 디스플레이의 크기, 형상 등에 따라서 베이스 기판(110)과 단결정 실리콘 플레이트(150)의 크기, 형상 등이 변경될 수 있음을 밝혀둔다.In the present specification, a display may be understood to mean a series of display panels that provide visual information to a user such as a smartphone, tablet, or TV. In addition, it was found that the display manufacturing substrate 10 is not limited to the form shown in the drawing, and the size and shape of the base substrate 110 and the single crystal silicon plate 150 may be changed according to the size and shape of the display. Put.
도 1은 본 발명의 일 실시예에 따른 디스플레이 제조용 기판(10)을 나타내는 개략 사시도이다. 1 is a schematic perspective view showing a substrate 10 for manufacturing a display according to an embodiment of the present invention.
도 1을 참조하면, 본 발명의 디스플레이 제조용 기판(10)은, 복수의 디스플레이를 제조하기 위한 대면적 기판으로서, 베이스 기판(110), 및 베이스 기판(110) 상에 배치되는 복수의 단결정 실리콘 플레이트(150)를 포함하는 것을 특징으로 한다.Referring to FIG. 1, a display manufacturing substrate 10 of the present invention is a large-area substrate for manufacturing a plurality of displays, and a base substrate 110 and a plurality of single crystal silicon plates disposed on the base substrate 110 It characterized in that it includes (150).
도 1을 참조하면, 디스플레이 제조용 기판(10)은 디스플레이의 소자부(250)[도 4, 도 5 참조]를 형성하기 공전 전에 준비하는 형태이다. 다시 말해, 디스플레이 제조용 기판(10)을 준비한 후에, 디스플레이의 게이트, 소스/드레인, 전극, 절연막 등이 형성된 TFT부를 형성하는 공정, 및, 전자/정공 주입층, 전자/정공 수송층, 발광층 등이 형성된 화소부를 형성하는 공정, 봉지부를 형성하는 공정 등이 수행되어 최종적으로 디스플레이가 제조될 수 있다.Referring to FIG. 1, a substrate for manufacturing a display 10 is prepared before turning to form an element unit 250 (refer to FIGS. 4 and 5) of the display. In other words, after preparing the display manufacturing substrate 10, a process of forming a TFT part on which a gate, a source/drain, an electrode, an insulating film, etc. of the display are formed, and an electron/hole injection layer, an electron/hole transport layer, and a light emitting layer are formed. A process of forming a pixel portion, a process of forming an encapsulation portion, and the like may be performed to finally manufacture a display.
베이스 기판(110)은 복수의 단결정 실리콘 플레이트(150)가 배치될 수 있도록 대면적일 수 있다. 또한, 일반적으로 사각형 형상인 디스플레이에 대응하는 복수의 단결정 실리콘 플레이트(150)들이 간격을 이루어 복수 배치될 수 있도록, 베이스 기판(110)은 사각형 형상일 수 있다. 다만, 이에 제한되는 것은 아니다.The base substrate 110 may have a large area so that a plurality of single crystal silicon plates 150 can be disposed. In addition, the base substrate 110 may have a rectangular shape so that a plurality of single crystal silicon plates 150 corresponding to a display having a generally rectangular shape may be disposed at intervals. However, it is not limited thereto.
복수의 단결정 실리콘 플레이트(150)들은 각각 동일한 형상을 가지고, 일 변의 길이는 적어도 수 inch보다 클 수 있다. 예를 들어, 단결정 실리콘 플레이트(150)는 스마트폰의 디스플레이에 대응하는 사각형 형상으로 대각선 길이가 수 inch의 크기를 가질 수 있다. 또 다른 예로, 단결정 실리콘 플레이트(150)는 TV의 디스플레이에 대응하는 사각형 형상으로 대각선 길이가 수십 inch의 크기를 가질 수 있다.Each of the plurality of single crystal silicon plates 150 has the same shape, and a length of one side may be greater than at least several inches. For example, the single crystal silicon plate 150 may have a rectangular shape corresponding to a display of a smartphone and may have a diagonal length of several inches. As another example, the single crystal silicon plate 150 may have a rectangular shape corresponding to a display of a TV and may have a diagonal length of several tens of inches.
또는, 단결정 실리콘 플레이트(150)의 크기는 디스플레이 크기의 n배일 수 있다. 최근에 듀얼디스플레이, 폴더블디스플레이와 같이 복수의 화면을 가지는 디스플레이 장치가 나타남에 따라, n개(n은 정수)의 디스플레이 크기에 대응하는 단결정 실리콘 플레이트(150)를 사용할 수 있다. 예를 들어, 한번 접히는 폴더블디스플레이는 2개의 디스플레이를 가지므로, 이를 제조하기 위해서는 디스플레이의 2배 크기에 대응하는 단결정 실리콘 플레이트(150)를 사용할 수 있다.Alternatively, the size of the single crystal silicon plate 150 may be n times the size of the display. Recently, as a display device having a plurality of screens such as a dual display and a foldable display appears, a single crystal silicon plate 150 corresponding to n (n is an integer) display size can be used. For example, since a foldable display that is folded once has two displays, a single crystal silicon plate 150 corresponding to twice the size of the display may be used to manufacture them.
복수의 단결정 실리콘 플레이트(150)들은 가로 방향(제1 방향) 및 세로 방향(제2 방향)을 따라서 동일한 간격을 이루며 베이스 기판(110) 상에 배치될 수 있다. 이때, 단결정 실리콘 플레이트(150)의 상호 간격이 너무 멀면 소자의 형성 과정에서 생산성과 균일성이 낮아질 수 있고, 너무 가까우면 공정 완료후 개별 단결정 실리콘 플레이트(150)[또는, 디스플레이]를 분리하는 공정이 어려울 수 있으므로, 단결정 실리콘 플레이트(150)의 상호 간격은 수십㎛ 내지 수mm 정도인 것이 바람직하다.The plurality of single crystal silicon plates 150 may be disposed on the base substrate 110 with the same spacing along the horizontal direction (first direction) and the vertical direction (second direction). At this time, if the distance between the single crystal silicon plates 150 is too far, productivity and uniformity may be lowered in the process of forming the device. If they are too close, the process of separating the individual single crystal silicon plate 150 [or display] after completion of the process Since this may be difficult, it is preferable that the mutual spacing of the single crystal silicon plate 150 is about several tens of µm to several mm.
도 2 내지 도 5는 본 발명의 일 실시예에 따른 디스플레이 제조용 기판(10)의 제조 과정을 나타내는 개략도이다.2 to 5 are schematic diagrams showing a manufacturing process of the substrate 10 for manufacturing a display according to an embodiment of the present invention.
먼저, 도 2를 참조하면, 베이스 기판(110)을 준비할 수 있다. 베이스 기판(110)은 사각 평판 형상이고, 복수의 디스플레이 제조를 위해 대면적 형상일 수 있다. 베이스 기판(110)은 절연 특성을 가지는 글래스, 고분자, 석영, 세라믹 등의 재질일 수 있고, 특히, 베이스 기판(110)은 대면적 글래스 기판인 것이 바람직하다. 베이스 기판(110)의 표면은 필요에 따라, 세정 공정, 표면 처리 공정이 더 수행된 상태일 수 있다.First, referring to FIG. 2, a base substrate 110 may be prepared. The base substrate 110 has a rectangular flat plate shape and may have a large area shape for manufacturing a plurality of displays. The base substrate 110 may be made of a material such as glass, polymer, quartz, or ceramic having insulating properties. In particular, the base substrate 110 is preferably a large-area glass substrate. The surface of the base substrate 110 may be in a state in which a cleaning process and a surface treatment process have been further performed as necessary.
다음으로, 도 3을 참조하면, 복수의 단결정 실리콘 플레이트(150)를 준비할 수 있다. 단결정 실리콘 플레이트(150)는 시중에 판매하는 단결정 실리콘 플레이트를 사용할 수 있으며, 특히, 반도체 공정에 사용되는 단결정 웨이퍼(wafer; 50)로부터 단결정 실리콘 플레이트(150)를 제조할 수 있다. 단결정 웨이퍼(50)를 사각형 형상으로 절단하여 복수의 단결정 실리콘 플레이트(150)를 획득할 수 있다.Next, referring to FIG. 3, a plurality of single crystal silicon plates 150 may be prepared. As the single crystal silicon plate 150, a commercially available single crystal silicon plate may be used, and in particular, the single crystal silicon plate 150 may be manufactured from a single crystal wafer 50 used in a semiconductor process. The single crystal wafer 50 may be cut into a square shape to obtain a plurality of single crystal silicon plates 150.
다음으로, 도 4의 (a)를 참조하면, 베이스 기판(110) 상에 복수의 단결정 실리콘 플레이트(150)를 배치한 후에 접착을 수행할 수 있다. 또는, 베이스 기판(110) 상에 복수의 단결정 실리콘 플레이트(150)를 접착하면서 배치를 수행할 수도 있다.Next, referring to FIG. 4A, after disposing a plurality of single crystal silicon plates 150 on the base substrate 110, bonding may be performed. Alternatively, placement may be performed while adhering a plurality of single crystal silicon plates 150 on the base substrate 110.
단결정 실리콘 플레이트(150)를 베이스 기판(110) 상에 접착하는 방법은 공지의 방법을 제한없이 사용할 수 있다. 예를 들어, 단결정 실리콘 플레이트(150)를 압착하는 방법이나, 열을 인가하는 방법으로 베이스 기판(110) 상에 접착할 수 있으며, 소정의 접착 수단을 사용할 수도 있다. 단결정 실리콘 플레이트(150)와 베이스 기판(110)의 계면이 특정 기나 특정 전하를 가지도록 하여 공유 결합, 반데르발스 결합 등의 힘으로 접착을 구현할 수도 있다. 베이스 기판(110)과 접착을 위해 단결정 실리콘 플레이트(150)의 일면[베이스 기판(110)과 맞닿는 면]에 산화 처리, 경면 처리 등이 수행될 수도 있다.A method of adhering the single crystal silicon plate 150 on the base substrate 110 may be performed using a known method without limitation. For example, the single crystal silicon plate 150 may be adhered to the base substrate 110 by pressing or applying heat, and a predetermined bonding means may be used. The interface between the single crystal silicon plate 150 and the base substrate 110 may have a specific group or a specific charge, so that adhesion may be implemented by force such as covalent bonding or van der Waals bonding. To adhere to the base substrate 110, an oxidation treatment, a mirror surface treatment, or the like may be performed on one surface of the single crystal silicon plate 150 (a surface in contact with the base substrate 110 ).
한편, 도 4의 (b)와 같이, 단결정 실리콘 플레이트(150) 상에는 소자부(250)가 형성된 상태일 수 있다. 단결정 실리콘 플레이트(150)는 이미, 게이트, 소스/드레인, 전극, 절연막 등을 포함하는 TFT, 및/또는, 전자/정공 주입층, 전자/정공 수송층, 발광층 등을 포함하는 화소부 등의 소자부(250)가 형성된 상태일 수 있다. 이러한 소자부(250)의 형성 공정은 도 3의 단결정 웨이퍼(50) 상에서 일반적인 반도체 제조 공정을 이용하여 수행될 수 있다. 그리고, 각 셀마다 소자부가 형성된 단결정 웨이퍼(50)를 절단하여, 소자부(250)가 상부에 형성된 복수의 단결정 실리콘 플레이트(150)를 준비할 수 있다.Meanwhile, as shown in (b) of FIG. 4, the element unit 250 may be formed on the single crystal silicon plate 150. The single crystal silicon plate 150 is already a TFT including a gate, a source/drain, an electrode, an insulating film, etc., and/or an element portion such as a pixel portion including an electron/hole injection layer, an electron/hole transport layer, and a light emitting layer. 250 may be formed. The process of forming the device unit 250 may be performed on the single crystal wafer 50 of FIG. 3 using a general semiconductor manufacturing process. In addition, by cutting the single crystal wafer 50 on which the device unit is formed for each cell, a plurality of single crystal silicon plates 150 on which the device unit 250 is formed may be prepared.
도 4와 같이, 복수의 단결정 실리콘 플레이트(150), 또는, 소자부(250)가 상부에 형성된 복수의 단결정 실리콘 플레이트(150)를 베이스 기판(110)에 접착함에 따라, 디스플레이 제조용 기판(10)의 제조를 완료할 수 있다.As shown in FIG. 4, as a plurality of single crystal silicon plates 150 or a plurality of single crystal silicon plates 150 having an element unit 250 formed thereon are adhered to the base substrate 110, the display manufacturing substrate 10 Can be completed.
한편, 도 5의 (a)를 참조하면, 도 4의 (a) 단계 이후에, 복수의 단결정 실리콘 플레이트(150)들 사이 공간에 충진부(190)를 형성할 수 있다. 충진부(190)는 단결정 실리콘 재질과는 구분되는, 다결정 실리콘, 실리콘 산화물, 고분자, 금속 등의 재질을 사용할 수 있다. 충진부(190)는 단결정 실리콘 플레이트(150)들 사이 틈을 채울 수 있다. 충진부(190)가 채워지는 정도는 단결정 실리콘 플레이트(150)의 두께에 대응할 수 있다. 즉, 충진부(190)는 단결정 실리콘 플레이트(150)의 두께만큼 채워짐에 따라, 복수의 단결정 실리콘 플레이트(150)와 충진부(190)의 상부면이 평탄한 면을 가질 수 있도록 평탄화(planarization)가 수행될 수 있다.Meanwhile, referring to FIG. 5A, after the step (a) of FIG. 4, the filling part 190 may be formed in the space between the plurality of single crystal silicon plates 150. The filling unit 190 may be made of a material such as polycrystalline silicon, silicon oxide, a polymer, or a metal, which is different from a single crystal silicon material. The filling part 190 may fill a gap between the single crystal silicon plates 150. The degree to which the filling part 190 is filled may correspond to the thickness of the single crystal silicon plate 150. That is, as the filling unit 190 is filled by the thickness of the single crystal silicon plate 150, planarization is performed so that the upper surfaces of the plurality of single crystal silicon plates 150 and the filling unit 190 have a flat surface. Can be done.
이어서, 도 5의 (b)를 참조하면, 단결정 실리콘 플레이트(150) 및 충진부(190) 상에 소자층(210)을 형성할 수 있다. 소자층(210)에서 실질적으로 소자로서 기능하는 부분은 단결정 실리콘 플레이트(150) 직상부에 형성될 수 있다. 다만, 도 5의 (a) 단계에서 단결정 실리콘 플레이트(150) 및 충진부(190)의 상면이 평탄화된 상태이므로, 상부에 소자층(210)을 형성하기 용이하고, 단차가 없는 상태이므로 소자층 형성 공정에서 층간 균일도를 확보할 수 있는 이점이 있다.Subsequently, referring to FIG. 5B, a device layer 210 may be formed on the single crystal silicon plate 150 and the filling part 190. A portion of the device layer 210 that substantially functions as a device may be formed directly above the single crystal silicon plate 150. However, since the top surfaces of the single crystal silicon plate 150 and the filling part 190 are flattened in step (a) of FIG. 5, it is easy to form the device layer 210 on the top, and since there is no step, the device layer There is an advantage in that uniformity between layers can be secured in the formation process.
이어서, 도 5의 (c)를 참조하면, 충진부(190) 및 충진부(190) 직상부의 소자층(210) 부분[더미 소자층]을 제거할 수 있다. 이에 따라, 베이스 기판(110) 상에서 상부에 소자부(250)가 형성된 복수의 단결정 실리콘 플레이트(150)를 획득할 수 있다.Subsequently, referring to (c) of FIG. 5, the filling portion 190 and a portion of the device layer 210 (dummy device layer) directly above the filling portion 190 may be removed. Accordingly, it is possible to obtain a plurality of single crystal silicon plates 150 in which the device unit 250 is formed on the base substrate 110.
본 발명의 디스플레이 제조용 기판(10)은 단결정 실리콘 플레이트(150)를 TFT, 화소부 등의 소자부(250)를 형성하는 기반으로 사용하므로, 다결정 실리콘 또는 결정화된 다결정 실리콘 박막에 기반한 TFT의 한계를 모두 극복할 수 있다. 즉, 단결정 재질이므로 결정에 의한 결함이 없어지고, 높은 모빌리티를 확보할 수 있으며, 화소간에 균일성이 높아지는 효과가 있다. 이에 따라, 800 PPI(pixel per inch)를 넘는 초고화질의 디스플레이를 구현할 수 있게 된다.The substrate 10 for manufacturing a display of the present invention uses the single crystal silicon plate 150 as a basis for forming the element unit 250 such as a TFT and a pixel unit, thus limiting the limitations of a TFT based on polycrystalline silicon or a crystallized polycrystalline silicon thin film. All can be overcome. That is, since it is a single crystal material, defects due to crystal are eliminated, high mobility can be secured, and uniformity between pixels is increased. Accordingly, it is possible to implement an ultra-high-definition display exceeding 800 PPI (pixel per inch).
또한, TFT 등의 불균일을 극복하기 위한 픽셀마다의 보상회로, 캐패시터 등을 간소화하거나 제거할 수 있으며, 높은 모빌리티로 인해 TFT 외부에 설치하는 구동회로를 내장할 수 있다. 이에 따라, 구조를 단순화 할 수 있고 생산 원가를 절감할 수 있는 효과가 있다.In addition, it is possible to simplify or eliminate a compensation circuit for each pixel, a capacitor, etc. for overcoming unevenness of a TFT, etc., and a driving circuit installed outside the TFT can be incorporated due to high mobility. Accordingly, there is an effect that the structure can be simplified and the production cost can be reduced.
또한, 대면적 베이스 기판(110)에 복수의 단결정 실리콘 플레이트(150)를 배치하여, 대면적 디스플레이 공정으로 복수의 디스플레이를 제조할 수 있으므로, 복수의 디스플레이의 제조 품질이 균일하고, 생산성이 현저히 높아지며, 기존의 생산설비를 그대로 활용할 수 있는 이점을 갖는다.In addition, by disposing a plurality of single crystal silicon plates 150 on the large-area base substrate 110, a plurality of displays can be manufactured by a large-area display process, so that the manufacturing quality of the plurality of displays is uniform and productivity is remarkably increased. , It has the advantage of using the existing production equipment as it is.
본 발명은 상술한 바와 같이 바람직한 실시예를 들어 도시하고 설명하였으나, 상기 실시예에 한정되지 아니하며 본 발명의 정신을 벗어나지 않는 범위 내에서 당해 발명이 속하는 기술분야에서 통상의 지식을 가진 자에 의해 다양한 변형과 변경이 가능하다. 그러한 변형예 및 변경예는 본 발명과 첨부된 특허청구범위의 범위 내에 속하는 것으로 보아야 한다.Although the present invention has been shown and described with reference to a preferred embodiment as described above, it is not limited to the above embodiment, and within the scope not departing from the spirit of the present invention, various It can be transformed and changed. Such modifications and variations should be viewed as falling within the scope of the present invention and the appended claims.

Claims (11)

  1. 복수의 디스플레이를 제조하기 위한 대면적 기판으로서,As a large area substrate for manufacturing a plurality of displays,
    베이스 기판; 및A base substrate; And
    베이스 기판 상에 배치되는 복수의 단결정 실리콘 플레이트A plurality of single crystal silicon plates disposed on the base substrate
    를 포함하는, 디스플레이 제조용 기판.Containing, a substrate for manufacturing a display.
  2. 제1항에 있어서,The method of claim 1,
    단결정 실리콘 플레이트는 사각형 형상인, 디스플레이 제조용 기판.The single crystal silicon plate has a rectangular shape, and is a substrate for manufacturing a display.
  3. 제1항에 있어서,The method of claim 1,
    단결정 실리콘 플레이트의 크기는 n개(n은 정수)의 디스플레이 크기에 대응하는, 디스플레이 제조용 기판.The size of the single crystal silicon plate corresponds to a display size of n (n is an integer), a substrate for display manufacturing.
  4. 제1항에 있어서,The method of claim 1,
    복수의 단결정 실리콘 플레이트는 동일한 형상을 가지고,A plurality of single crystal silicon plates have the same shape,
    제1 방향 및 제1 방향에 수직하는 제2 방향을 따라서 동일한 간격을 이루며 베이스 기판 상에 각각 배치되는, 디스플레이 제조용 기판.A substrate for manufacturing a display, which is disposed on the base substrate with equal intervals along a first direction and a second direction perpendicular to the first direction.
  5. 제1항에 있어서,The method of claim 1,
    단결정 실리콘 플레이트 상에는 소자부가 형성된, 디스플레이 제조용 기판.A substrate for manufacturing a display in which an element portion is formed on a single crystal silicon plate.
  6. 제1항에 있어서,The method of claim 1,
    베이스 기판은 글래스, 고분자, 석영, 세라믹 중 적어도 어느 하나의 재질인, 디스플레이 제조용 기판.The base substrate is a substrate for manufacturing a display made of at least one of glass, polymer, quartz, and ceramic.
  7. 제1항에 있어서,The method of claim 1,
    단결정 실리콘 플레이트는 웨이퍼를 절단하여 사용하는 것인, 디스플레이 제조용 기판.The single crystal silicon plate is used by cutting a wafer.
  8. 복수의 디스플레이를 제조하기 위한 대면적 기판의 제조 방법으로서,As a manufacturing method of a large-area substrate for manufacturing a plurality of displays,
    (a) 베이스 기판을 제공하는 단계; 및(a) providing a base substrate; And
    (b) 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계;(b) adhering a plurality of single crystal silicon plates on a base substrate;
    를 포함하는, 디스플레이 제조용 기판의 제조 방법.Containing, a method of manufacturing a substrate for manufacturing a display.
  9. 복수의 디스플레이를 제조하기 위한 대면적 기판의 제조 방법으로서,As a manufacturing method of a large-area substrate for manufacturing a plurality of displays,
    (a) 베이스 기판을 제공하는 단계; 및(a) providing a base substrate; And
    (b) 소자부가 상부에 형성된 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계;(b) adhering a plurality of single crystal silicon plates formed on the device portion on the base substrate;
    를 포함하는, 디스플레이 제조용 기판의 제조 방법.Containing, a method of manufacturing a substrate for manufacturing a display.
  10. 제8항에 있어서,The method of claim 8,
    (b) 단계 후, 복수의 단결정 실리콘 플레이트의 사이에 충진부를 형성하여, 단결정 실리콘 플레이트 및 충진부의 상면을 평탄화하는 단계를 더 포함하는, 디스플레이 제조용 기판의 제조 방법.After step (b), by forming a filling portion between the plurality of single crystal silicon plate, the method of manufacturing a substrate for manufacturing a display further comprising the step of planarizing the top surface of the single crystal silicon plate and the filling portion.
  11. 복수의 디스플레이의 제조 방법으로서,As a method of manufacturing a plurality of displays,
    (a) 베이스 기판을 제공하는 단계;(a) providing a base substrate;
    (b) 복수의 단결정 실리콘 플레이트를 베이스 기판 상에 접착하는 단계; 및(b) adhering a plurality of single crystal silicon plates on a base substrate; And
    (c) 복수의 단결정 실리콘 플레이트 상에 각각 소자부를 형성하는 단계;(c) forming element portions on each of the plurality of single crystal silicon plates;
    를 포함하는, 디스플레이 제조 방법.Containing, display manufacturing method.
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