JP2004153091A5 - - Google Patents

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Publication number
JP2004153091A5
JP2004153091A5 JP2002317758A JP2002317758A JP2004153091A5 JP 2004153091 A5 JP2004153091 A5 JP 2004153091A5 JP 2002317758 A JP2002317758 A JP 2002317758A JP 2002317758 A JP2002317758 A JP 2002317758A JP 2004153091 A5 JP2004153091 A5 JP 2004153091A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002317758A
Other versions
JP4121356B2 (ja
JP2004153091A (ja
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Publication date
Application filed filed Critical
Priority claimed from JP2002317758A external-priority patent/JP4121356B2/ja
Priority to JP2002317758A priority Critical patent/JP4121356B2/ja
Priority to CNB2003101023591A priority patent/CN1280903C/zh
Priority to TW092130084A priority patent/TWI229443B/zh
Priority to KR1020030076174A priority patent/KR101057243B1/ko
Priority to US10/696,038 priority patent/US6909189B2/en
Publication of JP2004153091A publication Critical patent/JP2004153091A/ja
Publication of JP2004153091A5 publication Critical patent/JP2004153091A5/ja
Publication of JP4121356B2 publication Critical patent/JP4121356B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2002317758A 2002-10-31 2002-10-31 半導体装置 Expired - Fee Related JP4121356B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2002317758A JP4121356B2 (ja) 2002-10-31 2002-10-31 半導体装置
CNB2003101023591A CN1280903C (zh) 2002-10-31 2003-10-27 具有伪结构的半导体器件
TW092130084A TWI229443B (en) 2002-10-31 2003-10-29 Semiconductor device with dummy structure
US10/696,038 US6909189B2 (en) 2002-10-31 2003-10-30 Semiconductor device with dummy structure
KR1020030076174A KR101057243B1 (ko) 2002-10-31 2003-10-30 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002317758A JP4121356B2 (ja) 2002-10-31 2002-10-31 半導体装置

Publications (3)

Publication Number Publication Date
JP2004153091A JP2004153091A (ja) 2004-05-27
JP2004153091A5 true JP2004153091A5 (ja) 2005-11-04
JP4121356B2 JP4121356B2 (ja) 2008-07-23

Family

ID=32211735

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002317758A Expired - Fee Related JP4121356B2 (ja) 2002-10-31 2002-10-31 半導体装置

Country Status (5)

Country Link
US (1) US6909189B2 (ja)
JP (1) JP4121356B2 (ja)
KR (1) KR101057243B1 (ja)
CN (1) CN1280903C (ja)
TW (1) TWI229443B (ja)

Families Citing this family (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3790469B2 (ja) * 2001-12-21 2006-06-28 富士通株式会社 半導体装置
TWI228226B (en) * 2003-11-21 2005-02-21 Taiwan Semiconductor Mfg Dummy pattern layout method for improving film planarization
JP2006134939A (ja) 2004-11-02 2006-05-25 Nec Electronics Corp 半導体装置
CN104882442B (zh) * 2005-04-26 2018-09-11 瑞萨电子株式会社 半导体装置及其制造方法和半导体制造用掩模、光接近处理方法
KR101158396B1 (ko) * 2005-04-29 2012-06-22 매그나칩 반도체 유한회사 반도체 장치의 제조방법
CN100459053C (zh) * 2006-03-14 2009-02-04 中芯国际集成电路制造(上海)有限公司 半导体器件栅极结构的制造方法
KR100825809B1 (ko) * 2007-02-27 2008-04-29 삼성전자주식회사 스트레인층을 갖는 반도체 소자의 구조 및 그 제조 방법
US7958465B2 (en) * 2008-05-08 2011-06-07 Taiwan Semiconductor Manufacturing Company, Ltd. Dummy pattern design for reducing device performance drift
US9349655B2 (en) 2008-08-29 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Method for mechanical stress enhancement in semiconductor devices
KR101043870B1 (ko) * 2008-12-19 2011-06-22 주식회사 하이닉스반도체 Ｃｍｐ 더미 패턴을 갖는 반도체 소자 및 그 ｃｍｐ 더미 패턴 형성 방법
KR101100934B1 (ko) * 2009-06-02 2012-01-02 주식회사 동부하이텍 반도체소자 및 그 제조방법
US8466560B2 (en) 2010-12-30 2013-06-18 Stmicroelectronics, Inc. Dummy structures having a golden ratio and method for forming the same
US8455354B2 (en) * 2011-04-06 2013-06-04 Taiwan Semiconductor Manufacturing Company, Ltd. Layouts of POLY cut openings overlapping active regions
US12040238B2 (en) * 2013-11-12 2024-07-16 Skyworks Solutions, Inc. Radio-frequency switching devices having improved voltage handling capability
WO2015095394A1 (en) * 2013-12-17 2015-06-25 Texas Instruments Incorporated Elongated contacts using litho-freeze-litho-etch process
US10177032B2 (en) * 2014-06-18 2019-01-08 Taiwan Semiconductor Manufacturing Company, Ltd. Devices, packaging devices, and methods of packaging semiconductor devices
US9831214B2 (en) * 2014-06-18 2017-11-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device packages, packaging methods, and packaged semiconductor devices
US10340357B2 (en) * 2017-09-25 2019-07-02 Taiwan Semiconductor Manufacturing Co., Ltd. Dishing prevention dummy structures for semiconductor devices
US10510685B2 (en) * 2017-09-29 2019-12-17 Taiwan Semiconductor Manufacturing Co., Ltd. Dishing prevention columns for bipolar junction transistors
EP3847698A4 (en) 2019-01-30 2023-07-12 Yangtze Memory Technologies Co., Ltd. HYBRID BONDING USING DUMMY BOND CONTACTS
CN111564424A (zh) * 2019-01-30 2020-08-21 长江存储科技有限责任公司 使用混合键合的结构和器件及其形成方法
US11133272B1 (en) * 2020-04-23 2021-09-28 Qualcomm Incorporated Vertically-aligned and conductive dummies in integrated circuit layers for capacitance reduction and bias independence and methods of manufacture
DE102021107950A1 (de) * 2020-05-28 2021-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Verfahren zum fertigen von halbleiterbauelementen mit unterschiedlichen architekturen und damit gefertigte halbleiterbauelemente

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3247600B2 (ja) 1995-11-30 2002-01-15 株式会社東芝 パターン発生方法
JPH1126576A (ja) 1997-07-01 1999-01-29 Toshiba Corp 半導体装置及びその製造方法
JP2000286263A (ja) * 1999-03-29 2000-10-13 Nec Corp 半導体装置及びその製造方法
JP2001118988A (ja) * 1999-10-15 2001-04-27 Mitsubishi Electric Corp 半導体装置

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