JP2004079606A5 - - Google Patents
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- Publication number
- JP2004079606A5 JP2004079606A5 JP2002234487A JP2002234487A JP2004079606A5 JP 2004079606 A5 JP2004079606 A5 JP 2004079606A5 JP 2002234487 A JP2002234487 A JP 2002234487A JP 2002234487 A JP2002234487 A JP 2002234487A JP 2004079606 A5 JP2004079606 A5 JP 2004079606A5
- Authority
- JP
- Japan
- Prior art keywords
- dielectric constant
- film
- high dielectric
- manufacturing
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002234487A JP2004079606A (ja) | 2002-08-12 | 2002-08-12 | 高誘電率膜を有する半導体装置及びその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002234487A JP2004079606A (ja) | 2002-08-12 | 2002-08-12 | 高誘電率膜を有する半導体装置及びその製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2004079606A JP2004079606A (ja) | 2004-03-11 |
JP2004079606A5 true JP2004079606A5 (zh) | 2005-10-27 |
Family
ID=32019287
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002234487A Pending JP2004079606A (ja) | 2002-08-12 | 2002-08-12 | 高誘電率膜を有する半導体装置及びその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2004079606A (zh) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2006025350A1 (ja) | 2004-08-30 | 2006-03-09 | The University Of Tokyo | 半導体装置及びその製造方法 |
US7518145B2 (en) | 2007-01-25 | 2009-04-14 | International Business Machines Corporation | Integrated multiple gate dielectric composition and thickness semiconductor chip and method of manufacturing the same |
KR101003452B1 (ko) | 2008-12-30 | 2010-12-28 | 한양대학교 산학협력단 | 멀티 비트 강유전체 메모리 소자 및 그 제조방법 |
JP5444176B2 (ja) * | 2010-09-14 | 2014-03-19 | パナソニック株式会社 | 半導体装置 |
JP2014053571A (ja) | 2012-09-10 | 2014-03-20 | Toshiba Corp | 強誘電体メモリ及びその製造方法 |
US11120884B2 (en) | 2015-09-30 | 2021-09-14 | Sunrise Memory Corporation | Implementing logic function and generating analog signals using NOR memory strings |
US11515309B2 (en) | 2019-12-19 | 2022-11-29 | Sunrise Memory Corporation | Process for preparing a channel region of a thin-film transistor in a 3-dimensional thin-film transistor array |
US11675500B2 (en) | 2020-02-07 | 2023-06-13 | Sunrise Memory Corporation | High capacity memory circuit with low effective latency |
TW202310429A (zh) | 2021-07-16 | 2023-03-01 | 美商日升存儲公司 | 薄膜鐵電電晶體的三維記憶體串陣列 |
-
2002
- 2002-08-12 JP JP2002234487A patent/JP2004079606A/ja active Pending
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