JP2003273148A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2003273148A5 JP2003273148A5 JP2002075863A JP2002075863A JP2003273148A5 JP 2003273148 A5 JP2003273148 A5 JP 2003273148A5 JP 2002075863 A JP2002075863 A JP 2002075863A JP 2002075863 A JP2002075863 A JP 2002075863A JP 2003273148 A5 JP2003273148 A5 JP 2003273148A5
- Authority
- JP
- Japan
- Prior art keywords
- bumps
- circuit board
- semiconductor element
- electrodes
- brought
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims description 5
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 3
- 239000010931 gold Substances 0.000 claims description 3
- 229910052737 gold Inorganic materials 0.000 claims description 3
- 238000000034 method Methods 0.000 claims description 2
- 238000006073 displacement reaction Methods 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002075863A JP3746719B2 (ja) | 2002-03-19 | 2002-03-19 | フリップチップ実装方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002075863A JP3746719B2 (ja) | 2002-03-19 | 2002-03-19 | フリップチップ実装方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003273148A JP2003273148A (ja) | 2003-09-26 |
| JP2003273148A5 true JP2003273148A5 (enExample) | 2005-06-02 |
| JP3746719B2 JP3746719B2 (ja) | 2006-02-15 |
Family
ID=29204824
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002075863A Expired - Fee Related JP3746719B2 (ja) | 2002-03-19 | 2002-03-19 | フリップチップ実装方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3746719B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2006318974A (ja) * | 2005-05-10 | 2006-11-24 | Toshiba Components Co Ltd | バンプ構造を用いた半導体素子及びその製造方法 |
| KR102534735B1 (ko) | 2016-09-29 | 2023-05-19 | 삼성전자 주식회사 | 필름형 반도체 패키지 및 그 제조 방법 |
| CN113611785B (zh) | 2018-02-01 | 2022-05-27 | 新唐科技日本株式会社 | 半导体装置 |
| JP7491769B2 (ja) * | 2020-08-04 | 2024-05-28 | 株式会社ジャパンディスプレイ | 回路基板、ｌｅｄモジュール及び表示装置、並びにｌｅｄモジュールの作製方法及び表示装置の作製方法 |
-
2002
- 2002-03-19 JP JP2002075863A patent/JP3746719B2/ja not_active Expired - Fee Related
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR100757345B1 (ko) | 플립 칩 패키지 및 그의 제조 방법 | |
| JP2007267113A5 (enExample) | ||
| JP2008520111A5 (enExample) | ||
| JP2003309223A5 (enExample) | ||
| JP2003086737A5 (enExample) | ||
| JP2006210745A5 (enExample) | ||
| WO2006105015A3 (en) | Flip chip interconnection having narrow interconnection sites on the substrate | |
| TW200610078A (en) | Packaging with metal studs formed on solder pads | |
| JP2009110983A5 (enExample) | ||
| CN107507809B (zh) | 倒装芯片 | |
| JP2004103843A5 (enExample) | ||
| JP2005150647A5 (enExample) | ||
| JP2006013421A5 (enExample) | ||
| JP2004523121A5 (enExample) | ||
| JP2003273148A5 (enExample) | ||
| JP2005286126A5 (enExample) | ||
| JP2009099905A5 (enExample) | ||
| JP4635202B2 (ja) | 両面電極パッケージの製造方法 | |
| JP6909629B2 (ja) | 半導体装置 | |
| TW200504962A (en) | Micromachine package and method for manufacturing the same | |
| CN104851865A (zh) | 覆晶式封装基板、覆晶式封装件及其制法 | |
| JP2004153260A5 (enExample) | ||
| TWI495052B (zh) | 基板結構與使用該基板結構之半導體封裝件 | |
| JP3824545B2 (ja) | 配線基板、それを用いた半導体装置、それらの製造方法 | |
| JP2005093780A (ja) | 半導体装置 |