JP2003142797A - 電子部品実装済完成品の製造方法及び電子部品実装済完成品 - Google Patents

電子部品実装済完成品の製造方法及び電子部品実装済完成品

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Publication number
JP2003142797A
JP2003142797A JP2001337728A JP2001337728A JP2003142797A JP 2003142797 A JP2003142797 A JP 2003142797A JP 2001337728 A JP2001337728 A JP 2001337728A JP 2001337728 A JP2001337728 A JP 2001337728A JP 2003142797 A JP2003142797 A JP 2003142797A
Authority
JP
Japan
Prior art keywords
electronic component
component
circuit pattern
substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001337728A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003142797A5 (enrdf_load_stackoverflow
Inventor
Norito Tsukahara
法人 塚原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001337728A priority Critical patent/JP2003142797A/ja
Priority to US10/285,475 priority patent/US7176055B2/en
Priority to CNB02149813XA priority patent/CN1204610C/zh
Publication of JP2003142797A publication Critical patent/JP2003142797A/ja
Publication of JP2003142797A5 publication Critical patent/JP2003142797A5/ja
Priority to US11/653,304 priority patent/US20070200217A1/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93Batch processes
    • H01L24/95Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
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    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
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    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01ELECTRIC ELEMENTS
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    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76Apparatus for connecting with build-up interconnects
    • H01L2224/7665Means for transporting the components to be connected
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    • H01L2924/1815Shape
    • H01L2924/1816Exposing the passive side of the semiconductor or solid-state body
    • H01L2924/18162Exposing the passive side of the semiconductor or solid-state body of a chip with build-up interconnect
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    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Ceramic Capacitors (AREA)
JP2001337728A 2001-11-02 2001-11-02 電子部品実装済完成品の製造方法及び電子部品実装済完成品 Withdrawn JP2003142797A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001337728A JP2003142797A (ja) 2001-11-02 2001-11-02 電子部品実装済完成品の製造方法及び電子部品実装済完成品
US10/285,475 US7176055B2 (en) 2001-11-02 2002-11-01 Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component
CNB02149813XA CN1204610C (zh) 2001-11-02 2002-11-04 安装电子元件后的零件的制造方法及其制造装置
US11/653,304 US20070200217A1 (en) 2001-11-02 2007-01-16 Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001337728A JP2003142797A (ja) 2001-11-02 2001-11-02 電子部品実装済完成品の製造方法及び電子部品実装済完成品

Publications (2)

Publication Number Publication Date
JP2003142797A true JP2003142797A (ja) 2003-05-16
JP2003142797A5 JP2003142797A5 (enrdf_load_stackoverflow) 2005-06-02

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001337728A Withdrawn JP2003142797A (ja) 2001-11-02 2001-11-02 電子部品実装済完成品の製造方法及び電子部品実装済完成品

Country Status (1)

Country Link
JP (1) JP2003142797A (enrdf_load_stackoverflow)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2864342A1 (fr) * 2003-12-19 2005-06-24 3D Plus Sa Procede d'interconnexion de composants electroniques sans apport de brasure et dispositif electronique obtenu par un tel procede
JP2006344631A (ja) * 2005-06-07 2006-12-21 Murata Mfg Co Ltd 部品内蔵基板
JP2007103466A (ja) * 2005-09-30 2007-04-19 Toshiba Corp 多層プリント配線板、多層プリント配線板の製造方法、電子機器
JP2008211201A (ja) * 2007-02-01 2008-09-11 Ngk Spark Plug Co Ltd 配線基板、半導体パッケージ
JP2008210961A (ja) * 2007-02-26 2008-09-11 Kyocera Corp 電子部品およびその製造方法
WO2008155957A1 (ja) * 2007-06-19 2008-12-24 Murata Manufacturing Co., Ltd. 部品内蔵基板の製造方法および部品内蔵基板
JP2009033185A (ja) * 2008-09-05 2009-02-12 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP2009049046A (ja) * 2007-08-13 2009-03-05 Tdk Corp 電子部品モジュール
JP2010267729A (ja) * 2009-05-13 2010-11-25 Fujikura Ltd 無線回路モジュール
US7875980B2 (en) 2004-09-01 2011-01-25 Sanyo Electric Co., Ltd. Semiconductor device having laminated structure
JP2012015397A (ja) * 2010-07-02 2012-01-19 Dainippon Printing Co Ltd 電子モジュール
WO2014129008A1 (ja) * 2013-02-25 2014-08-28 株式会社村田製作所 モジュールおよび該モジュールを構成するモジュール部品並びにこのモジュールの製造方法

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2864342A1 (fr) * 2003-12-19 2005-06-24 3D Plus Sa Procede d'interconnexion de composants electroniques sans apport de brasure et dispositif electronique obtenu par un tel procede
US7875980B2 (en) 2004-09-01 2011-01-25 Sanyo Electric Co., Ltd. Semiconductor device having laminated structure
JP2006344631A (ja) * 2005-06-07 2006-12-21 Murata Mfg Co Ltd 部品内蔵基板
JP2007103466A (ja) * 2005-09-30 2007-04-19 Toshiba Corp 多層プリント配線板、多層プリント配線板の製造方法、電子機器
JP2008211201A (ja) * 2007-02-01 2008-09-11 Ngk Spark Plug Co Ltd 配線基板、半導体パッケージ
JP2008210961A (ja) * 2007-02-26 2008-09-11 Kyocera Corp 電子部品およびその製造方法
WO2008155957A1 (ja) * 2007-06-19 2008-12-24 Murata Manufacturing Co., Ltd. 部品内蔵基板の製造方法および部品内蔵基板
EP2066161A4 (en) * 2007-06-19 2010-11-17 Murata Manufacturing Co METHOD FOR MANUFACTURING INCORPORATED COMPONENT SUBSTRATE AND THIS SUBSTRATE
JP2009049046A (ja) * 2007-08-13 2009-03-05 Tdk Corp 電子部品モジュール
JP2009033185A (ja) * 2008-09-05 2009-02-12 Sanyo Electric Co Ltd 半導体装置およびその製造方法
JP2010267729A (ja) * 2009-05-13 2010-11-25 Fujikura Ltd 無線回路モジュール
JP2012015397A (ja) * 2010-07-02 2012-01-19 Dainippon Printing Co Ltd 電子モジュール
WO2014129008A1 (ja) * 2013-02-25 2014-08-28 株式会社村田製作所 モジュールおよび該モジュールを構成するモジュール部品並びにこのモジュールの製造方法
US10098229B2 (en) 2013-02-25 2018-10-09 Murata Manufacturing Co., Ltd. Module, module component composing the module, and method of manufacturing the module

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