JP2003142797A - Finished product with electronic component mounted and manufacturing method thereof - Google Patents

Finished product with electronic component mounted and manufacturing method thereof

Info

Publication number
JP2003142797A
JP2003142797A JP2001337728A JP2001337728A JP2003142797A JP 2003142797 A JP2003142797 A JP 2003142797A JP 2001337728 A JP2001337728 A JP 2001337728A JP 2001337728 A JP2001337728 A JP 2001337728A JP 2003142797 A JP2003142797 A JP 2003142797A
Authority
JP
Japan
Prior art keywords
electronic component
component
circuit pattern
substrate
base material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001337728A
Other languages
Japanese (ja)
Other versions
JP2003142797A5 (en
Inventor
Norito Tsukahara
法人 塚原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2001337728A priority Critical patent/JP2003142797A/en
Priority to US10/285,475 priority patent/US7176055B2/en
Priority to CNB02149813XA priority patent/CN1204610C/en
Publication of JP2003142797A publication Critical patent/JP2003142797A/en
Publication of JP2003142797A5 publication Critical patent/JP2003142797A5/ja
Priority to US11/653,304 priority patent/US20070200217A1/en
Withdrawn legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/82—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected by forming build-up interconnects at chip-level, e.g. for high density interconnects [HDI]
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76—Apparatus for connecting with build-up interconnects
    • H01L2224/7665—Means for transporting the components to be connected
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    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Ceramic Capacitors (AREA)
  • Non-Metallic Protective Coatings For Printed Circuits (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a finished product with a thin and small electronic component mounted, and to provide a method therefor. SOLUTION: After first electronic components 101-1 and 15-1 are embedded in a base material 140, a first circuit pattern 115 is formed for the embedded first electronic components to complete a part with electronic component mounted 150. After that, a second electronic component is mounted on the first circuit pattern of the part with electronic component mounted, to complete a finished product with electronic component mounted. By this method, the thickness of a module is reduced by the amount of thickness of the base material, and an electronic component is surface-mounted to allow electronic components of arbitrary size and type to be used.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【発明の属する技術分野】本発明は、ＩＣチップ等の電
子部品を基材に実装した電子部品実装済完成品の製造方
法、及び該電子部品実装済完成品製造方法にて製造され
る電子部品実装済完成品に関する。上記電子部品実装済
完成品を構成する電子部品実装済部品は、例えば複数の
半導体チップ及びコンデンサや、抵抗等の受動部品が一
つのキャリア基板に実装されたＭＣＭ（マルチチップモ
ジュール）や、複数個のメモリーチップが多段に重ねさ
れたスタックＩＣモジュールや、メモリーカード等が該
当する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an electronic component-mounted finished product in which an electronic component such as an IC chip is mounted on a base material, and an electronic component manufactured by the electronic component-mounted finished product manufacturing method. Regarding finished products that have been mounted. The electronic component-mounted components that constitute the electronic component-mounted finished product include, for example, a plurality of semiconductor chips and capacitors, an MCM (multichip module) in which passive components such as resistors are mounted on one carrier substrate, and a plurality of components. These include a stack IC module in which memory chips are stacked in multiple stages, a memory card, and the like.

【０００２】[0002]

【従来の技術】従来の電子部品実装済完成品の製造方法
について、図３１及び図３２を参照しながら以下に説明
する。従来、複数の半導体素子及び受動部品等の電子部
品が実装されたＭＣＭ、複数個のメモリーチップが多段
に重ねされたスタックＩＣモジュール、並びにメモリー
モジュールにおいては、半導体素子は、キャリア基板上
にワイヤボンディング法により電気的に接続し多層化し
ていく方法が採られている。又、電子部品は、キャリア
基板上の所定回路パターンにクリーム半田を印刷し、リ
フローする方法にて実装している。2. Description of the Related Art A conventional method for manufacturing a completed electronic component-mounted product will be described below with reference to FIGS. Conventionally, in an MCM in which a plurality of semiconductor elements and electronic components such as passive components are mounted, a stack IC module in which a plurality of memory chips are stacked in multiple stages, and a memory module, the semiconductor elements are wire-bonded on a carrier substrate. A method of electrically connecting and forming multiple layers by the method is adopted. Further, the electronic component is mounted by a method of printing cream solder on a predetermined circuit pattern on the carrier substrate and reflowing it.

【０００３】図３１に示すように、従来のＭＣＭ２０に
備わる複数個、本例の場合には３個の半導体素子１は、
キャリア基板３上に積層され、キャリア基板３上に形成
されている所定の回路パターンの電極４とワイヤボンデ
ィング法により形成された金、銅、又はアルミニウム等
のワイヤ８を介して電気的に接続されている。１２は、
ワイヤ８を含み半導体素子１を保護するための封止剤で
ある。又、電子部品５は、キャリア基板３上の所定の電
極４と電子部品５の電極６とがクリーム半田７を介して
接続されている。尚、９は、図示していないマザー基板
と当該ＭＣＭ２０とを電気的に接続するための外部電極
端子である。該外部電極端子９は、ＭＣＭ２０単体で製
品としての機能を果たすモジュールの場合は必要無い。
又、１１は、キャリア基板３の実装面側の回路パターン
と外部電極端子９との電気的導通を図るためのスルーホ
ールである。As shown in FIG. 31, a plurality of semiconductor elements 1 provided in the conventional MCM 20, in this example, three semiconductor elements 1 are
It is laminated on the carrier substrate 3 and is electrically connected to the electrode 4 having a predetermined circuit pattern formed on the carrier substrate 3 via a wire 8 such as gold, copper or aluminum formed by a wire bonding method. ing. 12 is
It is an encapsulant for protecting the semiconductor element 1 including the wires 8. Further, in the electronic component 5, a predetermined electrode 4 on the carrier substrate 3 and the electrode 6 of the electronic component 5 are connected via a cream solder 7. Reference numeral 9 is an external electrode terminal for electrically connecting the mother board (not shown) to the MCM 20. The external electrode terminal 9 is not necessary in the case of a module that functions as a product by the MCM 20 alone.
Reference numeral 11 denotes a through hole for electrically connecting the circuit pattern on the mounting surface side of the carrier substrate 3 and the external electrode terminal 9.

【０００４】その製造工程は、図３２に示すように、ま
ずステップ（図内では「Ｓ」にて示す）１では、キャリ
ア基板３上の所定の電極４上にクリーム半田を印刷して
塗布する。クリーム半田７の印刷は、一般的にスクリー
ン印刷法により実施される。次のステップ２では、上記
印刷により形成したクリーム半田７上に電子部品５を位
置合わせして実装する。次のステップ３では、電子部品
５が実装されたキャリア基板３をリフロー炉に通し、ク
リーム半田７を溶融し、その後、硬化させる。次のステ
ップ４では、キャリア基板３の厚み方向に沿って半導体
素子１を積み重ねる。尚、図中には示していないが、半
導体素子１とキャリア基板３との間、及び各半導体素子
１同士の間は、銀ペーストで接合されるのが一般的であ
る。次のステップ５では、半導体素子１の電極２とキャ
リア基板３の所定の電極４とを金や銅、又は半田等にて
なる金属ワイヤ８を用いたワイヤボンディング法により
電気的に接合する。次のステップ６では、半導体素子１
を保護するために、封止剤１２が塗布される。次のステ
ップ７では、封止剤１２が塗布されたキャリア基板３を
バッチ炉に投入し封止剤１２を硬化させる。このように
して、電子部品実装済完成品としてのＭＣＭ２０が作製
される。In the manufacturing process, as shown in FIG. 32, first, in step (indicated by "S" in the drawing) 1, cream solder is printed and applied onto a predetermined electrode 4 on the carrier substrate 3. . Printing of the cream solder 7 is generally performed by a screen printing method. In the next step 2, the electronic component 5 is aligned and mounted on the cream solder 7 formed by the above printing. In the next step 3, the carrier substrate 3 on which the electronic component 5 is mounted is passed through a reflow oven to melt the cream solder 7 and then cure it. In the next step 4, the semiconductor elements 1 are stacked along the thickness direction of the carrier substrate 3. Although not shown in the drawing, it is general that the semiconductor element 1 and the carrier substrate 3 and the respective semiconductor elements 1 are bonded with a silver paste. In the next step 5, the electrode 2 of the semiconductor element 1 and the predetermined electrode 4 of the carrier substrate 3 are electrically joined by a wire bonding method using a metal wire 8 made of gold, copper, solder or the like. In the next step 6, the semiconductor device 1
A sealant 12 is applied to protect the. In the next step 7, the carrier substrate 3 coated with the sealant 12 is put into a batch furnace to cure the sealant 12. In this way, the MCM 20 is manufactured as a completed electronic component mounted product.

【０００５】[0005]

【発明が解決しようとする課題】しかし、上述した従来
の電子部品実装済完成品の製造方法、及び該電子部品実
装済完成品製造方法にて製造される電子部品実装済完成
品としてのＭＣＭ、メモリーモジュール等の構成では、
以下の問題があった。キャリア基板３上に半導体素子１
等の半導体部品を積み上げていくため、電子部品実装済
完成品の厚み方向の高さが大きくなり、薄型化が要求さ
れる最近の製品ニーズに答えられない。又、半導体素子
１を積み上げ、さらに各半導体素子１の電気的接続をワ
イヤボンディングにて行うため、電極２は半導体素子１
の外周部に配置しておく必要がある。よって、図示する
ように、積み重ねられる半導体素子１は、必然的に平面
サイズの小さいものを順次用いる必要があり、使用可能
な半導体素子のサイズが限られる。逆に言うと、電極２
が半導体素子１の外層部以外にある、いわゆるエリアパ
ッドと呼ばれる半導体素子では、積み重ねができない。
本発明はこのような問題点を解決するためになされたも
ので、薄型化が可能であり、使用可能な電子部品の制約
が少ない、電子部品実装済完成品の製造方法、及び該電
子部品実装済完成品製造方法にて製造される電子部品実
装済完成品を提供することを目的とする。However, the above-described conventional method of manufacturing a completed electronic component-mounted product, and MCM as an electronic component-mounted completed product manufactured by the electronic component-mounted completed product manufacturing method, In the configuration such as memory module,
There were the following problems. Semiconductor device 1 on carrier substrate 3
Since semiconductor components such as the above are piled up, the height of the electronic component-mounted finished product in the thickness direction becomes large, and it is not possible to meet the recent product needs that require thinning. Moreover, since the semiconductor elements 1 are stacked and the electrical connection of each semiconductor element 1 is performed by wire bonding, the electrodes 2 are not connected to the semiconductor elements 1.
Must be placed on the outer periphery of Therefore, as shown in the drawing, it is necessary to sequentially use the semiconductor elements 1 to be stacked, which have a small planar size, and the usable semiconductor element size is limited. Conversely, the electrode 2
A semiconductor element, which is a so-called area pad, which is located outside the outer layer portion of the semiconductor element 1 cannot be stacked.
The present invention has been made to solve such a problem, can be thinned, and has few restrictions on usable electronic components, a method for manufacturing a completed electronic component mounted product, and the electronic component mounting. An object of the present invention is to provide an electronic component mounted completed product manufactured by the completed completed product manufacturing method.

【０００６】[0006]

【課題を解決するための手段】上記目的を達成するた
め、本発明は以下のように構成する。即ち、本発明の第
１態様における、電子部品実装済完成品の製造方法は、
基材内へ第１電子部品を埋設し、該埋設された上記第１
電子部品の電極と電気的に接続する第１回路パターンを
上記基材の回路形成面に形成して上記電極と上記第１回
路パターンとの電気的接続を行った電子部品実装済部品
を作製した後、上記電子部品実装済部品における上記基
材の上記第１回路パターン上に第２電子部品を実装する
ことを特徴とする。In order to achieve the above object, the present invention is configured as follows. That is, in the first aspect of the present invention, the method for manufacturing a completed electronic component-mounted product is
The first electronic component is embedded in the base material, and the embedded first component
A first circuit pattern that is electrically connected to an electrode of an electronic component is formed on the circuit forming surface of the base material to electrically connect the electrode and the first circuit pattern to produce an electronic component mounted component. After that, the second electronic component is mounted on the first circuit pattern of the base material in the electronic component mounted component.

【０００７】又、上記電子部品実装済部品の作製後、上
記第２電子部品の実装前に、上記電子部品実装済部品の
上記回路形成面に対向する対向面側より上記電子部品実
装済部品のラミネート処理を行うようにしてもよい。In addition, after the electronic component-mounted component is manufactured, but before the second electronic component is mounted, the electronic component-mounted component is mounted on the electronic component-mounted component from the side opposite to the circuit forming surface of the electronic component-mounted component. You may make it perform a lamination process.

【０００８】又、互いに対向する第１基板側第１回路パ
ターン及び第１基板側第２回路パターン並びに上記第１
基板側第１回路パターン及び上記第１基板側第２回路パ
ターンを電気的に接続する第１基板貫通穴を有する第１
基板の上記第１基板側第２回路パターンと、上記電子部
品実装済部品における上記第２電子部品とが電気的に接
続するように上記電子部品実装済部品及び上記第１基板
を互いの厚み方向にさらに重ね合わせるようにしてもよ
い。The first circuit board-side first circuit pattern and the first circuit board-side second circuit pattern facing each other and the first circuit board
A first board through hole for electrically connecting the board-side first circuit pattern and the first board-side second circuit pattern
In order to electrically connect the first circuit board-side second circuit pattern of the circuit board and the second electronic component of the electronic component-mounted component, the electronic component-mounted component and the first substrate in the mutual thickness direction. May be further overlapped.

【０００９】又、上記基材は、厚み方向に当該基材を貫
通し導電性を有して上記第１回路パターンに電気的に接
続する貫通穴を有するようにしてもよい。Further, the base material may have a through hole which penetrates the base material in the thickness direction, has conductivity, and is electrically connected to the first circuit pattern.

【００１０】又、互いに対向する第２基板側第１回路パ
ターン及び第２基板側第２回路パターン並びに上記第２
基板側第１回路パターン及び上記第２基板側第２回路パ
ターンを電気的に接続する第２基板貫通穴を有する第２
基板の上記第２基板側第２回路パターンと、上記基材の
上記貫通穴とが電気的に接続するように上記電子部品実
装済部品及び上記第２基板を互いの厚み方向に重ね合わ
せ、その後、上記第２基板側第１回路パターンに第３電
子部品を実装するようにしてもよい。The second circuit board-side first circuit pattern and the second circuit board-side second circuit pattern facing each other and the second circuit board
A second circuit board through hole for electrically connecting the circuit board side first circuit pattern and the second circuit board side second circuit pattern;
The second component on the second substrate side of the substrate and the through hole of the base material are electrically connected to each other so that the electronic component-mounted component and the second substrate are overlapped with each other in the thickness direction, and The third electronic component may be mounted on the second circuit board-side first circuit pattern.

【００１１】又、さらに上記電子部品実装済部品は、上
記回路形成面に対向する対向面に上記導電性貫通穴と電
気的に接続される第２回路パターンを有するようにして
もよい。Further, the electronic component-mounted component may have a second circuit pattern electrically connected to the conductive through hole on a surface facing the circuit forming surface.

【００１２】又、上記第２回路パターン上に第３電子部
品を実装するようにしてもよい。Also, a third electronic component may be mounted on the second circuit pattern.

【００１３】又、上記導電性貫通穴を有する上記電子部
品実装済部品を複数積層し、該積層された電子部品実装
済部品と上記第２基板とを重ね合わせるようにしてもよ
い。Further, a plurality of the electronic component mounted components having the conductive through holes may be laminated, and the laminated electronic component mounted components may be superposed on the second substrate.

【００１４】本発明の第２態様の電子部品実装済完成品
の製造方法によれば、基材内へ第１電子部品を埋設し、
該埋設された上記第１電子部品の電極と電気的に接続す
る第１回路パターンを上記基材の回路形成面に形成して
上記電極と上記第１回路パターンとの電気的接続を行っ
た電子部品実装済部品を作製した後、互いに対向する第
１基板側第１回路パターン及び第１基板側第２回路パタ
ーン並びに上記第１基板側第１回路パターン及び上記第
１基板側第２回路パターンを電気的に接続する第１基板
貫通穴を有する第１基板の上記第１基板側第２回路パタ
ーンと上記第１回路パターンとが電気的に接続するよう
に上記電子部品実装済部品及び上記第１基板を互いの厚
み方向に重ね合わせる、ことを特徴とする。According to the method for manufacturing a completed electronic component-mounted product of the second aspect of the present invention, the first electronic component is embedded in the base material,
An electron formed by forming a first circuit pattern electrically connected to the embedded electrode of the first electronic component on the circuit forming surface of the base material and electrically connecting the electrode and the first circuit pattern. After the component-mounted component is produced, the first circuit board-side first circuit pattern and the first circuit board-side second circuit pattern, the first circuit board-side first circuit pattern, and the first circuit board-side second circuit pattern facing each other The electronic component-mounted component and the first component such that the second circuit pattern on the first substrate side of the first substrate having a first substrate through hole electrically connected to the first circuit pattern and the first circuit pattern are electrically connected. It is characterized in that the substrates are overlapped with each other in the thickness direction.

【００１５】上記第２態様の製造方法において、上記電
子部品実装済部品及び上記第１基板を互いに重ね合わせ
て上記第１基板側第２回路パターンと上記第１回路パタ
ーンとを電気的に接続した後、上記第１基板側第１回路
パターンに第２電子部品を実装するようにしてもよい。In the manufacturing method of the second aspect, the electronic component-mounted component and the first substrate are overlapped with each other and the second circuit pattern on the first substrate side and the first circuit pattern are electrically connected. After that, the second electronic component may be mounted on the first circuit board-side first circuit pattern.

【００１６】上記第２態様の製造方法において、上記第
１基板側第１回路パターンには、第２電子部品が予め実
装済であってもよい。In the manufacturing method of the second aspect, a second electronic component may be pre-mounted on the first circuit board-side first circuit pattern.

【００１７】上記第２態様の製造方法において、上記電
子部品実装済部品の作製後、上記電子部品実装済部品の
上記回路形成面に対向する対向面側より上記電子部品実
装済部品のラミネート処理を行い、該ラミネート処理済
の上記電子部品実装済部品における上記第１回路パター
ンと上記第１基板側第２回路パターンとの電気的接続を
行うようにしてもよい。In the manufacturing method according to the second aspect, after the electronic component-mounted component is produced, the electronic component-mounted component is laminated from the surface of the electronic component-mounted component facing the circuit forming surface. Then, the first circuit pattern and the first circuit board-side second circuit pattern of the electronic component-mounted component that has been laminated may be electrically connected.

【００１８】上記第２態様の製造方法において、上記基
材は、厚み方向に当該基材を貫通し導電性を有して上記
第１回路パターンに電気的に接続する貫通穴を有するよ
うにしてもよい。In the manufacturing method of the second aspect, the base material has a through hole that penetrates the base material in the thickness direction, has conductivity, and is electrically connected to the first circuit pattern. Good.

【００１９】上記第２態様の製造方法において、互いに
対向する第２基板側第１回路パターン及び第２基板側第
２回路パターン並びに上記第２基板側第１回路パターン
及び上記第２基板側第２回路パターンを電気的に接続す
る第２基板貫通穴を有する第２基板の上記第２基板側第
２回路パターンと、上記基材の上記貫通穴とが電気的に
接続するように上記電子部品実装済部品及び上記第２基
板を互いの厚み方向に重ね合わせ、その後、上記第２基
板側第１回路パターンに第３電子部品を実装するように
してもよい。In the manufacturing method of the second aspect, the second circuit board-side first circuit pattern and the second circuit board-side second circuit pattern, the second circuit board-side first circuit pattern, and the second circuit-board-side second circuit which face each other. The electronic component mounting so that the second substrate-side second circuit pattern of the second substrate having the second substrate through hole for electrically connecting the circuit pattern and the through hole of the base material are electrically connected The finished component and the second substrate may be overlapped with each other in the thickness direction, and then the third electronic component may be mounted on the second substrate-side first circuit pattern.

【００２０】上記第２態様の製造方法において、上記電
子部品実装済部品と、上記第１基板との接合は、接合剤
を介して行うようにしてもよい。In the manufacturing method of the second aspect, the electronic component-mounted component and the first substrate may be joined together via a joining agent.

【００２１】上記第２態様の製造方法において、上記電
子部品実装済部品と、上記第１基板及び第２基板との接
合は、接合剤を介して行うようにしてもよい。In the manufacturing method of the second aspect, the electronic component mounted component may be bonded to the first substrate and the second substrate through a bonding agent.

【００２２】上記第２態様の製造方法において、上記基
材内への上記第１電子部品の埋設後、上記第１回路パタ
ーンの形成前に、埋設された上記第１電子部品の上記電
極を上記回路形成面に露出させるようにしてもよい。In the manufacturing method of the second aspect, after the embedding of the first electronic component in the base material and before the formation of the first circuit pattern, the electrode of the embedded first electronic component is attached to the electrode. It may be exposed on the circuit formation surface.

【００２３】さらに本発明の第３態様の電子部品実装済
完成品によれば、上述した第１態様及び第２態様の電子
部品実装済完成品製造方法にて製造されたことを特徴と
する。Further, the electronic component-mounted finished product of the third aspect of the present invention is characterized by being manufactured by the electronic component-mounted finished product manufacturing method of the above-described first and second aspects.

【００２４】[0024]

【発明の実施の形態】本発明の実施形態である、電子部
品実装済完成品の製造方法、及び電子部品実装済完成品
について、図を参照しながら以下に説明する。ここで、
上記電子部品実装済完成品は、上記電子部品実装済完成
品製造方法にて製造されたものである。尚、各図におい
て同じ構成部分については同じ符号を付している。又、
上記電子部品実装済完成品の機能を果たす一例として、
本実施形態では、ＭＣＭ（マルチチプモジュール）を例
に採るが、勿論これに限定されるものでは無い。 第１の実施形態；図１は、本実施形態の電子部品実装済
完成品製造方法を用いて作製された電子部品実装済完成
品７００を示している。該電子部品実装済完成品７００
は、第１電子部品を埋設した、電子部品実装済部品の一
例に相当する第１電子部品実装済部品１５０と、該第１
電子部品実装済部品１５０に実装された第２電子部品と
を備える。上記第１電子部品に相当する部品として本実
施形態では半導体素子１０１−１及びコンデンサ部品１
０５−１を例に採る。上記第１電子部品実装済部品１５
０は、基材の一例に相当しシート状で樹脂材にてなる第
１樹脂基材１４０内に半導体素子１０１−１及びコンデ
ンサ部品１０５−１を埋設しており、上記第１樹脂基材
１４０の回路形成面１４１には、半導体素子１０１−１
上の電極１０２に形成されているバンプ１１３及びコン
デンサ部品１０５−１の電極１０６が露出する。そし
て、回路形成面１４１には、バンプ１１３及び電極１０
６と電気的に接続する第１回路パターン１１５が形成さ
れており、半導体素子１０１−１及びコンデンサ部品１
０５−１は、上記第１回路パターン１１５と電気的に接
続されている。又、上記第２電子部品に相当する部品と
して本実施形態では半導体素子１０１−２及びコンデン
サ部品１０５−２を例に採る。これらの半導体素子１０
１−２及びコンデンサ部品１０５−２は、上記第１回路
パターン１１５上に実装される。よって、上記第１電子
部品と上記第２電子部品とは上記第１回路パターン１１
５を介して電気的に接続されている。尚、電子部品の一
例としてのコンデンサ部品１０５−１、１０５−２は、
コンデンサに限定されるものではなく、抵抗その他の部
品であって良い。又、チップ形状ではなく、シート形状
の部品であっても良い。又、半導体素子１０１−１及び
１０１−２を総称して半導体素子１０１と記し、コンデ
ンサ部品１０５−１、１０５−２を総称してコンデンサ
部品１０５と記す場合がある。BEST MODE FOR CARRYING OUT THE INVENTION A method of manufacturing an electronic component-mounted finished product and an electronic component-mounted finished product, which are embodiments of the present invention, will be described below with reference to the drawings. here,
The electronic component-mounted finished product is manufactured by the electronic component-mounted completed product manufacturing method. In each figure, the same components are designated by the same reference numerals. or,
As an example of fulfilling the function of the above-mentioned electronic component mounted finished product,
In the present embodiment, an MCM (multi-chip module) is taken as an example, but of course the invention is not limited to this. 1st Embodiment; FIG. 1: has shown the electronic component mounted completed product 700 produced using the electronic component mounted completed product manufacturing method of this embodiment. The completed electronic component mounted product 700
Is a first electronic component-mounted component 150 which is an example of an electronic component-mounted component in which a first electronic component is embedded, and the first electronic component-mounted component 150.
The second electronic component mounted on the electronic component mounted component 150 is provided. In this embodiment, the semiconductor element 101-1 and the capacitor component 1 are provided as components corresponding to the first electronic component.
05-1 is taken as an example. First electronic component mounted component 15
0 corresponds to an example of the base material, and the semiconductor element 101-1 and the capacitor component 105-1 are embedded in the first resin base material 140 formed of a resin material in a sheet shape. The semiconductor element 101-1 is formed on the circuit formation surface 141 of
The bump 113 formed on the upper electrode 102 and the electrode 106 of the capacitor component 105-1 are exposed. The bump 113 and the electrode 10 are formed on the circuit formation surface 141.
6, the first circuit pattern 115 electrically connected to the semiconductor element 10-1 is formed, and the semiconductor element 101-1 and the capacitor component 1 are formed.
05-1 is electrically connected to the first circuit pattern 115. Further, in the present embodiment, the semiconductor element 101-2 and the capacitor component 105-2 are taken as examples of components corresponding to the second electronic components. These semiconductor elements 10
The 1-2 and the capacitor component 105-2 are mounted on the first circuit pattern 115. Therefore, the first electronic component and the second electronic component are the same as the first circuit pattern 11
It is electrically connected via 5. The capacitor parts 105-1 and 105-2 as an example of electronic parts are
The component is not limited to the capacitor, and may be a resistor or other component. Further, it may be a sheet-shaped component instead of the chip-shaped component. Further, the semiconductor elements 101-1 and 101-2 may be collectively referred to as the semiconductor element 101, and the capacitor components 105-1 and 105-2 may be collectively referred to as the capacitor component 105.

【００２５】上述の構成を有する電子部品実装済完成品
７００の製造方法について、図２〜図８を参照して以下
に説明する。図２は、上記半導体素子１０１を示してお
り、１０２は半導体素子１０１の電極、１１２は半導体
素子１０１のアクティブ面を保護するパッシベーション
膜を示す。又、図３は、外部電極１０６を有するコンデ
ンサ部品１０５を示している。図８に示すステップ（図
８では「Ｓ」にて示す）１０１において、半導体素子１
０１の電極１０２上に金や銅、半田等にてなる金属ワイ
ヤを用いてワイヤボンディング法により、バンプ１１３
を形成する。尚、バンプ１１３の形成は、上記ワイヤボ
ンディング法に限定されるものではなく、メッキ法でも
良い。A method of manufacturing the completed electronic component-mounted product 700 having the above-described structure will be described below with reference to FIGS. FIG. 2 shows the semiconductor element 101, 102 is an electrode of the semiconductor element 101, and 112 is a passivation film for protecting the active surface of the semiconductor element 101. 3 shows a capacitor component 105 having an external electrode 106. In step 101 (shown by “S” in FIG. 8) shown in FIG.
The bump 113 is formed on the electrode 102 of 01 by a wire bonding method using a metal wire made of gold, copper, solder, or the like.
To form. The formation of the bump 113 is not limited to the wire bonding method described above, but may be a plating method.

【００２６】次のステップ１０２では、バンプ１１３を
形成した半導体素子１０１−１及びコンデンサ部品１０
５−１を、ポリエチレンフタレート、塩化ビニル、ポリ
カーボネイト、アクリロニトリルブタジエン、ポリイミ
ド、及びエポキシ等の電気的絶縁性を有する樹脂で形成
されシート状で熱可塑性の第１樹脂基材１４０上に載置
する。半導体素子１０１−１及びコンデンサ部品１０５
−１は、それぞれ複数個搭載する場合もあり、又、コン
デンサ部品１０５−１は搭載しない場合もある。At the next step 102, the semiconductor element 101-1 and the capacitor component 10 on which the bumps 113 are formed are formed.
5-1 is placed on a sheet-shaped thermoplastic first resin substrate 140 formed of a resin having electrical insulation such as polyethylene phthalate, vinyl chloride, polycarbonate, acrylonitrile butadiene, polyimide, and epoxy. Semiconductor element 101-1 and capacitor component 105
A plurality of -1 may be mounted, and a capacitor component 105-1 may not be mounted.

【００２７】ここで、第１樹脂基材１４０の厚みは、本
実施形態の場合、後述するようにバンプ１１３及び外部
電極１０６を第１樹脂基材１４０の回路形成面１４１か
ら露出させる必要から、基本的に半導体素子１０１−１
の厚み以上、半導体素子１０１−１の厚みとバンプ１１
３の高さを合わせた厚み以下にすることが望ましい。例
えば、半導体素子１０１−１の厚みが０．１８ｍｍ、バ
ンプ１１３の高さが０．０４ｍｍの場合、第１樹脂基材
１４０の厚みは０．２ｍｍが好ましい。又、コンデンサ
部品１０５−１は第１樹脂基材１４０の厚みに対して５
０μｍ程度厚い厚みのものを用いることが好適である。
少なくとも、コンデンサ部品１０５−１の厚みが第１樹
脂基材１４０の厚み以下になることは避ける必要があ
る。In the present embodiment, the thickness of the first resin base material 140 needs to expose the bumps 113 and the external electrodes 106 from the circuit forming surface 141 of the first resin base material 140 as described later. Basically semiconductor device 101-1
Thickness of the semiconductor element 101-1 and the bump 11
It is desirable that the height of 3 is equal to or less than the combined thickness. For example, when the thickness of the semiconductor element 101-1 is 0.18 mm and the height of the bump 113 is 0.04 mm, the thickness of the first resin base material 140 is preferably 0.2 mm. Further, the capacitor component 105-1 has a thickness of 5 relative to the thickness of the first resin base material 140.
It is preferable to use one having a thickness of about 0 μm.
At least it is necessary to avoid that the thickness of the capacitor component 105-1 becomes equal to or less than the thickness of the first resin base material 140.

【００２８】次のステップ１０３では、図４に示すよう
にバンプ１１３付の半導体素子１０１−１及びコンデン
サ部品１０５−１が載置された第１樹脂基材１４０を、
図５に示すように、熱プレス板１７１、１７２間に挟
み、バンプ１１３付半導体素子１０１−１及びコンデン
サ部品１０５−１と、第１樹脂基材１４０とを加熱装置
１７３にて加熱しながら、押圧装置１７４にて相対的に
押圧し、半導体素子１０１−１及び電子部品１０５−１
を第１樹脂基材１４０内に押し込み埋設する。該熱プレ
スの条件は、例えばポリエチレンテレフタレート製の第
１樹脂基材１４０を用いた場合、圧力３０×１０５Ｐ
ａ、温度１６０℃、プレス時間１分である。尚、上記温
度、圧力は、第１樹脂基材１４０の材質により異ならせ
る。上記プレス条件は、加熱装置１７３及び押圧装置１
７４を制御装置１８０にて制御される。又、半導体素子
１０１−１及びコンデンサ部品１０５−１の押圧動作
は、それぞれ別々の熱プレス板を用いて個別に実施して
も良い。In the next step 103, as shown in FIG. 4, the first resin base material 140 on which the semiconductor element 101-1 with the bump 113 and the capacitor component 105-1 are mounted is
As shown in FIG. 5, while sandwiched between the hot press plates 171, 172, the semiconductor device 101-1 with bumps 113, the capacitor component 105-1 and the first resin base material 140 are heated by the heating device 173, The semiconductor device 101-1 and the electronic component 105-1 are relatively pressed by the pressing device 174.
Embedded in the first resin base material 140. The conditions of the hot pressing are, for example, when the first resin base material 140 made of polyethylene terephthalate is used, the pressure is 30 × 10 5 P.
a, temperature 160 ° C., press time 1 minute. The above temperature and pressure are changed depending on the material of the first resin base material 140. The pressing conditions are the heating device 173 and the pressing device 1.
74 is controlled by the controller 180. Further, the pressing operation of the semiconductor element 101-1 and the capacitor component 105-1 may be individually performed by using different hot press plates.

【００２９】次のステップ１０４に対応する図６は、上
記プレス後における半導体素子１０１−１、コンデンサ
部品１０５−１、及び第１樹脂基材１４０の状態を示し
た断面図である。第１樹脂基材１４０への半導体素子１
０１−１、及びコンデンサ部品１０５−１の上記挿入動
作により、本実施形態では図６に示すように、バンプ１
１３の端面１１３ａ、及び電子部品１０５の電極１０６
の端面１０６ａ、つまり上記プレスによりバンプ１１３
及び電極１０６が熱プレス板１７１に接触した面を第１
樹脂基材１４０の回路形成面１４１に露出させ、該状態
で半導体素子１０１−１及びコンデンサ部品１０５−１
は第１樹脂基材１４０に埋設される。このとき、本実施
形態では、薄型化を図るため、半導体素子１０１−１の
上記アクティブ面に対向する裏面１０１ａ及びコンデン
サ部品１０５−１の端面１０５ａと、上記回路形成面１
４１に対向する第１樹脂基材１４０の対向面１４２と
は、図示するように同一面となるようにしているが、こ
れに限定されるものではない。つまり、製造する半導体
部品実装済部品によっては、上述した第１樹脂基材１４
０の厚みや、熱プレス板１７１、１７２の押圧力等の調
整により、例えば、第１樹脂基材１４０の対向面１４２
より半導体素子１０１−１の裏面１０１ａ及びコンデン
サ部品１０５−１の端面１０５ａを突出させても良い。FIG. 6 corresponding to the next step 104 is a cross-sectional view showing the state of the semiconductor element 101-1, the capacitor component 105-1 and the first resin base material 140 after the pressing. Semiconductor element 1 on first resin base material 140
01-1 and the capacitor component 105-1 are inserted into the bump 1 as shown in FIG. 6 in the present embodiment.
13, the end face 113a of the electrode 13, and the electrode 106 of the electronic component 105.
End face 106a of the bump 113, that is, the bump 113
And the surface where the electrode 106 contacts the hot press plate 171 is the first
The semiconductor element 101-1 and the capacitor component 105-1 are exposed in the circuit forming surface 141 of the resin base material 140 in this state.
Are embedded in the first resin substrate 140. At this time, in the present embodiment, in order to reduce the thickness, the back surface 101a facing the active surface of the semiconductor element 101-1 and the end surface 105a of the capacitor component 105-1 and the circuit forming surface 1 are formed.
Although the facing surface 142 of the first resin base material 140 facing 41 is flush with the facing surface 142 as shown in the figure, it is not limited to this. That is, depending on the semiconductor component mounted parts to be manufactured, the first resin base material 14 described above may be used.
By adjusting the thickness of 0, the pressing force of the hot press plates 171, 172, etc., for example, the facing surface 142 of the first resin base material 140.
Alternatively, the back surface 101a of the semiconductor element 101-1 and the end surface 105a of the capacitor component 105-1 may be projected.

【００３０】次のステップ１０５では、図７に示すよう
に、銀、銅等の導電性ペーストを用いて、バンプ１１３
の端面１１３ａ、及びコンデンサ部品１０５−１の電極
１０６の端面１０６ａに接触するように、半導体素子１
０１−１及びコンデンサ部品１０５−１と電気的に接続
される第１回路パターン１１５を、第１樹脂基材１４０
の回路形成面１４１上に形成する。上記導電性ペースト
による第１回路パターン１１５の形成は、一般的にスク
リーン印刷やオフセット印刷やグラビア印刷等によって
行われる。例えばスクリーン印刷の場合、１６５メッシ
ュ／インチ、乳剤厚み１０μｍのマスクを介して導電性
ペーストを印刷し、導体厚み約３０μｍの第１回路パタ
ーン１１５を形成する。又、第１回路パターン１１５の
形成は、導電性ペーストの印刷による形成に限定される
ものではなく、銅、Ｎｉ、及びアルミニウム等を用いた
金属めっき及び蒸着等による薄膜形成等により形成して
も良い。このようにして、第１回路パターン１１５と、
半導体素子１０１−１及びコンデンサ部品１０５−１と
の電気的接続を図る。又、図７に示す状態の構成部分が
第１電子部品実装済部品１５０である。At the next step 105, as shown in FIG. 7, the bump 113 is formed by using a conductive paste such as silver or copper.
Of the semiconductor element 1 so as to come into contact with the end face 113a of the
01-1 and the capacitor component 105-1 are electrically connected to the first circuit pattern 115, and the first resin substrate 140
It is formed on the circuit formation surface 141. The formation of the first circuit pattern 115 with the conductive paste is generally performed by screen printing, offset printing, gravure printing, or the like. For example, in the case of screen printing, a conductive paste is printed through a mask of 165 mesh / inch and an emulsion thickness of 10 μm to form the first circuit pattern 115 having a conductor thickness of about 30 μm. Further, the formation of the first circuit pattern 115 is not limited to the formation by printing the conductive paste, and the first circuit pattern 115 may be formed by metal plating using copper, Ni, aluminum or the like and thin film formation by vapor deposition or the like. good. In this way, the first circuit pattern 115,
Electrical connection is made between the semiconductor element 101-1 and the capacitor component 105-1. The component in the state shown in FIG. 7 is the first electronic component mounted component 150.

【００３１】次のステップ１０６では、第１電子部品実
装済部品１５０の第１回路パターン１１５に、第２電子
部品である、半導体素子１０１−２及びコンデンサ部品
１０５−２の実装を行い、図１に示すような、電子部品
実装済完成品７００としての機能を果たす一例に相当す
るＭＣＭが完成する。尚、第１電子部品実装済部品１５
０の第１回路パターン１１５への半導体素子１０１−２
及びコンデンサ部品１０５−２の実装方法は、図示して
いないが、半田付け、銀ペーストによる接合等、一般的
な回路実装方法にて行う。又、図１において、１７１は
半導体素子１０１−２を保護する封止材を示している。In the next step 106, the semiconductor element 101-2 and the capacitor component 105-2, which are the second electronic components, are mounted on the first circuit pattern 115 of the first electronic component-mounted component 150, and then, as shown in FIG. An MCM corresponding to an example that fulfills the function of the completed electronic component-mounted product 700 as shown in FIG. The first electronic component mounted component 15
0 to the first circuit pattern 115 of the semiconductor device 101-2
Although not shown, the capacitor component 105-2 is mounted by a general circuit mounting method such as soldering or joining with silver paste. Further, in FIG. 1, reference numeral 171 indicates a sealing material that protects the semiconductor element 101-2.

【００３２】このように本実施形態によれば、モジュー
ルが半導体素子１０１やコンデンサ部品１０５を第１樹
脂基材１４０に埋設した構造であるので、従来例に示す
キャリア基板３上に部品を積み上げていく構造と異な
り、キャリア基板３の厚み分モジュール厚みを薄くする
ことができ、薄型化が要求される最近の製品ニーズを満
足することが可能となる。又、半導体素子１０１−１の
バンプ１１３やコンデンサ部品１０５−１の電極１０６
に直接接触するように第１回路パターン１１５を形成す
ることから、ワイヤボンディング用の電極を半導体素子
の周辺部分に形成する必要が無い。よって、半導体素子
を積み上げていく際、任意のサイズの半導体素子を用い
ることができる。さらに、半導体素子の電極位置に制限
が無いため、エリアパッドタイプの半導体素子を重ねる
ことが可能となる。As described above, according to the present embodiment, the module has a structure in which the semiconductor element 101 and the capacitor component 105 are embedded in the first resin base material 140. Therefore, components are stacked on the carrier substrate 3 shown in the conventional example. Unlike some structures, the module thickness can be reduced by the thickness of the carrier substrate 3, and it becomes possible to satisfy the recent product needs that require thinning. In addition, the bumps 113 of the semiconductor element 101-1 and the electrodes 106 of the capacitor component 105-1.
Since the first circuit pattern 115 is formed so as to be in direct contact with, it is not necessary to form an electrode for wire bonding in the peripheral portion of the semiconductor element. Therefore, when stacking the semiconductor elements, semiconductor elements of any size can be used. Further, since the electrode positions of the semiconductor elements are not limited, it is possible to stack the area pad type semiconductor elements.

【００３３】第２の実施の形態；第２の実施形態では、
図８におけるステップ１０５にて第１電子部品実装済部
品１５０を形成した後、ステップ１０６にて第１回路パ
ターン１１５に上記第２電子部品を実装する前に、第１
電子部品実装済部品１５０の回路形成面１４１とは反対
側の対向面１４２側から、ポリエチレンフタレート、塩
化ビニル、ポリカーボネイト、アクリロニトリルブタジ
エン、ポリイミド、及びエポキシ等の電気的絶縁性を有
する第２樹脂基材１６１でラミネート処理により熱融着
し、第１電子部品実装済部品１５０の封止を行う。該ラ
ミネート処理は、図９に示すように平坦面を有する熱プ
レス板１７１、１７２により加圧、加熱して実施され
る。処理条件は、例えばポリエチレンテレフタレート製
の第２樹脂基材１６１を用いた場合、圧力３０×１０５
Ｐａ、温度１６０℃、昇圧時間１分、圧力保持時間１分
である。Second Embodiment; In the second embodiment,
After forming the first electronic component mounted component 150 in step 105 in FIG. 8, before mounting the second electronic component on the first circuit pattern 115 in step 106,
A second resin base material having electrical insulation such as polyethylene phthalate, vinyl chloride, polycarbonate, acrylonitrile butadiene, polyimide, and epoxy from the side of the facing surface 142 opposite to the circuit forming surface 141 of the electronic component mounted part 150. At 161 the first electronic component-mounted component 150 is sealed by heat-sealing by laminating. The laminating process is performed by pressing and heating with hot press plates 171 and 172 having flat surfaces as shown in FIG. The treatment condition is, for example, when the second resin base material 161 made of polyethylene terephthalate is used, the pressure is 30 × 10 5.
Pa, temperature 160 ° C., pressurization time 1 minute, pressure holding time 1 minute.

【００３４】又、上記ラミネート処理は、図１０に示す
ロールプレス方式により実施しても良い。図１０におい
て、３１０、３１１は加熱装置３１２にて加熱され、駆
動量３１３にて回転されるローラーである。第１電子部
品実装済部品１５０をその厚み方向から押圧する形で上
記第２樹脂基材１６１をローラー３１０、３１１間に供
給し、厚み方向からラミネートし、熱融着していく。処
理条件は、例えばポリエチレンテレフタレート製の第２
樹脂基材１６１を用いた場合、圧力３０×１０ ５Ｐａ、
温度１４０℃、ラミネート速度０．１ｍ／分である。以
上の工程を経て、上述した第１電子部品実装済部品１５
０の変形例としての、図１２に示す電子部品実装済部品
１５１が作製される。又、ラミネートする際、第１樹脂
基材１４０と第２樹脂基材１６１とが熱融着しない材料
の組み合わせの場合、図１１に示すように、第１電子部
品実装済部品１５０と第２樹脂基材１６１間にエポキ
シ、及びアクリル等の接合剤１６２を介在させても良
い。この場合、上述した第１電子部品実装済部品１５０
の変形例としての、図１３に示す電子部品実装済部品１
５２が作製される。The laminating process is shown in FIG.
You may implement by a roll press system. Smell in Figure 10
310, 311 are heated by the heating device 312, and
It is a roller that is rotated by a motion amount 313. First electronic part
The mounted component 150 is pressed in the thickness direction.
Provide the second resin base material 161 between the rollers 310 and 311.
It is fed, laminated from the thickness direction, and heat-fused. place
The physical condition is, for example, the second polyethylene terephthalate
When the resin base material 161 is used, the pressure is 30 × 10. 5Pa,
The temperature is 140 ° C. and the laminating speed is 0.1 m / min. Since
Through the above process, the above-mentioned first electronic component mounted component 15
As a modified example of No. 0, the electronic component mounted component shown in FIG.
151 is created. Also, when laminating, the first resin
Material in which the base material 140 and the second resin base material 161 are not heat-sealed
In the case of the combination of, as shown in FIG.
Between the mounted component 150 and the second resin base material 161, there is an epoxy.
It may be possible to interpose a bonding agent 162 such as acrylic or acrylic.
Yes. In this case, the above-described first electronic component mounted component 150
As a modified example of the electronic component mounted component 1 shown in FIG.
52 is produced.

【００３５】これらの電子部品実装済部品１５０、１５
１、１５２に対して、その後、第１の実施形態における
場合と同様に、第１回路パターン１１５に、第２電子部
品である半導体素子１０１−２及びコンデンサ部品１０
５−２の実装が行われる。よって、図１４に示すよう
な、半導体素子１０１−２及びコンデンサ部品１０５−
２を実装したモジュールとしての電子部品実装済完成品
７０１としての機能を果たす一例に相当するＭＣＭが完
成する。当該第２実施形態によれば、第１樹脂基材１４
０内に埋設されている半導体素子１０１−１及びコンデ
ンサ部品１０５−１が第２樹脂基材１６１で封止されて
いるため、耐湿性の点で第１実施形態のものよりも優れ
たモジュールとなる。These electronic parts mounted parts 150, 15
1, 152, and then, similarly to the case of the first embodiment, the semiconductor element 101-2 and the capacitor component 10 which are the second electronic components are formed on the first circuit pattern 115.
5-2 is implemented. Therefore, as shown in FIG. 14, the semiconductor element 101-2 and the capacitor component 105-
An MCM corresponding to an example that functions as a completed electronic component-mounted product 701 as a module in which 2 is mounted is completed. According to the second embodiment, the first resin base material 14
Since the semiconductor element 101-1 and the capacitor component 105-1 which are embedded in the module 0 are sealed with the second resin base material 161, the module is superior in moisture resistance to that of the first embodiment. Become.

【００３６】第３の実施形態；第３の実施形態では、図
８に示すステップ１０５にて第１電子部品実装済部品１
５０を形成した後、ステップ１０６へ移行する前に、図
１５に示すように、上記第１電子部品実装済部品１５０
における第１回路パターン１１５に回路パターンが形成
された第１基板２６０を装着する。該第１基板２６０
は、ガラスエポキシ、フェノール、及びセラミック等、
従来より回路基板として用いられている材質で構成され
た一般的な回路基板である。又、該第１基板２６０に
は、該第１基板２６０の厚み方向において互いに対向す
る両表面に、第１基板側第１回路パターン２６１及び第
１基板側第２回路パターン２６２が形成されており、さ
らに、該第１基板側第１回路パターン２６１及び第１基
板側第２回路パターン２６２を電気的に接続するスルー
ホールである第１基板貫通穴２６３が厚み方向２６４に
沿って形成されている。よって、第１基板２６０は、両
面実装可能な基板である。上記第１電子部品実装済部品
１５０と第１基板２６０との接合は、上記第１電子部品
実装済部品１５０における第１回路パターン１１５と、
第１基板２６０の第１基板側第２回路パターン２６２と
を電気的に接続させて互いの厚み方向２６４に重ね合わ
せる。次に、例えば導電性の接着剤を第１電子部品実装
済部品１５０と第１基板２６０との間に介在させて、第
１電子部品実装済部品１５０に対して第１基板２６０に
てラミネート処理を行い、第１電子部品実装済部品１５
０と第１基板２６０とを一体化させる。このようにし
て、図１６に示す第２電子部品実装済部品１５３が完成
する。Third Embodiment: In the third embodiment, the first electronic component mounted component 1 is processed in step 105 shown in FIG.
After forming 50, and before moving to step 106, as shown in FIG.
The first substrate 260 having the circuit pattern formed on the first circuit pattern 115 is mounted. The first substrate 260
Are glass epoxies, phenols, and ceramics,
It is a general circuit board made of a material that has been conventionally used as a circuit board. Further, the first substrate 260 has a first substrate-side first circuit pattern 261 and a first substrate-side second circuit pattern 262 formed on both surfaces of the first substrate 260 that face each other in the thickness direction. Further, a first substrate through hole 263 which is a through hole for electrically connecting the first substrate side first circuit pattern 261 and the first substrate side second circuit pattern 262 is formed along the thickness direction 264. . Therefore, the first substrate 260 is a substrate that can be mounted on both sides. The first electronic component mounted component 150 and the first substrate 260 are bonded to each other by the first circuit pattern 115 in the first electronic component mounted component 150,
The first circuit board-side second circuit pattern 262 of the first circuit board 260 is electrically connected and overlapped with each other in the thickness direction 264. Next, for example, a conductive adhesive is interposed between the first electronic component mounted component 150 and the first substrate 260, and the first electronic component mounted component 150 is laminated on the first substrate 260. The first electronic component mounted component 15
0 and the first substrate 260 are integrated. In this way, the second electronic component mounted component 153 shown in FIG. 16 is completed.

【００３７】第２電子部品実装済部品１５３を作製後、
第１基板２６０の第１基板側第１回路パターン２６１
に、第２電子部品としての半導体素子１０１−２及びコ
ンデンサ部品１０５−２の実装を行う。これにより、図
１７に示すような、半導体素子１０１−２及びコンデン
サ部品１０５−２を実装した電子部品実装済完成品７０
２としての機能を果たす一例に相当するＭＣＭが完成す
る。尚、上述のように当該第３実施形態では、第２電子
部品実装済部品１５３の作製後、第２電子部品を実装し
たが、図１８に示すように、予め第２電子部品が第１基
板側第１回路パターン２６１に実装された第１基板２６
５を第１電子部品実装済部品１５０に接合することもで
きる。After the second electronic component mounted component 153 is produced,
The first substrate-side first circuit pattern 261 of the first substrate 260
Then, the semiconductor element 101-2 and the capacitor component 105-2 as the second electronic component are mounted. As a result, as shown in FIG. 17, the completed electronic component mounted product 70 on which the semiconductor element 101-2 and the capacitor component 105-2 are mounted is mounted.
An MCM corresponding to an example that fulfills the function of 2 is completed. As described above, in the third embodiment, the second electronic component is mounted after the second electronic component-mounted component 153 is manufactured. However, as shown in FIG. 18, the second electronic component is previously mounted on the first substrate. Side first circuit pattern 261 mounted on the first substrate 26
5 can be joined to the first electronic component mounted component 150.

【００３８】このように第３実施形態においても上述の
第１実施形態及び第２実施形態と同様に、薄型化が要求
される最近の製品ニーズを満足することができ、又、ワ
イヤボンディング用の電極を半導体素子の周辺部分に形
成する必要がなく、又、任意のサイズの半導体素子を用
いることができ、エリアパッドタイプの半導体素子を使
用することが可能である。更に、第３実施形態では、第
１基板２６０として一般的な回路基板を用いることによ
り、従来からの表面実装における印刷技術、リフロー技
術が適用可能であり、モジュール形成の難易度を下げる
ことができる。As described above, also in the third embodiment, similar to the above-described first and second embodiments, it is possible to satisfy the recent product needs that require a reduction in thickness, and for wire bonding. It is not necessary to form electrodes in the peripheral portion of the semiconductor element, and a semiconductor element of any size can be used, and an area pad type semiconductor element can be used. Furthermore, in the third embodiment, by using a general circuit board as the first board 260, the conventional printing technology and surface reflow technology in surface mounting can be applied, and the difficulty of module formation can be reduced. .

【００３９】第４の実施の形態；第４の実施の形態で
は、第１電子部品実装済部品１５０の形成後、第１基板
２６０もしくは図１８に示す第１基板２６５を第１電子
部品実装済部品１５０にラミネート接合する際に、図１
９に示す電子部品実装済完成品７０３のように、第１電
子部品実装済部品１５０と第１基板２６０もしくは第１
基板２６５との間に、エポキシ、アクリル、異方性導電
シート、及び異方性導電ペースト等の接合剤１６２を介
在させる構造を採る。このとき、図２０に示すように、
接合剤１６２の厚みを厚くすることにより、図１に示す
電子部品実装済完成品７００に備わる第２電子部品１０
１−２、１０５−２側に第１基板２６０もしくは第１基
板２６５をラミネートすることも可能となる。尚、図２
０において、１６３は、第１基板２６０もしくは第１基
板２６５の第１基板側第２回路パターン２６２と、第１
電子部品実装済部品１５０の第１回路パターン１１５と
を電気的に接続する電極である。又、上述の場合におい
て第１電子部品実装済部品１５０に対して第１基板２６
０を接合したときには、図２１に示す電子部品実装済完
成品７０４のように、第１基板２６０の第１基板側第１
回路パターン２６１に、第３電子部品である半導体素子
１０１−３及びコンデンサ部品１０５−３の実装を行う
ことも可能である。この場合、予め電子部品を実装した
上記第１基板２６５を用いることもできる。よって、上
記第３電子部品１０１−３、１０５−３の実装工程の順
番は不問である。Fourth Embodiment: In the fourth embodiment, after the first electronic component-mounted component 150 is formed, the first substrate 260 or the first substrate 265 shown in FIG. 18 is mounted on the first electronic component. When laminating to the component 150, FIG.
As in the electronic component mounted finished product 703 shown in FIG. 9, the first electronic component mounted component 150 and the first substrate 260 or the first electronic component mounted component 703.
A structure in which a bonding agent 162 such as epoxy, acrylic, an anisotropic conductive sheet, or an anisotropic conductive paste is interposed between the substrate 265 and the substrate 265 is adopted. At this time, as shown in FIG.
By increasing the thickness of the bonding agent 162, the second electronic component 10 provided in the completed electronic component mounted product 700 shown in FIG.
It is also possible to laminate the first substrate 260 or the first substrate 265 on the 1-2 and 105-2 sides. Incidentally, FIG.
0, 163 indicates the first circuit board 262 or the first circuit board side second circuit pattern 262 of the first circuit board 265 and the first circuit board 262.
It is an electrode that electrically connects the first circuit pattern 115 of the electronic component mounted component 150. In addition, in the above case, the first substrate 26 is mounted on the first electronic component mounted component 150.
When 0 is bonded, the first board-side first board 260 of the first board 260, as in the completed electronic component-mounted product 704 shown in FIG.
It is also possible to mount the semiconductor element 101-3 and the capacitor component 105-3, which are third electronic components, on the circuit pattern 261. In this case, it is possible to use the first substrate 265 on which electronic components are mounted in advance. Therefore, the order of the mounting steps of the third electronic components 101-3 and 105-3 is irrelevant.

【００４０】第５の実施の形態；第５の実施形態では、
図２２に示す電子部品実装済完成品７０５のように、上
記第３及び第４の実施形態において作製された電子部品
実装済完成品７０２、７０３、７０４において、これら
のそれぞれに備わる第１電子部品実装済部品１５０の回
路形成面１４１に対向する対向面１４２側から、ポリエ
チレンフタレート、塩化ビニル、ポリカーボネイト、ア
クリロニトリルブタジエン、ポリイミド、及びエポキシ
等の電気的絶縁性を有する第２樹脂基材１６１を用いて
第１電子部品実装済部品１５０をラミネート処理する。
これにて、第２樹脂基材１６１を第１電子部品実装済部
品１５０に熱融着した電子部品実装済完成品７０５を作
製することができる。このように第２樹脂基材１６１に
てラミネート処理することで、上記第２実施形態の場合
と同様に、第１樹脂基材１４０内に埋設されている半導
体素子１０１−１及びコンデンサ部品１０５−１が第２
樹脂基材１６１で封止されているため、耐湿性の点で優
れたモジュールを提供することができる。Fifth Embodiment; In the fifth embodiment,
Like the electronic component-mounted finished product 705 shown in FIG. 22, in the electronic component-mounted finished products 702, 703, and 704 produced in the third and fourth embodiments, the first electronic component provided in each of them Using the second resin base material 161 having electrical insulation such as polyethylene phthalate, vinyl chloride, polycarbonate, acrylonitrile butadiene, polyimide, and epoxy from the side of the facing surface 142 that faces the circuit forming surface 141 of the mounted component 150. The first electronic component mounted component 150 is laminated.
In this way, the electronic component mounted completed product 705 in which the second resin base material 161 is heat-sealed to the first electronic component mounted component 150 can be manufactured. By performing the laminating process with the second resin base material 161, the semiconductor element 101-1 and the capacitor component 105-embedded in the first resin base material 140, as in the case of the second embodiment. 1 is second
Since it is sealed with the resin base material 161, a module excellent in moisture resistance can be provided.

【００４１】第６の実施の形態；第６の実施形態では、
図２３に示すように、第１樹脂基材１４０の両面に回路
パターンを形成した電子部品実装済部品１５４を用いる
点で上述の第１〜第５の実施の形態とは異なる。上記電
子部品実装済部品１５４の形成は、上述した第１電子部
品実装済部品１５０の形成方法と同様であるが、第１樹
脂基材１４０の厚み方向に沿って該第１樹脂基材１４０
を貫通したスルーホール１１７を有する。該スルーホー
ル１１７の形成は、金型によるプレスや、ＮＣパンチャ
ーを用いて行う。スルーホール１１７には、第１回路パ
ターン１１５を形成する際に導電性材料が充填され、そ
の後形成する第２回路パターン１１６と電気的導通が図
られる。Sixth Embodiment; In the sixth embodiment,
As shown in FIG. 23, this is different from the first to fifth embodiments described above in that the electronic component mounted component 154 in which the circuit patterns are formed on both surfaces of the first resin base material 140 is used. The formation of the electronic component mounted component 154 is the same as the method of forming the first electronic component mounted component 150 described above, but the first resin substrate 140 is formed along the thickness direction of the first resin substrate 140.
Has a through hole 117 penetrating therethrough. The through hole 117 is formed by using a die press or an NC puncher. The through hole 117 is filled with a conductive material when the first circuit pattern 115 is formed, and is electrically connected to the second circuit pattern 116 that is formed thereafter.

【００４２】このようにして形成される電子部品実装済
部品１５４に対して、上述したような種々の加工を施す
ことができる。例えば、図２４に示す電子部品実装済完
成品７０６のように、上記第１回路パターン１１５に第
２電子部品として半導体素子１０１−２及びコンデンサ
部品１０５−２を実装し、さらに、上記第２回路パター
ン１１６に第３電子部品に相当する半導体素子１０１−
３及びコンデンサ部品１０５−３を実装することができ
る。尚、上記第２電子部品及び第３電子部品の実装順の
前後は特に限定するものではない。The electronic component-mounted component 154 thus formed can be subjected to various processes as described above. For example, as in the completed electronic component mounted product 706 shown in FIG. 24, the semiconductor element 101-2 and the capacitor component 105-2 are mounted as the second electronic component on the first circuit pattern 115, and the second circuit is further provided. The pattern 116 has a semiconductor element 101-corresponding to the third electronic component.
3 and the capacitor component 105-3 can be mounted. The order before and after the mounting order of the second electronic component and the third electronic component is not particularly limited.

【００４３】又、図２３に示す電子部品実装済部品１５
４では、上記対向面１４２に第２回路パターン１１６を
形成しているが、第２回路パターン１１６は形成せず
に、上記スルーホール１１７を第１回路パターン１１５
に電気的に接続した電子部品実装済部品１５５を形成す
ることもできる。該電子部品実装済部品１５５を用いる
ことで、図２５に示す電子部品実装済完成品７０７を構
成することもできる。該電子部品実装済完成品７０７で
は、電子部品実装済部品１５５を構成する第１樹脂基材
１４０の対向面１４２側に、上述の第１基板２６０と同
じ構成にてなる第２基板２７０を配置し、該第２基板２
７０の第２基板側第２回路パターン２６２と上記スルー
ホール１１７とを電気的に接続する。このとき、電子部
品実装済部品１５５には第２電子部品１０１−２、１０
５−２が実装されていてもよいし、その後に実装しても
よい。又、第２基板２７０の第２基板側第１回路パター
ン２７１には第３電子部品としての半導体素子１０１−
３、及びコンデンサ部品１０１−３が実装されていても
よいし、その後に実装してもよい。Also, the electronic component mounted component 15 shown in FIG.
4, the second circuit pattern 116 is formed on the facing surface 142, but the second circuit pattern 116 is not formed and the through hole 117 is formed in the first circuit pattern 115.
It is also possible to form the electronic component mounted component 155 electrically connected to the. By using the electronic component mounted component 155, the electronic component mounted component 707 shown in FIG. 25 can be configured. In the completed electronic component-mounted product 707, the second substrate 270 having the same configuration as the above-described first substrate 260 is arranged on the facing surface 142 side of the first resin base material 140 that constitutes the electronic component-mounted component 155. Then, the second substrate 2
The second circuit pattern 262 on the second substrate side of 70 and the through hole 117 are electrically connected. At this time, the second electronic components 101-2 and 10 are included in the electronic component mounted component 155.
5-2 may be mounted, or may be mounted after that. In addition, the second substrate-side first circuit pattern 271 of the second substrate 270 has a semiconductor element 101-as a third electronic component.
3 and the capacitor component 101-3 may be mounted, or may be mounted after that.

【００４４】又、上記電子部品実装済部品１５５を用い
て図２６に示すような電子部品実装済完成品７０８を構
成することもできる。該電子部品実装済完成品７０８で
は、電子部品実装済部品１５５をその厚み方向の両側か
ら第１基板２６０及び第２基板２７０にてラミネート処
理した形態である。電子部品実装済部品１５５に取り付
けられる第１基板２６０及び第２基板２７０には、第２
電子部品１０１−２、１０５−２、及び第３電子部品１
０１−３、１０５−３が実装済であっても良いし、取り
付け後に実装してもよい。Further, the electronic component mounted component 155 may be used to form an electronic component mounted component 708 as shown in FIG. The completed electronic component-mounted product 708 is a form in which the electronic component-mounted component 155 is laminated on the first substrate 260 and the second substrate 270 from both sides in the thickness direction. The first substrate 260 and the second substrate 270 attached to the electronic component mounted component 155 have a second
Electronic components 101-2, 105-2 and third electronic component 1
01-3 and 105-3 may be already mounted, or may be mounted after mounting.

【００４５】さらに又、上記電子部品実装済部品１５５
を用いて図２７に示すような電子部品実装済完成品７０
９を構成することもできる。該電子部品実装済完成品７
０９は、上記電子部品実装済完成品７０８において、図
１９を参照して説明した電子部品実装済完成品７０３の
ように、電子部品実装済部品１５５と第１基板２６０と
の接合を接合剤１６２にて行った構成である。このよう
に図２３に示す電子部品実装済部品１５４及び図２５に
示す電子部品実装済部品１５５と、図９から図２２を参
照して説明した各種形態との組み合わせにてなる種々の
形態を採ることができる。よって、図２４から図２７は
その全ての組み合わせを示したものではない。Furthermore, the electronic component mounted component 155 is mounted.
27 using the electronic component mounted completed product 70 as shown in FIG.
9 can also be configured. Completed product with electronic components mounted 7
In the electronic component mounted finished product 708, the bonding agent 162 is used to bond the electronic component mounted component 155 and the first substrate 260 to each other, as in the electronic component mounted finished product 703 described with reference to FIG. It is the configuration performed in. As described above, the electronic component-mounted component 154 shown in FIG. 23 and the electronic component-mounted component 155 shown in FIG. 25 are combined with the various components described with reference to FIGS. 9 to 22 to take various forms. be able to. Therefore, FIGS. 24 to 27 do not show all the combinations.

【００４６】第７の実施の形態 第７の実施形態における、図２８に示す電子部品実装済
部品３００は、図２５を参照して説明した電子部品実装
済部品１５５をその厚み方向に複数、積層しラミネート
処理した構造を有する。上記ラミネート処理の条件は、
例えばポリエチレンテレフタレート製の第１樹脂基材１
４０を用いた場合、圧力３０×１０５Ｐａ、温度１６０
℃、昇圧時間１分、圧力保持時問１分である。上述のよ
うにして形成される電子部品実装済部品３００に対して
は、半導体素子１０１及びコンデンサ部品１０５を実装
したり、第１基板２６０もしくは半導体素子１０１及び
コンデンサ部品１０５が実装済である図１８に示す第１
基板２６５を接合したり、上述の第６実施形態と同様
に、種々の組み合わせを実施することができる。このよ
うな組み合わせにより作製された電子部品実装済完成品
の一例としての電子部品実装済完成品７１０を図２９に
示す。Seventh Embodiment In the seventh embodiment, the electronic component-mounted component 300 shown in FIG. 28 is formed by stacking a plurality of electronic component-mounted components 155 described with reference to FIG. 25 in the thickness direction. It has a laminated structure. The conditions for the above laminating treatment are:
For example, a first resin base material 1 made of polyethylene terephthalate
When 40 is used, the pressure is 30 × 10 5 Pa and the temperature is 160
C, pressure rise time 1 minute, pressure hold time 1 minute. The semiconductor element 101 and the capacitor component 105 are mounted on the electronic component mounted component 300 formed as described above, or the first substrate 260 or the semiconductor element 101 and the capacitor component 105 are mounted. First shown in
It is possible to bond the substrates 265 and to carry out various combinations as in the sixth embodiment. FIG. 29 shows an electronic component-mounted finished product 710 as an example of an electronic component-mounted finished product produced by such a combination.

【００４７】第８の実施の形態上述した第１〜第７の実
施の形態では、第１樹脂基材１４０に対して、半導体素
子１０１−１及びコンデンサ部品１０５−１を埋設する
工程を有していたが、半導体素子１０１及びコンデンサ
部品１０５の電子部品を射出成型等により、予め樹脂基
材内にモールドした基材を用いることもできる。そして
該基材に対して、回路パターンを形成し、電子部品実装
済部品１５０等を形成しても良い。又、図３０に示すよ
うに、第１樹脂基材１４０に対して、半導体素子１０１
−１及びコンデンサ部品１０５−１を埋設した後の、又
は上述のように電子部品が埋設済の電子部品実装済部品
１５０等において、半導体素子１０１−１のバンプ１１
３、及びコンデンサ部品１０５−１の電極１０６が回路
形成面１４１より露出していない場合には、回路形成面
１４１について研磨及びプラズマエッチング等を行い、
バンプ１１３及び電極１０６を回路形成面１４１に露出
させた後、回路パターンの形成を行うようにすることも
できる。Eighth Embodiment In the above-described first to seventh embodiments, there is a step of burying the semiconductor element 101-1 and the capacitor component 105-1 in the first resin base material 140. However, it is also possible to use a base material in which electronic components such as the semiconductor element 101 and the capacitor component 105 are previously molded in a resin base material by injection molding or the like. Then, a circuit pattern may be formed on the base material to form the electronic component mounted component 150 and the like. In addition, as shown in FIG. 30, the semiconductor element 101 is attached to the first resin substrate 140.
-1 and the capacitor component 105-1 are embedded, or in the electronic component mounted component 150 in which the electronic component is embedded as described above, the bump 11 of the semiconductor element 101-1
3 and the electrode 106 of the capacitor component 105-1 is not exposed from the circuit forming surface 141, the circuit forming surface 141 is polished and plasma-etched,
It is also possible to form the circuit pattern after exposing the bumps 113 and the electrodes 106 on the circuit formation surface 141.

【００４８】[0048]

【発明の効果】以上詳述したように本発明の第１態様及
び第２態様における、電子部品実装済完成品の製造方
法、及び第３態様の電子部品実装済完成品によれば、基
材内に第１電子部品を埋設した電子部品実装済部品に第
２電子部品を実装することから、上記基材の厚み分、電
子部品実装済完成品の厚みを薄くすることができ、薄型
化が要求される最近の製品ニーズを満足することが可能
となる。又、第２電子部品は基材上の回路パターンに表
面実装することから、ワイヤボンディング用の電極を電
子部品の外周部に出しておく必要がなく、任意のサイズ
の第２電子部品を用いることができる。又、第２電子部
品の電極位置に制限が無いため、その種類が限定される
こともなくエリアパッドタイプの半導体素子を重ねるこ
とも可能である。As described in detail above, according to the first and second aspects of the present invention, the method for manufacturing an electronic component-mounted finished product and the third aspect of the electronic component-mounted finished product provide a base material. Since the second electronic component is mounted on the electronic component mounted component having the first electronic component embedded therein, the thickness of the electronic component mounted finished product can be reduced by the thickness of the above-mentioned base material, and the thickness can be reduced. It is possible to meet the recent demands for products. Further, since the second electronic component is surface-mounted on the circuit pattern on the base material, it is not necessary to expose the electrode for wire bonding to the outer peripheral portion of the electronic component, and the second electronic component of any size can be used. You can Further, since the electrode position of the second electronic component is not limited, the type thereof is not limited and area pad type semiconductor elements can be stacked.

【００４９】電子部品実装済部品の対向面側より当該電
子部品実装済部品にラミネート処理を施すことで、当該
電子部品実装済部品内に埋設した第１電子部品を封止す
ることができ、耐湿性のより優れたモジュールを提供す
ることができる。By laminating the electronic component-mounted component from the facing surface side of the electronic component-mounted component, the first electronic component embedded in the electronic component-mounted component can be sealed and moisture resistant. It is possible to provide a module having a superior property.

【００５０】第１基板及び第２基板を備えるとき、これ
らの基板は、従来からの一般的な回路基板を用いること
ができ、従来からの表面実装における印刷技術、及びリ
フロー技術が適用可能であり、モジュール形成の難易度
を下げることができる。When the first substrate and the second substrate are provided, conventional general circuit boards can be used for these substrates, and the conventional surface mounting printing technology and reflow technology can be applied. The difficulty of module formation can be reduced.

【００５１】さらに上記電子部品実装済部品の上記基材
に導電性の貫通穴を備えることで、当該基材を両面実装
可能とする。よって、上記第２電子部品、上記第１基
板、及び第２基板と、上記電子部品実装済部品との種々
の接合形態を採ることが可能となる。Further, by providing a conductive through hole in the base material of the electronic component mounted component, the base material can be mounted on both sides. Therefore, it is possible to adopt various joining forms of the second electronic component, the first substrate, the second substrate, and the electronic component mounted component.

【００５２】又、第１基板及び第２基板と、上記電子部
品実装済部品との接合を接合剤にて行うことで、容易に
接合動作を行うことができる。又、基材内に埋設した第
１電子部品の電極を回路形成面に露出させるようにする
ことで、第１電子部品と第１回路パターンとを確実に電
気的に接続することができる。Further, the bonding operation can be easily performed by bonding the first and second substrates and the electronic component-mounted component with a bonding agent. Further, by exposing the electrodes of the first electronic component embedded in the base material to the circuit formation surface, the first electronic component and the first circuit pattern can be surely electrically connected.

【図面の簡単な説明】[Brief description of drawings]

【図１】 本発明の実施形態における電子部品実装済完
成品を示す図である。FIG. 1 is a diagram showing a completed electronic component-mounted product according to an embodiment of the present invention.

【図２】 図１に示す電子部品実装済完成品に備わる半
導体素子の図である。FIG. 2 is a diagram of a semiconductor element included in the completed electronic component mounted product shown in FIG.

【図３】 図１に示す電子部品実装済完成品に備わるコ
ンデンサ部品の図である。FIG. 3 is a diagram of a capacitor component included in the completed electronic component-mounted product shown in FIG.

【図４】 図１に示す電子部品実装済完成品の製造工程
を示す図であり、基材上に第１電子部品を載置した状態
を示す図である。FIG. 4 is a diagram showing a manufacturing process of the completed electronic component-mounted product shown in FIG. 1, showing a state in which a first electronic component is placed on a base material.

【図５】 図１に示す電子部品実装済完成品の製造工程
を示す図であり、基材内へ第１電子部品を埋設する動作
を説明する図である。FIG. 5 is a diagram showing a manufacturing process of the completed electronic component-mounted product shown in FIG. 1, and a diagram for explaining the operation of burying the first electronic component in the base material.

【図６】 図１に示す電子部品実装済完成品の製造工程
を示す図であり、基材内に第１電子部品を埋設した状態
を示す図である。FIG. 6 is a diagram showing a manufacturing process of the completed electronic component-mounted product shown in FIG. 1, and is a diagram showing a state in which a first electronic component is embedded in a base material.

【図７】 図１に示す電子部品実装済完成品の製造工程
を示す図であり、基材上に第１回路パターンを形成した
状態を示す図である。FIG. 7 is a diagram showing a manufacturing process of the completed electronic component-mounted product shown in FIG. 1, and is a diagram showing a state in which a first circuit pattern is formed on a base material.

【図８】 図１に示す電子部品実装済完成品の製造工程
を示すフローチャートである。8 is a flowchart showing a manufacturing process of the electronic component-mounted completed product shown in FIG. 1. FIG.

【図９】 図１に示す電子部品実装済完成品の変形例に
おける製造工程を示す図であり、基材の対向面側をラミ
ネート処理する状態を示す図である。FIG. 9 is a diagram showing a manufacturing process in a modified example of the completed electronic component-mounted product shown in FIG. 1, and is a diagram showing a state in which the facing surface side of the base material is laminated.

【図１０】 図９に示すラミネート処理を行うための装
置の変形例を示す図である。FIG. 10 is a diagram showing a modified example of the apparatus for performing the laminating process shown in FIG.

【図１１】 図９に示すラミネート処理の変形例を示す
図である。FIG. 11 is a diagram showing a modification of the laminating process shown in FIG. 9.

【図１２】 図９及び図１０に示すラミネート処理にて
作製された電子部品実装済部品を示す図である。FIG. 12 is a diagram showing electronic component-mounted components manufactured by the laminating process shown in FIGS. 9 and 10;

【図１３】 図１１に示すラミネート処理にて作製され
た電子部品実装済部品を示す図である。13 is a diagram showing electronic component-mounted components manufactured by the laminating process shown in FIG.

【図１４】 図１２に示す電子部品実装済部品に第２電
子部品が実装された電子部品実装済完成品の図である。14 is a diagram of a completed electronic component-mounted product in which a second electronic component is mounted on the electronic component-mounted component shown in FIG.

【図１５】 図７に示す電子部品実装済部品の第１回路
パターンに第１基板を接合する工程を示す図である。FIG. 15 is a diagram showing a process of joining the first substrate to the first circuit pattern of the electronic component-mounted component shown in FIG. 7.

【図１６】 図７に示す電子部品実装済部品の第１回路
パターンに第１基板を接合した電子部品実装済部品を示
す図である。16 is a diagram showing an electronic component-mounted component obtained by joining a first substrate to the first circuit pattern of the electronic component-mounted component shown in FIG. 7.

【図１７】 図１６に示す電子部品実装済部品に第２電
子部品を実装した電子部品実装済完成品を示す図であ
る。17 is a diagram showing an electronic component mounted completed product in which a second electronic component is mounted on the electronic component mounted component shown in FIG.

【図１８】 第２電子部品を実装した第１基板を示す図
である。FIG. 18 is a diagram showing a first substrate on which a second electronic component is mounted.

【図１９】 図７に示す電子部品実装済部品の第１回路
パターンに接合剤にて電子部品付の第１基板を接合した
電子部品実装済部品を示す図である。19 is a diagram showing an electronic component-mounted component in which a first circuit pattern of the electronic component-mounted component shown in FIG. 7 is bonded to a first substrate with an electronic component by a bonding agent.

【図２０】 図１に示す電子部品実装済完成品の第２電
子部品に接合剤にて第１基板を接合した電子部品実装済
部品を示す図である。20 is a diagram showing an electronic component-mounted component in which the first substrate is bonded to the second electronic component of the completed electronic component-mounted product shown in FIG. 1 with a bonding agent.

【図２１】 図２０に示す電子部品実装済部品に第３電
子部品を実装した電子部品実装済完成品を示す図であ
る。FIG. 21 is a diagram showing an electronic component mounted completed product in which a third electronic component is mounted on the electronic component mounted component shown in FIG. 20.

【図２２】 図１９に示す電子部品実装済完成品の基材
の対向面にラミネート処理を施した電子部品実装済完成
品を示す図である。22 is a diagram showing a completed electronic component-mounted product in which the facing surface of the base material of the electronic component mounted-completed product shown in FIG. 19 is laminated.

【図２３】 図７に示す電子部品実装済部品の基材の対
向面に第２回路パターンを形成した電子部品実装済部品
を示す図である。FIG. 23 is a diagram showing an electronic component-mounted component in which a second circuit pattern is formed on the facing surface of the base material of the electronic component-mounted component shown in FIG. 7.

【図２４】 図２３に示す電子部品実装済部品の第１及
び第２の回路パターンに電子部品を実装した電子部品実
装済完成品を示す図である。FIG. 24 is a diagram showing an electronic component mounted completed product in which electronic components are mounted on the first and second circuit patterns of the electronic component mounted component shown in FIG. 23.

【図２５】 図１に示す電子部品実装済完成品の基材に
導電性貫通穴を設け、さらに基材の対向面に図１８に示
すような第２基板を装着してなる電子部品実装済完成品
を示す図である。FIG. 25 is an electronic component-mounted product in which conductive base holes are provided in the base material of the completed electronic component-mounted product shown in FIG. 1 and a second substrate as shown in FIG. It is a figure which shows a finished product.

【図２６】 図１７に示す電子部品実装済完成品の基材
に導電性貫通穴を設け、さらに基材の対向面に図１８に
示すような第２基板を装着した電子部品実装済完成品を
示す図である。FIG. 26 is a completed electronic component mounted product in which conductive base holes are provided in the base material of the electronic component mounted finished product shown in FIG. 17, and a second substrate as shown in FIG. FIG.

【図２７】 図１９に示す電子部品実装済完成品の基材
に導電性貫通穴を設け、さらに基材の対向面に図１８に
示すような第２基板を装着した電子部品実装済完成品を
示す図である。FIG. 27 is a completed electronic component mounted product in which conductive through holes are provided in the base material of the electronic component mounted completed product shown in FIG. 19 and a second substrate as shown in FIG. FIG.

【図２８】 図７に示す電子部品実装済部品の基材に導
電性貫通穴を設けてなる電子部品実装済部品を複数積層
してなる電子部品実装済部品を示す図である。FIG. 28 is a diagram showing an electronic component-mounted component obtained by stacking a plurality of electronic component-mounted components that are provided with conductive through holes in the base material of the electronic component-mounted component shown in FIG. 7.

【図２９】 図２８に示す電子部品実装済部品の第１回
路パターンに第２電子部品を実装し、さらに該電子部品
実装済部品の基材の対向面に図１８に示すような第２基
板を装着してなる電子部品実装済完成品を示す図であ
る。29 is a plan view of the electronic component mounted component shown in FIG. 28, in which a second electronic component is mounted on the first circuit pattern, and a second substrate as shown in FIG. It is a figure which shows the electronic component mounted completed product which mounts.

【図３０】 基材に埋め込まれている第１電子部品の電
極が上記基材から露出していない場合を示す図である。FIG. 30 is a diagram showing a case where the electrode of the first electronic component embedded in the base material is not exposed from the base material.

【図３１】 従来の電子部品実装済完成品の図である。FIG. 31 is a diagram of a conventional completed electronic component mounted product.

【図３２】 従来の電子部品実装済完成品の製造工程を
示すフローチャートである。FIG. 32 is a flowchart showing a manufacturing process of a conventional completed electronic component mounted product.

【符号の説明】[Explanation of symbols]

１０１…半導体素子、１０５…コンデンサ部品、１０６
…電極、１１３…バンプ、１１５…第１回路パターン、
１１６…第２回路パターン、１１７…貫通穴、１４０…
基材、１４１…回路形成面、１４２…対向面、１５０…
第１電子部品実装済部品、２６０…第１基板、２６１…
第１基板側第１回路パターン、２６２…第１基板側第２
回路パターン、２６３…第１基板貫通穴、２６４…厚み
方向、２７０…第２基板、２７１…第２基板側第１回路
パターン、２７２…第２基板側第２回路パターン、２７
３…第２基板貫通穴。101 ... Semiconductor element, 105 ... Capacitor component, 106
... electrodes, 113 ... bumps, 115 ... first circuit pattern,
116 ... Second circuit pattern 117 ... Through hole, 140 ...
Base material, 141 ... Circuit forming surface, 142 ... Opposing surface, 150 ...
First electronic component mounted component 260 ... First substrate, 261 ...
First substrate side first circuit pattern, 262 ... First substrate side second
Circuit pattern, 263 ... First substrate through hole, 264 ... Thickness direction, 270 ... Second substrate, 271 ... Second substrate side first circuit pattern, 272 ... Second substrate side second circuit pattern, 27
3 ... Second substrate through hole.

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.7 識別記号 ＦＩ テーマコート゛(参考） Ｈ０５Ｋ 3/28 Ｈ０５Ｋ 3/46 Ｎ 3/32 Ｑ 3/34 ５０７ Ｈ０１Ｌ 25/08 Ｚ 3/46 Ｆターム(参考） 5E314 AA24 AA32 AA36 AA37 BB02 BB11 CC15 FF05 FF13 FF14 FF21 GG01 5E319 AA03 AA08 AA09 AB06 AC02 AC11 BB05 CC33 CC61 CD11 CD26 GG01 GG20 5E336 AA07 AA08 AA14 BB02 BB03 CC32 CC53 CC58 GG30 5E343 AA02 AA12 AA17 AA18 BB24 BB25 BB28 BB44 BB72 DD03 DD23 DD33 GG11 GG20 5E346 AA02 AA12 AA15 AA43 BB16 CC02 CC08 CC09 CC10 CC32 CC34 CC37 CC39 DD02 DD16 DD22 DD33 DD34 DD45 EE01 FF18 GG13 GG15 GG19 GG25 GG28 HH24 HH32 ─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. 7 Identification code FI theme code (reference) H05K 3/28 H05K 3/46 N 3/32 Q 3/34 507 H01L 25/08 Z 3/46 F term (Reference) 5E314 AA24 AA32 AA36 AA37 BB02 BB11 CC15 FF05 FF13 FF14 FF21 GG01 5E319 AA03 AA08 AA09 AB06 AC02 AC11 BB05 CC33 CC61 CD11 CD26 GG01 GG20 5E336 AA 5 A336 AA08 AA24 BB02 ABB24A25 DD03 DD23 DD33 GG11 GG20 5E346 AA02 AA12 AA15 AA43 BB16 CC02 CC08 CC09 CC10 CC32 CC34 CC37 CC39 DD02 DD16 DD22 DD33 DD34 DD45 EE01 FF18 GG13 GG15 GG19 GG25 GG28 HH24 HH32

Claims (18)

【特許請求の範囲】[Claims] 【請求項１】 基材（１４０）内へ第１電子部品（１０
１−１、１０５−１）を埋設し、該埋設された上記第１
電子部品の電極（１１３、１０６）と電気的に接続する
第１回路パターン（１１５）を上記基材の回路形成面
（１４１）に形成して上記電極と上記第１回路パターン
との電気的接続を行った電子部品実装済部品（１５０）
を作製した後、 上記電子部品実装済部品における上記基材の上記第１回
路パターン上に第２電子部品（１０１−２、１０５−
２）を実装することを特徴とする、電子部品実装済完成
品の製造方法。1. A first electronic component (10) into a substrate (140).
1-1, 105-1) is embedded, and the embedded first
A first circuit pattern (115) electrically connected to the electrodes (113, 106) of the electronic component is formed on the circuit forming surface (141) of the base material to electrically connect the electrodes to the first circuit pattern. Electronic component mounted parts (150)
After producing the second electronic component (101-2, 105-) on the first circuit pattern of the base material in the electronic component mounted component.
2. A method for manufacturing a completed electronic component-mounted product, which comprises mounting 2). 【請求項２】 上記電子部品実装済部品の作製後、上記
第２電子部品の実装前に、上記電子部品実装済部品の上
記回路形成面に対向する対向面（１４２）側より上記電
子部品実装済部品のラミネート処理を行う、請求項１記
載の電子部品実装済完成品の製造方法。2. The electronic component mounting from the side of the facing surface (142) facing the circuit forming surface of the electronic component mounted component after the electronic component mounted component is manufactured and before the second electronic component is mounted. The method for manufacturing a completed electronic component-mounted product according to claim 1, wherein the finished component is laminated. 【請求項３】 互いに対向する第１基板側第１回路パタ
ーン（２６１）及び第１基板側第２回路パターン（２６
２）並びに上記第１基板側第１回路パターン及び上記第
１基板側第２回路パターンを電気的に接続する第１基板
貫通穴（２６３）を有する第１基板（２６０）の上記第
１基板側第２回路パターンと、上記電子部品実装済部品
における上記第２電子部品とが電気的に接続するように
上記電子部品実装済部品及び上記第１基板を互いの厚み
方向（２６４）にさらに重ね合わせる、請求項１又は２
記載の電子部品実装済完成品の製造方法。3. A first circuit board-side first circuit pattern (261) and a first circuit board-side second circuit pattern (26) facing each other.
2) and the first substrate side of the first substrate (260) having the first substrate through hole (263) electrically connecting the first substrate side first circuit pattern and the first substrate side second circuit pattern. The electronic component-mounted component and the first board are further overlapped with each other in the thickness direction (264) so that the second circuit pattern and the second electronic component of the electronic component-mounted component are electrically connected. , Claim 1 or 2
The manufacturing method of the completed electronic component-mounted product described. 【請求項４】 上記基材は、厚み方向に当該基材を貫通
し導電性を有して上記第１回路パターンに電気的に接続
する貫通穴（１１７）を有する、請求項１から３のいず
れかに記載の電子部品実装済完成品の製造方法。4. The base material according to claim 1, wherein the base material has a through hole (117) penetrating the base material in a thickness direction and having conductivity to electrically connect to the first circuit pattern. A method for manufacturing a finished product with electronic components mounted according to any one of the items. 【請求項５】 互いに対向する第２基板側第１回路パタ
ーン（２７１）及び第２基板側第２回路パターン（２７
２）並びに上記第２基板側第１回路パターン及び上記第
２基板側第２回路パターンを電気的に接続する第２基板
貫通穴（２７３）を有する第２基板（２７０）の上記第
２基板側第２回路パターンと、上記基材の上記貫通穴と
が電気的に接続するように上記電子部品実装済部品及び
上記第２基板を互いの厚み方向（２６４）に重ね合わ
せ、その後、上記第２基板側第１回路パターンに第３電
子部品（１０１−３、１０５−３）を実装する、請求項
４記載の電子部品実装済完成品の製造方法。5. A second circuit board-side first circuit pattern (271) and a second circuit board-side second circuit pattern (27) facing each other.
2) and the second substrate side of the second substrate (270) having the second substrate through hole (273) electrically connecting the second substrate side first circuit pattern and the second substrate side second circuit pattern. The electronic component-mounted component and the second substrate are overlapped with each other in the thickness direction (264) so that the second circuit pattern and the through hole of the base material are electrically connected, and then the second component The method for manufacturing a completed electronic component-mounted product according to claim 4, wherein the third electronic component (101-3, 105-3) is mounted on the board-side first circuit pattern. 【請求項６】 さらに上記電子部品実装済部品は、上記
回路形成面に対向する対向面（１４２）に上記導電性貫
通穴と電気的に接続される第２回路パターン（１１６）
を有する、請求項４記載の電子部品実装済完成品の製造
方法。6. The second circuit pattern (116) of the electronic component-mounted component further electrically connected to the conductive through hole on a facing surface (142) facing the circuit forming surface.
The method for manufacturing a completed product with an electronic component mounted thereon according to claim 4, further comprising: 【請求項７】 上記第２回路パターン上に第３電子部品
（１０１−３、１０５−３）を実装する、請求項６記載
の電子部品実装済完成品の製造方法。7. The method for manufacturing a completed electronic component-mounted product according to claim 6, wherein the third electronic component (101-3, 105-3) is mounted on the second circuit pattern. 【請求項８】 上記導電性貫通穴を有する上記電子部品
実装済部品を複数積層し、該積層された電子部品実装済
部品と上記第２基板とを重ね合わせる、請求項５記載の
電子部品実装済完成品の製造方法。8. The electronic component mounting according to claim 5, wherein a plurality of the electronic component mounted components having the conductive through holes are laminated, and the laminated electronic component mounted components are superposed on the second substrate. Method for manufacturing finished products. 【請求項９】 基材（１４０）内へ第１電子部品（１０
１−１、１０５−１）を埋設し、該埋設された上記第１
電子部品の電極（１１３、１０６）と電気的に接続する
第１回路パターン（１１５）を上記基材の回路形成面
（１４１）に形成して上記電極と上記第１回路パターン
との電気的接続を行った電子部品実装済部品（１５０）
を作製した後、 互いに対向する第１基板側第１回路パターン（２６１）
及び第１基板側第２回路パターン（２６２）並びに上記
第１基板側第１回路パターン及び上記第１基板側第２回
路パターンを電気的に接続する第１基板貫通穴（２６
３）を有する第１基板（２６０）の上記第１基板側第２
回路パターンと上記第１回路パターンとが電気的に接続
するように上記電子部品実装済部品及び上記第１基板を
互いの厚み方向（２６４）に重ね合わせる、ことを特徴
とする電子部品実装済完成品の製造方法。9. A first electronic component (10) into a substrate (140).
1-1, 105-1) is embedded, and the embedded first
A first circuit pattern (115) electrically connected to the electrodes (113, 106) of the electronic component is formed on the circuit forming surface (141) of the base material to electrically connect the electrodes to the first circuit pattern. Electronic component mounted parts (150)
After manufacturing, the first circuit board-side first circuit patterns (261) facing each other
And a second circuit pattern (262) on the first substrate side, and a first substrate through hole (26) for electrically connecting the first circuit pattern on the first substrate side and the second circuit pattern on the first substrate side.
3), the first substrate-side second of the first substrate (260)
Completed electronic component mounting, characterized in that the electronic component mounted component and the first substrate are superposed in the mutual thickness direction (264) so that the circuit pattern and the first circuit pattern are electrically connected. Method of manufacturing goods. 【請求項１０】 上記電子部品実装済部品及び上記第１
基板を互いに重ね合わせて上記第１基板側第２回路パタ
ーンと上記第１回路パターンとを電気的に接続した後、
上記第１基板側第１回路パターンに第２電子部品（１０
１−２、１０５−２）を実装する、請求項９記載の電子
部品実装済完成品の製造方法。10. The electronic component-mounted component and the first component
After the substrates are overlapped with each other and the second circuit pattern on the first substrate side and the first circuit pattern are electrically connected,
The second electronic component (10
1-2, 105-2) are mounted, The manufacturing method of the electronic component mounted completed product of Claim 9. 【請求項１１】 上記第１基板側第１回路パターンに
は、第２電子部品（１０１−２、１０５−２）が予め実
装済である、請求項９記載の電子部品実装済完成品の製
造方法。11. Manufacture of a completed electronic component-mounted product according to claim 9, wherein a second electronic component (101-2, 105-2) is already mounted on the first circuit board-side first circuit pattern. Method. 【請求項１２】 上記電子部品実装済部品の作製後、上
記電子部品実装済部品の上記回路形成面に対向する対向
面（１４２）側より上記電子部品実装済部品のラミネー
ト処理を行い、該ラミネート処理済の上記電子部品実装
済部品における上記第１回路パターンと上記第１基板側
第２回路パターンとの電気的接続を行う、請求項９から
１１のいずれかに記載の電子部品実装済完成品の製造方
法。12. After the electronic component-mounted component is produced, the electronic component-mounted component is laminated from the facing surface (142) side of the electronic component-mounted component facing the circuit forming surface, and the laminate is performed. The completed electronic component mounted product according to claim 9, wherein the first circuit pattern and the first circuit board side second circuit pattern in the processed electronic component mounted component are electrically connected. Manufacturing method. 【請求項１３】 上記基材は、厚み方向に当該基材を貫
通し導電性を有して上記第１回路パターンに電気的に接
続する貫通穴（１１７）を有する、請求項９から１２の
いずれかに記載の電子部品実装済完成品の製造方法。13. The base material according to claim 9, wherein the base material has a through hole (117) which penetrates the base material in a thickness direction and has electrical conductivity and is electrically connected to the first circuit pattern. A method for manufacturing a finished product with electronic components mounted according to any one of the items. 【請求項１４】 互いに対向する第２基板側第１回路パ
ターン（２７１）及び第２基板側第２回路パターン（２
７２）並びに上記第２基板側第１回路パターン及び上記
第２基板側第２回路パターンを電気的に接続する第２基
板貫通穴（２７３）を有する第２基板（２７０）の上記
第２基板側第２回路パターンと、上記基材の上記貫通穴
とが電気的に接続するように上記電子部品実装済部品及
び上記第２基板を互いの厚み方向（２６４）に重ね合わ
せ、その後、上記第２基板側第１回路パターンに第３電
子部品（１０１−３、１０５−３）を実装する、請求項
１３記載の電子部品実装済完成品の製造方法。14. A second circuit board-side first circuit pattern (271) and a second circuit board-side second circuit pattern (2) facing each other.
72) and the second substrate side of the second substrate (270) having the second substrate through holes (273) for electrically connecting the second substrate side first circuit pattern and the second substrate side second circuit pattern. The electronic component-mounted component and the second substrate are overlapped with each other in the thickness direction (264) so that the second circuit pattern and the through hole of the base material are electrically connected, and then the second component The method for manufacturing a completed electronic component-mounted product according to claim 13, wherein the third electronic component (101-3, 105-3) is mounted on the board-side first circuit pattern. 【請求項１５】 上記電子部品実装済部品と、上記第１
基板との接合は、接合剤（１６２）を介して行われる、
請求項９から１３のいずれかに記載の電子部品実装済完
成品の製造方法。15. The electronic component mounted component and the first component
Bonding with the substrate is performed via a bonding agent (162),
A method for manufacturing a completed electronic component-mounted product according to any one of claims 9 to 13. 【請求項１６】 上記電子部品実装済部品と、上記第１
基板及び第２基板との接合は、接合剤（１６２）を介し
て行われる、請求項１４記載の電子部品実装済完成品の
製造方法。16. The electronic component mounted component and the first component
The method for manufacturing a completed electronic component-mounted product according to claim 14, wherein the bonding between the substrate and the second substrate is performed via a bonding agent (162). 【請求項１７】 上記基材（１４０）内への上記第１電
子部品（１０１−１、１０５−１）の埋設後、上記第１
回路パターンの形成前に、埋設された上記第１電子部品
の上記電極を上記回路形成面に露出させる、請求項１か
ら１６のいずれかに記載の電子部品実装済完成品の製造
方法。17. After embedding the first electronic component (101-1, 105-1) in the base material (140), the first electronic component (101-1, 105-1) is embedded.
The method for manufacturing a completed electronic component-mounted product according to claim 1, wherein the electrodes of the embedded first electronic component are exposed on the circuit formation surface before the circuit pattern is formed. 【請求項１８】 請求項１から１７のいずれかに記載の
電子部品実装済完成品の製造方法にて製造されたことを
特徴とする電子部品実装済完成品。18. An electronic component-mounted completed product manufactured by the method for manufacturing an electronic component-mounted completed product according to claim 1. Description:
JP2001337728A 2001-11-02 2001-11-02 Finished product with electronic component mounted and manufacturing method thereof Withdrawn JP2003142797A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001337728A JP2003142797A (en) 2001-11-02 2001-11-02 Finished product with electronic component mounted and manufacturing method thereof
US10/285,475 US7176055B2 (en) 2001-11-02 2002-11-01 Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component
CNB02149813XA CN1204610C (en) 2001-11-02 2002-11-04 Method and device for mfg. parts after installation of electronic element
US11/653,304 US20070200217A1 (en) 2001-11-02 2007-01-16 Method and apparatus for manufacturing electronic component-mounted component, and electronic component-mounted component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001337728A JP2003142797A (en) 2001-11-02 2001-11-02 Finished product with electronic component mounted and manufacturing method thereof

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Cited By (12)

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Publication number Priority date Publication date Assignee Title
FR2864342A1 (en) * 2003-12-19 2005-06-24 3D Plus Sa Electronic components e.g. ball grid array type encapsulation packages, connecting method, involves connecting conducting zones of external outputs of components appearing on wafer`s connection surface
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WO2008155957A1 (en) * 2007-06-19 2008-12-24 Murata Manufacturing Co., Ltd. Method for manufacturing substrate with built-in component and substrate with built-in component
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US7875980B2 (en) 2004-09-01 2011-01-25 Sanyo Electric Co., Ltd. Semiconductor device having laminated structure
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Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2864342A1 (en) * 2003-12-19 2005-06-24 3D Plus Sa Electronic components e.g. ball grid array type encapsulation packages, connecting method, involves connecting conducting zones of external outputs of components appearing on wafer`s connection surface
US7875980B2 (en) 2004-09-01 2011-01-25 Sanyo Electric Co., Ltd. Semiconductor device having laminated structure
JP2006344631A (en) * 2005-06-07 2006-12-21 Murata Mfg Co Ltd Component built-in substrate
JP2007103466A (en) * 2005-09-30 2007-04-19 Toshiba Corp Multilayered printed circuit board and its manufacturing method, and electronic apparatus
JP2008211201A (en) * 2007-02-01 2008-09-11 Ngk Spark Plug Co Ltd Wiring board and semiconductor package
JP2008210961A (en) * 2007-02-26 2008-09-11 Kyocera Corp Electronic component and its manufacturing method
EP2066161A4 (en) * 2007-06-19 2010-11-17 Murata Manufacturing Co Method for manufacturing substrate with built-in component and substrate with built-in component
EP2066161A1 (en) * 2007-06-19 2009-06-03 Murata Manufacturing Co. Ltd. Method for manufacturing substrate with built-in component and substrate with built-in component
WO2008155957A1 (en) * 2007-06-19 2008-12-24 Murata Manufacturing Co., Ltd. Method for manufacturing substrate with built-in component and substrate with built-in component
JP2009049046A (en) * 2007-08-13 2009-03-05 Tdk Corp Electronic component module
JP2009033185A (en) * 2008-09-05 2009-02-12 Sanyo Electric Co Ltd Semiconductor device and its production method
JP2010267729A (en) * 2009-05-13 2010-11-25 Fujikura Ltd Wireless circuit module
JP2012015397A (en) * 2010-07-02 2012-01-19 Dainippon Printing Co Ltd Electronic module
WO2014129008A1 (en) * 2013-02-25 2014-08-28 株式会社村田製作所 Module, module components constituting same, and method for manufacturing module
US10098229B2 (en) 2013-02-25 2018-10-09 Murata Manufacturing Co., Ltd. Module, module component composing the module, and method of manufacturing the module

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