JP2001119147A - Multilayer board incorporating electronic device and production method therefor - Google Patents
Multilayer board incorporating electronic device and production method thereforInfo
- Publication number
- JP2001119147A JP2001119147A JP29302399A JP29302399A JP2001119147A JP 2001119147 A JP2001119147 A JP 2001119147A JP 29302399 A JP29302399 A JP 29302399A JP 29302399 A JP29302399 A JP 29302399A JP 2001119147 A JP2001119147 A JP 2001119147A
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- board
- component mounting
- substrate
- mounting board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【0001】[0001]
【発明の属する技術分野】本発明は、半導体集積回路装
置(LSI)や、抵抗、コンデンサなどを高密度実装し
た携帯端末装置などに適用して好適な電子部品内蔵多層
基板及びその製造方法に関する。詳しくは、LSIや、
抵抗、コンデンサなど電子部品を実装した回路基板と、
内層用の配線回路基板とを熱加圧する工程において、こ
れらの電子部品の隅々に基板間用の絶縁部材を周り込ま
せるように電子部品を封じ込んで、更なる電子部品の実
装面積を積層方向に立体的に増加できるようにすると共
に、電子部品を高密度に実装できるようにしたものであ
る。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor integrated circuit device (LSI), a multi-layer substrate with built-in electronic components suitable for application to a portable terminal device in which resistors, capacitors and the like are mounted at high density, and a method of manufacturing the same. For details,
A circuit board on which electronic components such as resistors and capacitors are mounted;
In the step of applying heat and pressure to the wiring circuit board for the inner layer, the electronic component is sealed so that the insulating member for the board is wrapped around every corner of these electronic components, and the mounting area of the electronic component is further laminated. In addition to being able to increase three-dimensionally in the direction, electronic components can be mounted at a high density.
【0002】[0002]
【従来の技術】近年、携帯電話機や、携帯用のパーソナ
ルコンピュータなどの携帯端末装置に、ベアーチップ状
の半導体集積回路装置(以下単にLSIチップという)
を実装したLSI実装基板が使用されるようになってき
た。この種の実装基板には個々のLSIチップがモール
ド成形されることなく、複数のLSIチップが実装基板
の一方の面に平面的に並べて配置され、他方の面に抵抗
や、コンデンサなどの電子部品が実装されている。2. Description of the Related Art In recent years, a portable terminal device such as a portable telephone or a portable personal computer has been used in a bare chip semiconductor integrated circuit device (hereinafter simply referred to as an LSI chip).
Has come to be used. On this type of mounting board, a plurality of LSI chips are arranged in a plane on one side of the mounting board without molding individual LSI chips, and electronic components such as resistors and capacitors are mounted on the other side. Has been implemented.
【0003】[0003]
【発明が解決しようとする課題】ところで、従来方式の
電子部品実装基板によれば、電子部品が平面的に並べて
配置されるので、電子部品の高密度な実装要求に対し
て、部品搭載面積に限界を生ずるに至っている。従っ
て、近年のプリント配線板の小型化、つまり、電子機器
の小型化の要求に満足できなくなってきた。According to the conventional electronic component mounting board, electronic components are arranged side by side in a plane. It has reached its limits. Therefore, it has become impossible to satisfy the recent demand for miniaturization of printed wiring boards, that is, miniaturization of electronic devices.
【0004】この種の問題に対して、技術文献である特
開平2−164096号公報の「多層電子回路基板とそ
の製造方法」には、電子回路を構成する回路素子をプリ
ント配線基板の層間に内蔵し、電子回路の高密度な実装
を図ることが記載されている。また、特開平5−343
856号公報の「多層プリント配線基板及びその製造方
法」には、電子回路などを構成するハイブリッドモジュ
ールをプリント配線基板間に挟み込み、電子回路などを
高密度に実装することが記載されている。In order to solve this kind of problem, Japanese Patent Laid-Open Publication No. 2-164096 discloses a "multilayer electronic circuit board and a method for manufacturing the same", in which circuit elements constituting an electronic circuit are placed between layers of a printed wiring board. It describes that the electronic circuit is built-in to achieve high-density mounting of electronic circuits. Also, Japanese Patent Application Laid-Open No. 5-343
Japanese Patent Publication No. 856 discloses "Multilayer Printed Wiring Board and Manufacturing Method Thereof", in which a hybrid module constituting an electronic circuit or the like is sandwiched between printed wiring boards to mount electronic circuits or the like at high density.
【0005】更に、特開平3−14293号公報の「多
層高密度実装モジュール」には、電子回路などを中間層
に内蔵したプリント配線基板を積層する際に、ハンダバ
ンプと接する面に白金、あるいはパラジウムメッキを施
すことが記載されている。いずれの技術文献も、基板間
用の絶縁部材によって電子部品を封止しては平坦化して
積層する構造が採られている。絶縁部材による封止及び
平坦化は工程数が増加し、更なる電子部品の高密度実装
の妨げとなっている。[0005] Further, in the "multilayer high-density mounting module" disclosed in JP-A-3-14293, when a printed wiring board having an electronic circuit or the like embedded in an intermediate layer is laminated, platinum or palladium is applied to a surface in contact with a solder bump. It is described that plating is performed. Each of the technical documents adopts a structure in which an electronic component is sealed with an insulating member between substrates, flattened and laminated. Sealing and flattening with an insulating member increases the number of steps and hinders further high-density mounting of electronic components.
【0006】そこで、この発明はこのような従来の課題
を解決したものであって、当該多層回路基板の薄型化方
法を工夫して、更なる電子部品の実装面積を積層方向に
立体的に増加できるようにすると共に、電子部品を高密
度に実装できるようにした電子部品内蔵多層基板及びそ
の製造方法を提供することを目的とする。In view of the above, the present invention has solved such a conventional problem. By devising a method for reducing the thickness of the multilayer circuit board, the mounting area of a further electronic component is three-dimensionally increased in the stacking direction. It is an object of the present invention to provide a multilayer board with a built-in electronic component and a method for manufacturing the same, in which the electronic component can be mounted at a high density.
【0007】[0007]
【課題を解決するための手段】上述した課題は、電子部
品と、この電子部品を実装した電子部品実装基板と、こ
の電子部品実装基板に積層されると共に、電子部品を封
じ込んだ基板間絶縁層と、この基板間絶縁層に積層され
ると共に、電子部品実装基板に電気的に接続された配線
回路基板とを備え、この基板間絶縁層は予め基板間用の
絶縁部材に電子部品の大きさとほぼ等しい収納領域が設
けられ、この収納領域に電子部品を挿入した状態で、電
子部品実装基板と配線回路基板とが熱加圧されて成るこ
とを特徴とする電子部品内蔵多層基板によって解決され
る。An object of the present invention is to provide an electronic component, an electronic component mounting substrate on which the electronic component is mounted, and an inter-substrate insulation that is laminated on the electronic component mounting substrate and encapsulates the electronic component. And a wiring circuit board laminated on the inter-substrate insulating layer and electrically connected to the electronic component mounting board, and the inter-substrate insulating layer is previously provided on the inter-substrate insulating member by the size of the electronic component. The electronic component mounting substrate and the printed circuit board are heat-pressed in a state where the electronic component is inserted into the storage region. You.
【0008】本発明に係る電子部品内蔵多層基板によれ
ば、電子部品実装基板と配線回路基板との熱加圧工程に
おいて、電子部品の隅々に基板間用の絶縁材料を周り込
ませるように電子部品を封じ込むことができる。従っ
て、更なる電子部品の実装面積を積層方向に立体的に増
加すること、及び、電子部品の高密度実装を行うことが
できる。According to the electronic component built-in multilayer board of the present invention, in the step of applying heat to the electronic component mounting board and the wiring circuit board, the insulating material for the board is spread around every corner of the electronic component. Electronic components can be encapsulated. Therefore, it is possible to three-dimensionally increase the mounting area of the electronic component in the stacking direction and to perform the high-density mounting of the electronic component.
【0009】本発明に係る電子部品内蔵多層基板の製造
方法は、電子部品を回路基板に実装して電子部品実装基
板を形成する工程と、この電子部品の大きさにほぼ等し
い収納領域を有した基板間用の絶縁部材を形成する工程
と、この収納領域と電子部品とを位置合わせをして電子
部品実装基板上に基板間用の絶縁部材を積層する工程
と、この基板間用の絶縁部材上に配線回路基板を積層す
る工程と、この電子部品実装基板、基板間用の絶縁部材
及び配線回路基板を熱加圧して貼合する工程とを有する
ことを特徴とするものである。A method of manufacturing a multilayer board with built-in electronic components according to the present invention has a process of mounting an electronic component on a circuit board to form an electronic component mounting board, and a storage area substantially equal to the size of the electronic component. A step of forming an insulating member for inter-substrate, a step of aligning the storage area with the electronic component, and a step of laminating the insulating member for inter-substrate on the electronic component mounting board; The method includes a step of laminating a printed circuit board thereon, and a step of applying heat and pressure to the electronic component mounting board, the insulating member between the boards, and the printed circuit board to bond them.
【0010】本発明に係る電子部品内蔵多層基板の製造
方法によれば、電子部品実装基板上の電子部品の隅々に
基板間用の絶縁部材を周り込ませることができるので、
電子部品実装基板と配線回路基板との間に電子部品を再
現性良く封じ込むことができる。従って、工程数を削減
化すること、更なる電子部品の実装面積を積層方向に立
体的に増加すること、及び、電子部品の高密度実装を行
うことができる。According to the method of manufacturing a multilayer board with built-in electronic components according to the present invention, an insulating member for inter-substrate can be provided around every corner of the electronic components on the electronic component mounting board.
The electronic component can be sealed between the electronic component mounting board and the printed circuit board with good reproducibility. Therefore, it is possible to reduce the number of processes, to further increase the mounting area of the electronic component three-dimensionally in the stacking direction, and to perform high-density mounting of the electronic component.
【0011】[0011]
【発明の実施の形態】続いて、この発明に係る電子部品
内蔵多層基板及びその製造方法の一実施の形態につい
て、図面を参照しながら説明をする。図1は実施形態と
しての電子部品内蔵多層基板の構成例を示す断面図であ
る。この実施形態では、LSIや、抵抗、コンデンサな
ど電子部品を実装した回路基板と、内層用の配線回路基
板とを熱加圧する工程において、これらの電子部品の隅
々に基板間用の絶縁部材を周り込ませるように電子部品
を封じ込んで、更なる電子部品の実装面積を積層方向に
立体的に増加できるようにすると共に、電子部品を高密
度に実装できるようにしたものである。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of a multilayer substrate with a built-in electronic component and a method of manufacturing the same according to the present invention will be described with reference to the drawings. FIG. 1 is a cross-sectional view illustrating a configuration example of a multilayer board with built-in electronic components as an embodiment. In this embodiment, in the step of applying heat and pressure to a circuit board on which electronic components such as an LSI, a resistor, and a capacitor are mounted and a wiring circuit board for an inner layer, an insulating member for the board is provided at every corner of these electronic components. An electronic component is sealed so as to be wrapped around, so that the mounting area of a further electronic component can be three-dimensionally increased in the stacking direction, and the electronic component can be mounted at a high density.
【0012】図1に示す電子部品内蔵多層基板100は
半導体集積回路装置(LSI)や、抵抗、コンデンサな
どの電子部品3A,3Bを高密度に実装したものであ
る。電子部品3A,3Bは厚みが数百μm程度である。
電子部品内蔵多層基板100の厚みはt0であり、その
厚みt0は電子部品3A,3Bの積層数にもよるが1m
m前後〜数mm程度である。The electronic component built-in multilayer substrate 100 shown in FIG. 1 is a device on which electronic components 3A and 3B such as a semiconductor integrated circuit device (LSI) and resistors and capacitors are mounted at a high density. The electronic components 3A and 3B have a thickness of about several hundred μm.
The thickness of the electronic component built-in multilayer substrate 100 is t0, and the thickness t0 is 1 m depending on the number of electronic components 3A and 3B stacked.
It is about m to several mm.
【0013】図1に示す電子部品内蔵多層基板100の
例では、一方の面に電子部品3Aを実装した厚みt1の
電子部品実装基板1Aが、基板間絶縁層としての多層化
接着用のプリプレグ(層)4を挟んで配線回路基板とし
ての厚みt2の内層配線基板2の一方の面に積層される
と共に、電子部品実装基板1A及び内層配線基板2間が
そのプリプレグ4により接着される。In the example of the multilayer board 100 with a built-in electronic component shown in FIG. 1, an electronic component mounting board 1A having a thickness t1 on one surface of which an electronic component 3A is mounted is a prepreg (multilayer bonding prepreg) as an inter-substrate insulating layer. The electronic component mounting board 1 </ b> A and the inner wiring board 2 are bonded by the prepreg 4 while being laminated on one surface of the inner wiring board 2 having a thickness t <b> 2 as a printed circuit board with the layer 4 interposed therebetween.
【0014】この例では、その内層配線基板2の他方の
面に、他のプリプレグ5を挟んで同様の厚みを有して、
他の電子部品実装基板1Bが積層されると共に、電子部
品実装基板1B及び内層配線基板2間がそのプリプレグ
(層)5により接着され、電子部品実装基板1A及び内
層配線基板2との間や、その内層配線基板2及び電子部
品実装基板1Bとの間には各々のプリプレグ4,5を貫
くように導電性の部材としての基板間配線部材7,8が
設けられ、この基板間配線部材7,8により電気的に接
合された多層構造を成している。In this example, the other surface of the inner wiring board 2 has a similar thickness with another prepreg 5 interposed therebetween,
The other electronic component mounting board 1B is laminated, and the electronic component mounting board 1B and the inner layer wiring board 2 are bonded by the prepreg (layer) 5, and between the electronic component mounting board 1A and the inner layer wiring board 2, Between the inner wiring board 2 and the electronic component mounting board 1B, inter-board wiring members 7, 8 as conductive members are provided so as to penetrate the respective prepregs 4, 5, and the inter-board wiring members 7, 8 are provided. 8 form a multilayer structure electrically connected.
【0015】ここで、多層とは配線パターンが形成され
る層をいう。この例で電子部品内蔵多層基板100は6
層構造を有している。プリプレグ4,5にはガラスクロ
スにエポキシ系樹脂を含浸させたものや、ポリイミド系
樹脂材料が使用される。基板間配線部材7,8には銅
や、銀などが使用される。Here, the multilayer means a layer on which a wiring pattern is formed. In this example, the multilayer board 100 with a built-in electronic component is 6
It has a layered structure. The prepregs 4 and 5 are made of glass cloth impregnated with an epoxy resin or a polyimide resin material. Copper, silver, or the like is used for the inter-substrate wiring members 7 and 8.
【0016】この例で、プリプレグ4は熱加圧工程にお
ける基板間用の絶縁材料の状態において、その厚みとほ
ぼ等しい深さの収納領域が設けられ、この収納領域に電
子部品3Aを挿入した状態で、電子部品実装基板1Aと
内層配線基板2とが熱加圧されることにより自己整合的
に熱変形したものである。プリプレグ5もその絶縁材料
の状態において、その厚みとほぼ等しい深さの収納領域
が設けられ、この収納領域に電子部品3Bを挿入した状
態で、電子部品実装基板1Bと内層配線基板2とが熱加
圧されることにより自己整合的に熱変形したものであ
る。In this example, the prepreg 4 is provided with a storage area having a depth substantially equal to the thickness thereof in a state of an insulating material between the substrates in the heat pressing step, and the electronic component 3A is inserted into the storage area. Thus, the electronic component mounting board 1A and the inner wiring board 2 are thermally deformed in a self-aligned manner by being thermally pressed. In the state of the insulating material, the prepreg 5 is also provided with a storage area having a depth substantially equal to the thickness thereof. When the electronic component 3B is inserted into the storage area, the electronic component mounting board 1B and the inner layer wiring board 2 are heated. It is thermally deformed in a self-aligned manner by being pressed.
【0017】このように、本実施形態としての電子部品
内蔵多層基板100によれば、電子部品実装基板1A,
1Bと内層配線基板2との熱加圧工程において、電子部
品3A,3Bの隅々にプリプレグ4,5を周り込ませる
ように電子部品3A,3Bを封じ込むことができる。従
って、更なる電子部品3A,3Bの実装面積を積層方向
に立体的に増加すること、及び、電子部品3A,3Bの
高密度実装を行うことができる。これにより、より多く
の電子部品3A,3Bの搭載を可能とし、同時に当該電
子部品内蔵多層基板100の小型化が図られ、これを適
用した電子機器の小型化及び多機能化を図ることができ
る。As described above, according to the electronic component built-in multilayer board 100 of the present embodiment, the electronic component mounting board 1A,
In the step of applying heat to the internal wiring board 2 by pressing the electronic components 3A and 3B, the electronic components 3A and 3B can be sealed so that the prepregs 4 and 5 are wrapped around the corners of the electronic components 3A and 3B. Therefore, the mounting area of the electronic components 3A and 3B can be three-dimensionally increased in the stacking direction, and the electronic components 3A and 3B can be mounted at a high density. Thus, more electronic components 3A and 3B can be mounted, and at the same time, the size of the multilayer substrate 100 with built-in electronic components can be reduced, and the electronic device to which the electronic component is applied can be reduced in size and multifunctional. .
【0018】続いて、電子部品内蔵多層基板100に係
る製造方法について説明をする。図2A、図2B及び図
3A、図3Bは実施形態に係る電子部品内蔵多層基板1
00の形成例(その1、2)を示す工程断面図である。
図4はその電子部品内蔵多層基板100の形成時におけ
る電子部品実装基板1の動作検査例を示すイメージ図で
ある。図5は、その電子部品内蔵多層基板100の形成
例(その3)を示す工程断面図である。Next, a description will be given of a method of manufacturing the multilayer board 100 with a built-in electronic component. FIG. 2A, FIG. 2B, FIG. 3A and FIG.
FIG. 10 is a process cross-sectional view showing a forming example (Nos. 1 and 2) of No. 00;
FIG. 4 is an image diagram showing an operation inspection example of the electronic component mounting board 1 when the electronic component built-in multilayer board 100 is formed. FIG. 5 is a process sectional view showing an example (part 3) of forming the electronic component built-in multilayer substrate 100.
【0019】この例では図1に示した2つの電子部品3
A,3Bを実装した6層構造の電子部品内蔵多層基板1
00を形成する場合を想定する。例えば、電子部品実装
基板1A、プリプレグ4、内層配線基板2、プリプレグ
5及び電子部品実装基板1Bを順に積層した電子部品内
蔵多層基板100を形成する場合を例に採る。電子部品
3には複数のバンプ電極9A,9Bなどを裏面に設けた
フリップチップ形式のLSIを使用し、内層配線基板2
には予め配線パターンなどが形成されたものを使用する
場合を例に挙げる。In this example, the two electronic components 3 shown in FIG.
A, 3B mounted multilayer board 1 with built-in electronic components of 6-layer structure
Assume that 00 is formed. For example, a case where the electronic component built-in multilayer substrate 100 in which the electronic component mounting substrate 1A, the prepreg 4, the inner layer wiring substrate 2, the prepreg 5, and the electronic component mounting substrate 1B are sequentially laminated is formed. For the electronic component 3, a flip-chip type LSI having a plurality of bump electrodes 9A, 9B and the like provided on the back surface is used.
As an example, a case where a wiring pattern or the like is formed in advance is used.
【0020】これを前提として、まず、一方で図2Aに
示す電子部品実装用の回路基板1を準備する。この回路
基板1には絶縁材料18の両面に銅箔11A,11Bを
有したもの、例えば、ガラス布基材エポキシ樹脂銅張積
層板(FR−4)などが使用される。この基板を加工し
て所定の配線パターンやラウンド電極などを形成して回
路基板1を作成する。On the premise of this, first, a circuit board 1 for mounting electronic components shown in FIG. 2A is prepared. As the circuit board 1, one having copper foils 11A and 11B on both sides of an insulating material 18, for example, a glass cloth base epoxy resin copper-clad laminate (FR-4) or the like is used. This substrate is processed to form a predetermined wiring pattern, a round electrode, and the like, thereby completing the circuit substrate 1.
【0021】例えば、基板の一方の銅箔11Aにレジス
ト材料を塗布し、その後、配線パターンやラウンド電極
などの形を象ったレチクル(例えばネガフィルムや乾
板)を使用してレジスト材料を露光し、その後、このレ
ジスト膜をマスクにして銅箔11をエッチングすること
により配線パターンや、ラウンド電極、チップマウント
用の電極などが形成される。他方の銅箔11Bにも所望
の配線パターンや、ラウンド電極などを形成する。For example, a resist material is applied to one of the copper foils 11A of the substrate, and then the resist material is exposed using a reticle (eg, a negative film or a dry plate) shaped like a wiring pattern or a round electrode. Thereafter, the copper foil 11 is etched using the resist film as a mask to form a wiring pattern, a round electrode, a chip mounting electrode, and the like. Desired wiring patterns, round electrodes, and the like are also formed on the other copper foil 11B.
【0022】また、回路基板1から動作検査用の電極が
引き出される。この動作検査用の電極は試験電圧を印可
したり、テストデータを供給したり、その結果データを
引き出すために使用される。この電極としてテスト専用
に端子を設けてもよいが、端子数を極力少なくする観点
から、本来の信号入力線や信号出力線に接続される電
極、例えば、他の回路基板への配線部材として、ラウン
ド電極にスルーホールを形成し、その内部に導電部材1
2を充填する。この導電部材12を動作検査用の電極と
して兼用するようになされる。導電部材12には銅や、
銀などが使用される。もちろん、導電材料12に関して
はこれらの種類に限定されない。回路基板1としての両
面銅箔基板には、エポキシ系の他にポリイミド系樹脂銅
張積層板や、ビスマレイミド−トリアジン(BTレジ
ン)系樹脂銅張積層板を用いてもよい。これら基板は耐
熱性や、寸法度安定性に優れている。Also, electrodes for operation inspection are drawn from the circuit board 1. The operation test electrode is used for applying a test voltage, supplying test data, and extracting data as a result. A terminal may be provided as a dedicated test electrode, but from the viewpoint of minimizing the number of terminals, an electrode connected to the original signal input line or signal output line, for example, as a wiring member to another circuit board, A through-hole is formed in the round electrode, and a conductive member 1 is formed inside the through-hole.
Fill 2 The conductive member 12 is also used as an operation inspection electrode. For the conductive member 12, copper,
Silver or the like is used. Of course, the conductive material 12 is not limited to these types. As the double-sided copper foil substrate as the circuit board 1, a polyimide resin copper-clad laminate or a bismaleimide-triazine (BT resin) resin copper-clad laminate may be used in addition to the epoxy resin. These substrates are excellent in heat resistance and dimensional stability.
【0023】その後、図2Bに示す回路基板1に電子部
品3を実装して電子部品実装基板1を形成する。電子部
品3はその裏面に設けられた複数のバンプ電極9A,9
Bと、電子部品実装基板1Aの表面に設けられた、図示
しないチップマウント用の電極とが位置合わせされた後
に、電気的かつ構造的に接合される。上述の導電材料1
2の充填とこの電子部品3の接続の順番は逆でもかまわ
ない。電子部品実装基板1はA,Bの2個形成する。Thereafter, the electronic component 3 is mounted on the circuit board 1 shown in FIG. 2B to form the electronic component mounting substrate 1. The electronic component 3 has a plurality of bump electrodes 9A, 9
B is electrically and structurally joined after the position of the chip mounting electrode (not shown) provided on the surface of the electronic component mounting board 1A is aligned. The above-described conductive material 1
The order of filling 2 and connecting the electronic component 3 may be reversed. Two electronic component mounting boards A and B are formed.
【0024】また、他方で、図3Aに示す内層配線基板
2の所定位置、つまり、電子部品実装基板1への信号線
の入出力点となる位置に、基板間配線部材7,8として
所定の長さの金属性の凸状の突起部を形成する。基板間
配線部材7,8に関しては、まず、ラウンド電極などに
スルーホールを形成し、そのスルーホールに銀や金など
の導電部材を充填し、それを核にして立体的にその金属
を凸状に突起するように形成される。このとき、電気メ
ッキ法などを適用するとよい。突起部の長さは、基板間
用の絶縁材料としてのプリプレグ4,5を貫通する程度
を有していればよい。この突起部は内層配線基板2の導
通検査用の電極として兼用される。もちろん、この突起
部は電子部品実装基板側に設けてもよい。On the other hand, at predetermined positions of the inner wiring board 2 shown in FIG. 3A, that is, at positions where input / output points of signal lines to the electronic component mounting board 1 are provided, predetermined wiring members 7 and 8 are provided as inter-board wiring members. A metallic convex protrusion having a length is formed. Regarding the inter-substrate wiring members 7 and 8, first, a through hole is formed in a round electrode or the like, and the through hole is filled with a conductive member such as silver or gold. It is formed so as to protrude. At this time, an electroplating method or the like may be applied. It is sufficient that the length of the protruding portion has such a degree as to penetrate the prepregs 4 and 5 as an insulating material between the substrates. The protrusion is also used as an electrode for inspecting conduction of the inner wiring board 2. Of course, this projection may be provided on the electronic component mounting board side.
【0025】その後、電子部品3の大きさにほぼ等しい
収納領域4Aを有した膜厚数百μm程度のプリプレグ4
を内層配線基板2の一方の面に積層すると共に、収納領
域5Aを有した膜厚数百μm程度のプリプレグ5を内層
配線基板2の他方の面に積層する。この際に、基板間配
線部材7,8の突起部によりプリプレグ4,5を貫くよ
うに積層される。これにより、図3Bに示す両面にプリ
プレグ4,5を有した内層配線基板2を形成することが
できる。Thereafter, a prepreg 4 having a storage area 4A substantially equal in size to the electronic component 3 and having a film thickness of about several hundred μm.
Is laminated on one surface of the inner wiring substrate 2, and a prepreg 5 having a storage area 5 </ b> A and having a thickness of about several hundred μm is laminated on the other surface of the inner wiring substrate 2. At this time, they are laminated so as to penetrate the prepregs 4 and 5 by the projections of the inter-board wiring members 7 and 8. As a result, the inner wiring board 2 having the prepregs 4 and 5 on both surfaces shown in FIG. 3B can be formed.
【0026】これらの電子部品実装基板1や内層配線基
板2などが形成できたら、電子部品実装基板1と内層配
線基板2とを重ね合わせる前に、図4に示すICテスタ
10などにより電子部品実装基板毎に電気的な検査を行
う。この例では1つの電子部品実装基板1を1個の回路
ブロックとして取り扱うことができ、当該電子部品内蔵
多層基板100の実装後に、電子部品実装基板1に故障
を生じた際には、その故障を起こした電子部品実装基板
1のみの交換が可能となり、メンテナンス及びその修理
が容易となる。After the electronic component mounting board 1 and the inner wiring board 2 are formed, before the electronic component mounting board 1 and the inner wiring board 2 are overlapped, the electronic component mounting is performed by the IC tester 10 shown in FIG. An electrical inspection is performed for each substrate. In this example, one electronic component mounting board 1 can be handled as one circuit block, and when a failure occurs in the electronic component mounting board 1 after mounting the electronic component built-in multilayer board 100, the failure is determined. Only the raised electronic component mounting board 1 can be replaced, and maintenance and repair thereof are facilitated.
【0027】この例で動作検査用の電極には、電子部品
実装基板1上に露出した複数の導電部材12などが使用
される。この導電部材12にICテスタ10のプローブ
13,14が一斉に接触され、回路ブロック毎にローカ
ルな実装試験が行われる。もちろん、この実装試験に関
しては、予め電子部品実装基板1などに専用に作成され
たテストデータが使用される。この例で内層配線基板2
には能動素子が実装されないので、図示しない基板間配
線部材7,8にプローブ13,14が接触され、導通試
験のみが行われる。In this example, a plurality of conductive members 12 and the like exposed on the electronic component mounting board 1 are used as the electrodes for operation inspection. The probes 13 and 14 of the IC tester 10 are simultaneously brought into contact with the conductive member 12, and a local mounting test is performed for each circuit block. Of course, for this mounting test, test data created in advance exclusively for the electronic component mounting board 1 or the like is used. In this example, the inner wiring board 2
Since no active element is mounted on the substrate, the probes 13 and 14 are brought into contact with the inter-board wiring members 7 and 8 (not shown), and only the continuity test is performed.
【0028】従って、電子部品実装基板1や内層配線基
板2を積層する前に、電子部品実装基板1の不良を早期
に除去することができる。この検査結果で良品と判定さ
れた電子部品実装基板1や内層配線基板2のみをプリプ
レグ4,5を介在して積層することができる。電子部品
実装基板1や内層配線基板2を全部積層した後に電気的
な検査を行う場合に比べて、当該電子部品内蔵多層基板
100の生産歩留まりを向上させることができる。Therefore, before the electronic component mounting board 1 and the inner wiring board 2 are stacked, defects of the electronic component mounting board 1 can be removed at an early stage. Only the electronic component mounting board 1 and the inner wiring board 2 determined to be non-defective in this inspection result can be laminated with the prepregs 4 and 5 interposed therebetween. The production yield of the electronic component built-in multilayer substrate 100 can be improved as compared with the case where the electrical inspection is performed after the electronic component mounting substrate 1 and the inner layer wiring substrate 2 are all stacked.
【0029】その後、図5に示すように、電子部品実装
基板1Aの電子部品3Aとプリプレグ4の収納領域4A
とを位置合わせすると共に、内層配線基板2からの基板
間配線部材7と電子部品実装基板1Aなどのラウンド電
極とを位置合わせする。また、電子部品実装基板1Bの
電子部品3Bとプリプレグ5の収納領域5Aとを位置合
わせすると共に、内層配線基板2からの基板間配線部材
8と電子部品実装基板1Bなどのラウンド電極とを位置
合わせする。Thereafter, as shown in FIG. 5, the electronic component 3A of the electronic component mounting board 1A and the storage area 4A of the prepreg 4 are provided.
And the inter-board wiring member 7 from the inner layer wiring board 2 and the round electrode such as the electronic component mounting board 1A are aligned. In addition, the electronic component 3B of the electronic component mounting board 1B and the storage area 5A of the prepreg 5 are aligned, and the inter-board wiring member 8 from the inner wiring board 2 and the round electrode of the electronic component mounting board 1B are aligned. I do.
【0030】そして、電子部品実装基板1Aと内層配線
基板2との間にプリプレグ4を挟み込んだ状態で、しか
も、内層配線基板2と電子部品実装基板1Bとの間にプ
リプレグ5を挟み込んだ状態で、加圧熱接合処理を施
す。この際の接合処理に関しては電子部品実装基板1
A,1B、内層配線基板2及びプリプレグ4,5を同一
の熱処理工程により加圧熱接合する。例えば、電子部品
実装基板1A、プリプレグ4、内層配線基板2、プリプ
レグ5及び電子部品実装基板1Bから成る積層物を17
0°C程度で加熱する。そして、真空プレス機などによ
り、この積層物を40kg/cm2 程度に加圧する。The prepreg 4 is sandwiched between the electronic component mounting board 1A and the inner wiring board 2, and the prepreg 5 is sandwiched between the inner wiring board 2 and the electronic component mounting board 1B. And heat and pressure bonding. Regarding the bonding process at this time, the electronic component mounting board 1
A, 1B, the inner wiring board 2, and the prepregs 4, 5 are press-bonded by the same heat treatment process. For example, a laminate composed of the electronic component mounting board 1A, the prepreg 4, the inner layer wiring board 2, the prepreg 5, and the electronic component mounting board 1B is divided into 17 layers.
Heat at about 0 ° C. Then, the laminate is pressed to about 40 kg / cm 2 by a vacuum press or the like.
【0031】これにより、電子部品実装基板1Aと内層
配線基板2とがプリプレグ4により構造的に接合され、
電子部品実装基板1Aと内層配線基板2とが、基板間配
線部材7を構成する金属がつぶれて電気的に接合され
る。これと共に、内層配線基板2と電子部品実装基板1
Bとがプリプレグ5により自己整合的に接合され、内層
配線基板2と電子部品実装基板1Bとが基板間配線部材
8を構成する金属がつぶれて電気的に接合される。As a result, the electronic component mounting board 1A and the inner wiring board 2 are structurally joined by the prepreg 4.
The electronic component mounting board 1 </ b> A and the inner wiring board 2 are electrically joined by crushing the metal constituting the inter-board wiring member 7. At the same time, the inner wiring board 2 and the electronic component mounting board 1
B are joined in a self-aligned manner by the prepreg 5, and the inner layer wiring board 2 and the electronic component mounting board 1 </ b> B are electrically joined by crushing the metal forming the inter-board wiring member 8.
【0032】この基板積層に際する加圧熱接合処理によ
る応力は、電子部品実装基板1Aの下の電子部品3Aの
隅々にプリプレグ4を強制的に周り込ませ、これと同時
に、電子部品実装基板1Bの上の電子部品3Bの隅々に
プリプレグ5を強制的に周り込ませるように働く。従っ
て、電気的に基板間が接続されると共に、各々の部材間
が自己整合的に熱接合され、図1に示した電子部品内蔵
多層基板100を形成することができる。こうして得ら
れた電子部品内蔵多層基板100の外面に更に抵抗や、
コンデンサなどの部品を更に実装するようになされる。The stress caused by the pressurized thermal bonding process during the lamination of the substrates causes the prepreg 4 to forcibly wrap around the corners of the electronic component 3A under the electronic component mounting substrate 1A, and at the same time, mount the electronic component. The prepreg 5 works so as to forcibly wrap around the corners of the electronic component 3B on the substrate 1B. Accordingly, the substrates are electrically connected to each other, and the respective members are thermally joined in a self-aligned manner, so that the electronic component built-in multilayer substrate 100 shown in FIG. 1 can be formed. On the outer surface of the electronic component built-in multilayer substrate 100 thus obtained,
Components such as a capacitor are further mounted.
【0033】このように、本実施形態に係る電子部品内
蔵多層基板の製造方法によれば、電子部品実装基板1
A,1Bの電子部品3A,3Bの隅々にプリプレグ4,
5を周り込ませることができるので、電子部品実装基板
1Aと内層配線基板2との間に電子部品3Aを再現性良
く封じ込むこと、及び、電子部品実装基板1Bと内層配
線基板2との間に電子部品3Bを再現性良く封じ込むこ
とができる。As described above, according to the method for manufacturing a multilayer board with built-in electronic components according to the present embodiment, the electronic component mounting board 1
A, 1B prepreg 4, in every corner of electronic components 3A, 3B
5, the electronic component 3A is sealed between the electronic component mounting board 1A and the inner wiring board 2 with good reproducibility, and the gap between the electronic component mounting board 1B and the inner wiring board 2 is increased. The electronic component 3B can be sealed with good reproducibility.
【0034】本発明者らが基板面積をシュミレーション
した結果によれば、実装基板上に平面に5個のLSIを
表面実装する場合(現行のCSP:Chip Size Packa
geを使用した従来方式)に比べて、5個のLSIを基板
内に内蔵する本発明方式では、従来方式の40〜50%
の小型化が図れることが明確になった。従って、更なる
電子部品の実装面積を積層方向に立体的に増加するこ
と、及び、電子部品の高密度実装を行うことができる。According to the results of the simulation of the substrate area by the present inventors, when five LSIs are surface-mounted on a mounting substrate on a plane (current CSP: Chip Size Packa).
Compared with the conventional method using ge), the method of the present invention in which five LSIs are built in the substrate is 40 to 50% of the conventional method.
It has been clarified that the size can be reduced. Therefore, it is possible to three-dimensionally increase the mounting area of the electronic component in the stacking direction and to perform the high-density mounting of the electronic component.
【0035】[0035]
【発明の効果】以上説明したように、本発明に係る電子
部品内蔵多層基板によれば、電子部品実装基板、基板間
絶縁層及び配線回路基板から成る積層構造を有し、この
基板間絶縁層は、予め基板間用の絶縁部材に電子部品の
大きさにほぼ等しい収納領域が設けられ、その収納領域
に電子部品を挿入した状態で、電子部品実装基板と配線
回路基板とが熱加圧されて成るものである。この構成に
よって、電子部品実装基板と配線回路基板との熱加圧工
程において、電子部品の隅々に基板間用の絶縁部材を周
り込ませるように電子部品を封じ込むことができる。従
って、更なる電子部品の実装面積を積層方向に立体的に
増加すること、及び、電子部品の高密度実装を行うこと
ができる。As described above, according to the multilayer board with built-in electronic component according to the present invention, the multilayer board including the electronic component mounting board, the inter-substrate insulating layer and the wiring circuit board has a laminated structure. Is provided in advance with a storage area substantially equal to the size of the electronic component in the insulating member between the boards, and the electronic component mounting board and the printed circuit board are heated and pressed with the electronic component inserted in the storage area. It consists of With this configuration, in the step of applying heat to the electronic component mounting board and the printed circuit board, the electronic component can be sealed such that the insulating member for the board is wrapped around every corner of the electronic component. Therefore, it is possible to three-dimensionally increase the mounting area of the electronic component in the stacking direction and to perform the high-density mounting of the electronic component.
【0036】本発明に係る電子部品内蔵多層基板の製造
方法によれば、電子部品の大きさにほぼ等しい収納領域
を有した基板間用の絶縁部材を形成し、その後、その収
納領域と電子部品とを位置合わせをして電子部品実装基
板上に基板間用の絶縁部材及び配線回路基板を順に積層
し、その後、電子部品実装基板、基板間用の絶縁部材及
び配線回路基板とを熱加圧して貼合するようになされ
る。この構成によって、電子部品実装基板上の電子部品
の隅々に基板間用の絶縁部材を周り込ませることができ
るので、電子部品実装基板と配線回路基板との間に電子
部品を再現性良く封じ込むことができる。この発明はL
SIや、抵抗、コンデンサなどを高密度実装した携帯端
末装置などに適用して極めて好適である。According to the method of manufacturing a multilayer board with a built-in electronic component according to the present invention, an insulating member between boards having a storage area substantially equal to the size of the electronic component is formed. The insulating member for the board and the wiring circuit board are sequentially laminated on the electronic component mounting board by aligning with the electronic component mounting board, and then the electronic component mounting board, the insulating member for the board and the wiring circuit board are thermally pressed. It is made to stick. With this configuration, the insulating member for the board can be wrapped around every corner of the electronic component on the electronic component mounting board, so that the electronic component is sealed with good reproducibility between the electronic component mounting board and the printed circuit board. Can be included. This invention is L
It is extremely suitable to be applied to a portable terminal device or the like on which an SI, a resistor, a capacitor, and the like are mounted at a high density.
【図1】実施形態としての電子部品内蔵多層基板100
の構造例を示す断面図である。FIG. 1 is a multilayer board 100 with a built-in electronic component as an embodiment.
It is sectional drawing which shows the structural example of.
【図2】A、Bは実施形態としての電子部品内蔵多層基
板100の形成例(その1)を示す工程断面図である。FIGS. 2A and 2B are process cross-sectional views illustrating an example (part 1) of forming a multilayer board 100 with a built-in electronic component as an embodiment.
【図3】A、Bは実施形態としての電子部品内蔵多層基
板100の形成例(その2)を示す工程断面図である、3A and 3B are process cross-sectional views illustrating an example (part 2) of forming the electronic component-embedded multilayer substrate 100 as an embodiment.
【図4】その電子部品内蔵多層基板100の形成時にお
ける電子部品実装基板1の動作検査例を示すイメージ図
である。FIG. 4 is an image diagram showing an operation inspection example of the electronic component mounting board 1 when the electronic component built-in multilayer board 100 is formed.
【図5】実施形態としての電子部品内蔵多層基板100
の形成例(その3)を示す断面図である。FIG. 5 is a multilayer board 100 with a built-in electronic component as an embodiment.
It is sectional drawing which shows the example of formation (No. 3).
1,1A,1B・・・電子部品実装基板(回路基板)、
2・・・内層配線基板(配線回路基板)、3A,3B・
・・電子部品、4,5・・・プリプレグ(基板間絶縁
層,絶縁材料)、7,8・・・基板間配線部材(導電性
の部材)、100・・・電子部品内蔵多層基板1, 1A, 1B ... electronic component mounting board (circuit board),
2 ... Inner wiring board (wiring circuit board), 3A, 3B
..Electronic components, 4,5 ... prepreg (insulating layer between substrates, insulating material), 7,8 ... Wiring member between substrates (conductive member), 100 ... Multilayer substrate with built-in electronic components
Claims (7)
品を封じ込んだ基板間絶縁層と、 前記基板間絶縁層に積層されると共に、前記電子部品実
装基板に電気的に接続された配線回路基板とを備え、 前記基板間絶縁層は、 予め基板間用の絶縁部材において、電子部品の大きさと
ほぼ等しい収納領域が設けられ、前記収納領域に電子部
品を挿入した状態で、前記電子部品実装基板と配線回路
基板とが熱加圧されて成ることを特徴とする電子部品内
蔵多層基板。1. An electronic component, an electronic component mounting board on which the electronic component is mounted, an inter-substrate insulating layer stacked on the electronic component mounting board and enclosing the electronic component, and the inter-substrate insulating layer And a wiring circuit board electrically connected to the electronic component mounting board, wherein the inter-substrate insulating layer is a storage area that is approximately equal to the size of the electronic component in the insulating member between the boards in advance. Wherein the electronic component mounting board and the printed circuit board are heat-pressed while the electronic component is inserted into the storage area.
実装基板を形成する工程と、 前記電子部品の大きさにほぼ等しい収納領域を有した基
板間用の絶縁部材を形成する工程と、 前記収納領域と電子部品とを位置合わせをして前記電子
部品実装基板上に前記基板間用の絶縁部材を積層する工
程と、 前記基板間用の絶縁部材上に配線回路基板を積層する工
程と、 前記電子部品実装基板、基板間用の絶縁部材及び配線回
路基板を熱加圧して貼合する工程とを有することを特徴
とする電子部品内蔵多層基板の製造方法。A step of mounting the electronic component on a circuit board to form an electronic component mounting board; and a step of forming an inter-substrate insulating member having a storage area substantially equal to the size of the electronic component. A step of aligning the storage area and the electronic component and laminating the insulating member for inter-substrate on the electronic component mounting board; and a step of laminating a printed circuit board on the insulating member for inter-substrate. Bonding the electronic component mounting board, the insulating member between the boards, and the printed circuit board by applying heat and pressure.
の所定位置に、予め前記基板間用の絶縁部材を貫通する
程度の長さの金属性の凸状の突起部が形成され、 前記電子部品実装基板、基板間用の絶縁部材及び配線回
路基板の熱加圧工程による前記突起部の変形によって前
記電子部品実装基板と配線回路基板とを電気的に接続す
るようになされたことを特徴とする請求項2に記載の電
子部品内蔵多層基板の製造方法。3. A protruding metallic projection having a length that penetrates the insulating member between the substrates is formed at a predetermined position on the printed circuit board or the electronic component mounting board in advance. The electronic component mounting board and the printed circuit board are electrically connected by deformation of the projections in the mounting substrate, the insulating member for the board and the printed circuit board by the heat pressing process. A method for manufacturing the multilayer board with a built-in electronic component according to claim 2.
前記電子部品実装基板上の電子部品の隅々に基板間用の
絶縁部材を周り込ませるようにしたことを特徴とする請
求項2に記載の電子部品内蔵多層基板の製造方法。4. An insulating member for inter-substrate is wrapped around every corner of an electronic component on the electronic component mounting substrate by utilizing a stress caused by deformation of the projecting portion. 5. The method for manufacturing a multilayer board with a built-in electronic component according to claim 1.
部材及び配線回路基板とを同一の熱処理工程により加圧
熱接合することを特徴とする請求項2に記載の電子部品
内蔵多層基板の製造方法。5. The multi-layer board with a built-in electronic component according to claim 2, wherein the electronic component mounting board, the insulating member between the boards, and the printed circuit board are pressure-bonded by the same heat treatment process. Production method.
板を形成した後に、前記電子部品実装基板毎に電気的な
検査を行うことを特徴とする請求項2に記載の電子部品
内蔵多層基板の製造方法。6. The electronic component built-in multilayer board according to claim 2, wherein after the electronic components are mounted to form an electronic component mounting board, an electrical inspection is performed for each of the electronic component mounting boards. Manufacturing method.
板から動作検査用の電極を引き出すことを特徴とする請
求項2に記載の電子部品内蔵多層基板の製造方法。7. The method for manufacturing a multilayer board with built-in electronic components according to claim 2, wherein electrodes for operation inspection are drawn from the electronic component mounting board on which the electronic components are mounted.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29302399A JP2001119147A (en) | 1999-10-14 | 1999-10-14 | Multilayer board incorporating electronic device and production method therefor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP29302399A JP2001119147A (en) | 1999-10-14 | 1999-10-14 | Multilayer board incorporating electronic device and production method therefor |
Publications (2)
Publication Number | Publication Date |
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JP2001119147A true JP2001119147A (en) | 2001-04-27 |
JP2001119147A5 JP2001119147A5 (en) | 2006-04-27 |
Family
ID=17789496
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP29302399A Pending JP2001119147A (en) | 1999-10-14 | 1999-10-14 | Multilayer board incorporating electronic device and production method therefor |
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