JP2776096B2 - Manufacturing method of polyimide multilayer wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a polyimide multilayer wiring board having a multilayer wiring layer using a polyimide resin for interlayer insulation on a ceramic substrate or a hard organic resin substrate, and more particularly to a method for electrically connecting wiring layers. About.

[0002]

2. Description of the Related Art A multilayer printed wiring board has conventionally been used as a wiring board on which an LSI chip is mounted.
The multilayer printed wiring board is configured by using a copper-clad laminate as a core material and a prepreg as an adhesive for the core material, alternately laminating the core material and the prepreg, and integrating them using a hot press.
The electrical connection between the laminated plates is performed by integrating the core material and the prepreg, forming a through-hole with a drill, and plating the inner wall of the through-hole with copper.

In recent years, a multilayer wiring board using a polyimide resin for interlayer insulation on a ceramic substrate has been used as a wiring board for a large computer which requires a higher wiring density than a multilayer printed wiring board. In the conventional manufacturing method of this polyimide ceramic multilayer wiring board,
A polyimide precursor varnish is applied on a ceramic substrate, dried, and a polyimide resin insulating layer forming step of forming a via hole in the applied film, and a photolithography, a wiring layer forming step using a vacuum deposition and plating method, Further, by repeating this series of steps, a polyimide multilayer wiring layer is formed.

In addition to the above-described method for forming a polyimide / ceramic multilayer wiring substrate, a wiring pattern is formed on a polyimide sheet, and the sheet is positioned on the ceramic substrate and sequentially laminated under pressure to perform multilayer wiring. There has also been a method of manufacturing a polyimide multilayer wiring board for forming a board. According to this method, since the signal layer is formed in units of seals, sheets having no defect can be selected and laminated, and the production yield can be increased as compared with the above-described sequential lamination method.

[0005]

In the above-described multilayer printed wiring board, since the electrical connection between the laminated boards is performed by through-holes formed by drilling, it is impossible to form fine through-holes. Therefore, the number of wirings that can be formed between through holes is limited. Also, one through through hole is required for connection between one laminated board,
As the number of stacked layers increases, the signal wiring accommodating property decreases, and it is difficult to form a large number of printed wiring boards with a high wiring density.

Further, the above-described conventional method for manufacturing a polyimide / ceramic multilayer wiring board involves applying a polyimide precursor varnish on a ceramic substrate by the same number of times as the number of laminated polyimide insulating layers, drying, forming via holes, and It is necessary to repeat each curing step. for that reason,
It takes a very long time to laminate the multilayer wiring board. Further, since the step of forming the polyimide insulating layer is repeatedly performed, the polyimide resin in the lower layer portion of the multilayer wiring layer is subjected to thermal stress in the curing step many times, and thus,
There is a disadvantage that the polyimide resin deteriorates. Further, since this polyimide multilayer wiring layer is of a sequential lamination type, there is a drawback that it is difficult to improve the production yield.

Also, in the production of a polyimide multi-layer wiring board by a sheet-based lamination method developed as a method for improving the production yield, since the layers are successively pressed and laminated one by one, the higher the number of layers, the lower the polyimide resin in the lower layer portion. The disadvantages that the polyimide resin is deteriorated due to the application of thermal stress and that the number of days for manufacturing the substrate is long are not improved.

[0008]

According to the present invention, there is provided a method of manufacturing a polyimide multilayer wiring board, comprising the steps of: laminating a plurality of blocks having a plurality of wiring layers and providing a solder pool provided in one of the blocks; In a method for manufacturing a polyimide multilayer wiring board in which electrical connections between blocks are made by soldering metal bumps provided on a substrate, the solder pool is formed of any one of the metals constituting the solder, and the different layers are made of different metals. Wherein the metal bumps have a portion in contact with the solder pool made of one or more of the metals constituting the solder pool.

In the block of the polyimide multilayer wiring board of the present invention, the insulating layer has a plurality of wiring layers made of polyimide resin.
It is characterized in that a solder pool is provided on the surface, which is a multilayer plating in which each layer is made of any one of the metals constituting the solder and alternately has plated layers of different metals.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings.

FIG. 1 is a sectional view of a polyimide multilayer wiring board manufactured according to one embodiment of the present invention.

The ceramic substrate 9 used in this embodiment
Is a co-fired alumina ceramic substrate having input / output pins 8 on the back surface of the substrate and having an internal wiring layer of molybdenum metal. The specifications of the polyimide multilayer wiring layer are as follows. The signal wiring of the signal wiring layer 5 is a gold-plated wiring having a signal width of 25 μm and a wiring thickness of 7 μm. The signal wiring layer 5 is composed of a pair of wiring in the X direction and a wiring in the Y direction perpendicular to the signal wiring layer 5. The upper and lower portions of the signal wiring layer 5 are sandwiched between ground wiring layers to adjust impedance and reduce crosstalk noise. The polyimide resin 23 is a polyimide having a glass transition point (for non-photosensitive, PIQ of Hitachi Chemical, PYRALY of DuPont)
N, Toray's Semico Fine, etc.
L-1200, DuPont P1-2702D, Toray Photo Nice, Asahi Kasei PIMEL, etc.), and the film thickness between each wiring layer is 20 μm.

The number of signal wiring layers is eight (four sets). First, one set of signal wiring layers and one ground electrode layer are laminated for each block 24 having a basic configuration, and then, a plurality of blocks 24 are bonded on the ceramic substrate 9 to form a multilayer wiring board. . In this embodiment, four blocks 24 are stacked. Further, when each block 24 is completed, an electrical inspection is performed, non-defective blocks are selected, and the process proceeds to the next step of connecting blocks.

The electrical connection between the blocks is made by soldering a metal bump 7 made of nickel / gold plated with gold on nickel plating, and a solder pool 17 formed by multilayer plating of gold and tin. . The size of the solder pool is, for example, 50 to 500 μm square and 10 to 100 μ depth.
m, the size of the nickel-gold bump is, for example, 25 to 3
It is formed with a thickness of 00 μm square and 10 to 50 μm.
On the uppermost layer of the formed polyimide multilayer wiring board, connection pads 19 for soldering the LSI chip are formed by copper plating.

FIGS. 2 to 4 show an embodiment of a method for manufacturing a polyimide multilayer wiring board according to the present invention in the order of steps. The polyimide multilayer wiring board manufactured according to the present embodiment is as shown in FIG. Photosensitive polyimide having a glass transition point of about 270 ° C. is used for the polyimide resin, and gold is used for the wiring metal.

The steps of manufacturing the polyimide multilayer wiring board of this embodiment are as follows.

First, as shown in FIG. 2, a pair of signal wiring layers and one grounding and connection wiring layer are formed on a flat aluminum plate (hereinafter abbreviated as aluminum flat plate) in the following process order.

Step 1 (FIG. 2A): The ground and connection wiring layer is patterned on the aluminum flat plate 1 by photolithography using a photoresist, and electrolytic gold plating is performed to form the ground and connection wiring layer 2.

Step 2 (FIG. 2 (b)): A photosensitive polyimide varnish 4 is applied on the aluminum plate 1 on which the grounding and connection wiring layer 2 is formed in Step 1, exposed and developed, and a via hole is formed at a predetermined position. 3 is formed, and an insulating layer to be cured is formed.

Step 3 (FIG. 2C): A set of signal wiring layers 5 is formed using photosensitive polyimide for interlayer insulation.
As a forming method, the signal wiring layer 20 is formed by the method of forming the ground and connection layer 2 in the step 1, and the signal interlayer insulating layer is formed by the method of forming the insulating layer in the step 2.

Step 4 (FIG. 2 (d)): A polyimide varnish is applied on the pair of signal wiring layers formed in Step 3 and exposed and developed to form via holes 6 at predetermined positions.
Is formed and cured.

Step 5 (FIG. 2E): A connection bump 7 is formed on the uppermost layer of the multilayer wiring layer formed in Step 4 at a position where electrical connection is made with the multilayer wiring layer formed in Step 6 and subsequent steps. Form. The bumps are patterned by photolithography using a photoresist, and are formed by two-layer plating of electrolytic nickel plating and electrolytic gold plating. Nickel plating is a layer for preventing the diffusion of gold-tin solder into the gold wiring layer. Each plating thickness is 10 μm for nickel and 3 μm for gold.

Next, as shown in FIG. 3, a set of signal wiring layers and a set of grounding and connecting layers sandwiching the signal wiring layers are formed on a ceramic substrate having input / output pins on the back surface.

Step 6 (FIG. 3A): The grounding and connection wiring layer 10 is patterned by photolithography using a photoresist on a ceramic substrate 9 on which the input / output signal pins and power supply pins 8 are on the back side, and electrolytic gold plating To form the grounding and connection wiring layer 10.

Step 7 (FIG. 3B): A photosensitive polyimide varnish 11 is applied on the ceramic substrate on which the grounding and connection layer 10 has been formed in Step 6, exposed and developed to form a via hole 12 at a predetermined position. Then, curing is performed to form an insulating layer.

Step 8 (FIG. 3C): A pair of signal wiring layers 13 are formed using photosensitive polyimide for interlayer insulation. As a forming method, a signal wiring layer is formed by a method in which a ground and a connection layer are formed in Step 1, and a signal interlayer insulating layer 21 is formed by a method in which an insulating layer is formed in Step 2.

Step 9 (FIG. 3D): A photosensitive polyimide varnish is applied on the signal wiring formed in Step 8 and exposed.
By performing development, a via hole 14 is formed at a predetermined position,
Cure.

Step 10 (FIG. 3E): The second grounding and connection layer 15 from the ceramic substrate 9 side is formed on the polyimide layer formed in Step 9 by the method used in Step 6.

Step 11 (FIG. 3F): A polyimide layer having a via hole 16 formed thereon is formed on the grounding and connection layer 15 in the same manner as in Step 9.

Step 12 (FIG. 4A): A solder pool 17 is formed in the via hole 16 formed on the polyimide layer formed in Step 11 by multi-layer plating of gold and tin to be connected to signal wiring. The solder pool is patterned by photolithography using a photoresist.
An electrolytic nickel plating of μm is formed, and then electrolytic tin plating and electrolytic gold plating are alternately performed to form a multilayer plating of gold and tin. Nickel plating is a layer for preventing the diffusion of gold-tin solder into the gold wiring layer. The multi-layer plating of gold and tin is melted by heat in the subsequent step of bonding the polyimide layer to form a gold-tin alloy solder. The multilayer plating of gold and tin has a film thickness ratio of 10: 7 so that the weight ratio of gold to tin is 4: 1. Each film thickness is 1 μm for gold plating and 0.7 μm for tin plating, for a total of 6 μm. A layer (gold-tin multi-layer plating portion total thickness 10.2 μm) is formed.

Step 13 (FIG. 4B): a polyimide layer having the connection metal bumps 7 formed in step 5 of the polyimide multilayer wiring layer 25 on the aluminum flat plate 1 formed in steps 1 to 5; The polyimide multilayer wiring layer 26 having the solder pool 17 on the ceramic substrate 9 formed in the steps 12 to 12 is aligned, then superposed, pressed, and heated to a temperature exceeding the glass transition point of the polyimide resin. Adhere and fix the membrane.
At this time, the gold and tin multilayer plating of the solder pool 17 is 280.
It melts at around ° C and becomes a gold-tin alloy solder, which is joined to the metal bump 7 formed in the step 5, and the two laminated structures are electrically connected. At the same time, the gold of metal bump 7 is solder pool 1
7, and the metal composition of the solder pool 17 changes, resulting in gold-excess gold-tin solder, and the melting point rises. Therefore, even if the solder is heated to the temperature of this step in the next block superimposing step, the solder at the contact point due to the solder pool 17 and the bumps 7 connected this time does not melt, so that there is no occurrence of a defect that the connection part is separated again.

The increase in the melting point of the solder can be confirmed by differential scanning calorimetry (DSC). FIG. 5 shows the DSC of the solder pool 17 before the heating step, and FIG. 6 shows the DSC of the gold-excess solder pool after the heating step. As can be seen by comparing FIGS. 5 and 6, after the heating step, there is no melting point peak within the measurement range up to 600 ° C. The method of pressing and heating the polyimide multilayer wiring layer is as follows. Pressurization and heating use an autoclave type vacuum press device, pressurized gas uses nitrogen gas, and pressurization is performed up to a substrate temperature of 250 ° C.
kg / cm ² , and a substrate temperature of 250 ° C. to 350 ° C. is set at 14 kg / cm ² . At this time, the substrate on which the polyimide multilayer wiring layer is laminated is placed on a platen, sealed using a polyimide film, and connected to a vacuum pump to reduce the pressure inside to 10 Torr or less.

Step 14 <FIG. 4 (c)>: The part of the aluminum plate 1 of the bonded substrate in step 13 is immersed in a 16% hydrochloric acid aqueous solution to dissolve and remove the aluminum plate 1.

Step 15 (FIG. 4C): A photosensitive polyimide varnish is applied on the ground and connection wiring layer 2 newly formed in Step 1 and exposed and developed in Step 14, and exposed and developed to a predetermined position. A via hole is formed and cured.

Step 16 (FIG. 4C): Solder pool 1 by multi-layer plating of gold and tin to be connected to the signal wiring layer in the via hole formed on the polyimide layer formed in Step 15
8 is formed. The forming method is the same as that in Step 12.

Step 17 (FIG. 4D): On the polyimide wiring layer laminate formed in Steps 1 to 16, another polyimide wiring layer formed in Steps 1 to 5 is placed in Step 13 (FIG. 4D).
And the process from step 16 to lamination and integration.

Step 18 <FIG. 4D>: Step 17 is repeated until the number of wiring layers becomes eight.

Step 19 <FIG. 4D>: Lastly, the connection electrode layer 1 for connecting the multilayer wiring board and the wiring of the LSI chip
9 is formed. In this step, steps 13 to 15 are performed in step 18, and then connection electrode pads for solder connection with bumps of the chip carrier in which the LSI chip is encapsulated are formed on the polyimide layer formed in step 15. At this time, tin-lead eutectic solder is used as solder for connecting the bumps of the LSI chip carrier and the connection electrode pads, and the connection electrode pads are formed by copper plating which is not affected by the tin-lead solder.

As described above, according to the present embodiment, it is possible to form a polyimide multilayer wiring board having a high number of layers and a high wiring density in a very short manufacturing time as compared with a conventional polyimide / multilayer ceramic wiring board of a sequential lamination type. Since electrical inspection can be performed on a block-by-block basis and non-defective blocks can be selected and stacked, a high production suspension can be realized. Furthermore, when connecting the polyimide multilayer wiring layers to each other, the solder pool 1 already joined in the previous step is used.
Since the solder between the solder bump 7 and the metal bump 7 is not melted, it is possible to prevent the solder pool 17 from being separated by heating in a process after the joining of the solder bump 17 and the metal bump.

The solder pool is not limited to the multi-layer plating of gold and tin, but may be another metal. For example, multi-layer plating of tin and lead can be used for the solder pool.

[0041]

As described above, according to the method for manufacturing a polyimide multilayer wiring board of the present invention, the structure of the polyimide multilayer wiring layer is obtained by forming a laminate including a plurality of wiring layers into one block and stacking a plurality of blocks. The electrical connection between each block is made by soldering the metal bumps formed on the surface of the stacked body of each block and the solder pool, and the structure of the solder pool is a single metal of the solder Multi-layer plating for each metal, and the portion of the metal bump that contacts the solder pool is formed of one or more metals that make up the solder pool, thereby preventing the occurrence of contact separation in the subsequent process due to the effect of increasing the solder melting point in the soldering process The effect is that a high-quality, high-multilayer, high-wiring-density polyimide multi-layer wiring board can be formed in a short number of production days and with high production suspension. That.

[Brief description of the drawings]

FIG. 1 is a sectional view of a polyimide multilayer wiring board according to a manufacturing method of an embodiment of the present invention.

FIG. 2 is a cross-sectional view showing the formation of a signal wiring layer and a grounding and connection wiring layer on an aluminum flat plate according to an embodiment of the present invention in the order of steps.

FIG. 3 is a cross-sectional view showing the formation of a signal wiring layer, a ground, and a ground wiring layer on a ceramic substrate according to one embodiment of the present invention in the order of steps.

FIG. 4 is a cross-sectional view showing the bonding of a polyimide multilayer wiring layer on an aluminum flat plate and a polyimide multilayer wiring layer on a ceramic substrate in the order of steps according to one embodiment of the present invention.

FIG. 5 is a view showing a DSC chart of the solder pool 17 before a heating step.

FIG. 6 is a view showing a DSC chart of a solder pool 17 in which gold has become excessive after a heating step.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Aluminum flat plate 2,10 Grounding and connection wiring layer 3,6,12,14,16 Via hole 4,11 Polyimide varnish 5,13 Signal wiring layer 15 Grounding and connection layer 7,28 Connection bump 8 Input / output pin 9 Ceramic Substrates 17, 18 Solder pool 19 LSI connection pad 23 Polyimide 24 Block 25 Polyimide multilayer wiring layer on aluminum flat plate 26 Polyimide multilayer wiring layer on ceramic substrate

Claims (6)

(57) [Claims] An electrical connection between blocks by laminating a plurality of blocks having a plurality of wiring layers and soldering a solder pool provided on one of the blocks and a metal bump provided on another of the blocks. In the method for manufacturing a polyimide multilayer wiring board for performing connection, the solder pool is a multilayer plating in which each layer is made of any one of the metals constituting the solder and alternately overlaps layers of different metals, and the metal bump is A method for manufacturing a polyimide multilayer wiring board, wherein a portion in contact with the solder pool is at least one of metals constituting the solder pool. 2. A multi-layer solder in which an insulating layer has a plurality of wiring layers made of a polyimide resin, and each layer is made of any one of the metals constituting the solder and alternately has plated layers of different metals. A block of a polyimide multilayer wiring board, wherein a pool is provided on a surface. 3. The method for manufacturing a polyimide multilayer wiring board according to claim 1, wherein the solder pool is a multilayer plating in which gold plating layers and tin plating layers are alternately stacked. 4. The method for manufacturing a polyimide multilayer wiring board according to claim 1, wherein the solder pool is a multilayer plating in which tin plating layers and lead plating layers are alternately stacked. 5. The block according to claim 2, wherein the solder pool is a multilayer plating in which gold plating layers and tin plating layers are alternately stacked. 6. The block according to claim 2, wherein the solder pool is a multilayer plating in which tin plating layers and lead plating layers are alternately stacked.