JP2006261373A - Module with built-in passive component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a small and reliable module with built-in passive components which can be used as a single substance or a plurality of stacked substances, and to provide a manufacturing method for easily manufacturing a module having built-in passive components and the like. <P>SOLUTION: A module with a built-in passive component is constituted of a passive component chip equipped at both sides with two or more terminals for a module with a built-in passive component; an insulating layer for building in this passive component chip; two or more up-and-down electrical connection vias allocated in a desired position of the insulating layer; and a wiring layer allocated in the insulating layer, so that terminals and up-and-down electrical connective vias of the passive component chip may be connected. The passive component chip comprises a silicon substrate; a thin film passive component formation layer having two or more surface terminals on the surface formed on one surface of the silicon substrate; two or more rear surface terminals arranged on the surface formed on the other surface of the silicon substrate; and penetration vias which are allocated, so that a silicon substrate may be penetrated and the thin film passive component formation layer and the rear surface terminals may be connected. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a passive component built-in module including passive components such as capacitors, resistors, and inductors, and a manufacturing method for manufacturing such a passive component built-in module.

In recent years, a bare chip mounting method in which an LSI chip or the like is directly mounted on a multilayer wiring board has been proposed. In the bare chip mounting method, bonding wires, bumps made of solder, metal balls, etc., anisotropic conductive films, conductive adhesives, light-shrinkable resins, etc., are formed on wiring connection pads formed on a multilayer wiring board in advance. A semiconductor chip is mounted using the connecting means.
In addition, in semiconductor chips and the like, integrated circuit elements such as ICs and LSIs are becoming higher in density, and the operating speed is increasing year by year, and switching noise generated inside the semiconductor chip becomes a factor that causes the integrated circuit elements to malfunction. was there. In order to reduce switching noise, it is effective to arrange a capacitor between the power supply bus line and the ground bus line.

When such passive components such as capacitors and inductors are required, they are externally mounted on a multilayer wiring board as in the case of semiconductor chips. However, if the capacitor is arranged as an external component on the wiring board, the connection distance between the capacitor and the semiconductor chip becomes long and the wiring inductance becomes large, so that the effect of the capacitor becomes insufficient. In addition, since the connection pad portion of the wiring formed on the multilayer wiring board is provided in a part different from the mounting part of the electronic component such as a semiconductor chip, the surface direction of the multilayer wiring board is required for mounting the passive component. The spread of was necessary. For this reason, there is a limit to the miniaturization of the multilayer wiring board, and the miniaturization tends to become more difficult as the number of electronic components to be mounted increases.
In order to cope with these problems, it has been proposed to incorporate a capacitor in an intermediate substrate (interposer or semiconductor chip carrier) used when a semiconductor chip is mounted on a wiring board (Patent Documents 1 and 2). .
JP-A-8-148595 JP 2001-326298 A

  However, the semiconductor device disclosed in Patent Document 1 has a structure in which a chip carrier made of glass ceramics having a thick film capacitor is connected to a base substrate, and it is difficult to make the dielectric layer thin. There was a limit to the characteristics. Patent Document 2 discloses a configuration including an interposer made of ceramics having a capacitor. However, in the method using the interposer, the material, thickness, capacitor position, size, etc. of the capacitor dielectric layer are disclosed. There was a problem that had to be determined in advance.

Further, a recess for mounting passive components is formed on a multi-sided wafer substrate, the passive components are built in the recess, and then a desired multilayer wiring is formed on the wafer substrate, and then passively formed by dicing. It is conceivable to manufacture a module with a built-in component. However, in the process of forming a multilayer wiring on a passive component, the process of forming an electrical insulating layer, a conductive via, a wiring layer, etc. is repeated, which makes the process complicated and long, resulting in a decrease in manufacturing yield. was there. Further, when a plurality of such passive component built-in modules are used in a stacked manner, it is difficult to connect the stacked passive component built-in modules, that is, to connect the front and back of the passive component modules.
The present invention has been made in view of the above circumstances, and is a compact and highly reliable passive component built-in module that can be used alone or in a stack, and such a passive component built-in. It aims at providing the manufacturing method for manufacturing a module simply.

  In order to achieve such an object, a passive component built-in module of the present invention includes a passive component chip having a plurality of terminals on both sides, an insulating layer in which the passive component chip is embedded, and a desired position of the insulating layer. A plurality of vertically conductive vias disposed on the wiring layer, and a wiring layer disposed in the insulating layer so as to connect the terminals of the passive component chip and the vertically conductive vias, the passive component chip comprising: A silicon substrate, a thin-film passive component forming layer formed on one surface of the silicon substrate and having a plurality of surface terminals on the surface, a plurality of back terminals disposed on the other surface of the silicon substrate, and the silicon substrate The thin-film passive component forming layer and the back surface terminal are provided so as to pass through the through via.

As another aspect of the present invention, the insulating layer is configured to be a composite material of an electrically insulating resin and a reinforcing fiber.
As another aspect of the present invention, the thin-film passive component forming layer includes at least one of a capacitor, a resistor, an inductor, a transformer, and an LCR circuit.
As another aspect of the present invention, the wiring layer is provided on the surface of the insulating layer so as to connect the vertical conduction via.
As another aspect of the present invention, the wiring layer disposed on the surface of the insulating layer has a solder ball.

  The manufacturing method of the module with built-in passive component according to the present invention includes inserting a conductive member into a desired portion of a prepreg made of an electrically insulating resin and reinforcing fibers, and heating the prepreg to form an insulating layer having vertical conduction vias. Thereafter, a step of forming a mounting member by forming a wiring layer connected to the upper and lower conductive vias on both surfaces of the insulating layer, and a thin film passive component forming layer having a plurality of surface terminals on the surface are formed on one side of the silicon substrate. A passive component comprising a plurality of through vias provided on a surface, provided with a plurality of back surface terminals on the other surface of the silicon substrate, and connecting the thin film passive component forming layer and the back surface terminals through the silicon substrate. A step of placing the chip on the mounting member such that one of the front surface terminal and the back surface terminal is connected to the wiring layer; and a prep which is made of an electrically insulating resin and a reinforcing fiber. A conductive member is inserted into a desired portion of the groove, and the prepreg is heated to form an insulating layer having a vertical conductive via, and then a wiring layer connected to the vertical conductive via is formed on at least one surface of the insulating layer Then, a conductive member is inserted into another prepreg having an opening so as to be connected to the upper and lower conductive vias, and then the prepreg is placed so that a desired portion of the wiring layer is exposed in the opening. A step of producing a sealing member overlying an insulating layer; and the sealing member, the passive component chip enters the opening, and a terminal of the passive component chip is connected to the wiring layer of the sealing member. And a step of superimposing and thermocompression-bonding on the mounting member so as to be connected.

Such a module with a built-in passive component according to the present invention does not include a substrate, and a passive component chip that is conductive on the front and back sides through through vias is built in an insulating layer, so that it can be reduced in size and thickness. Furthermore, since the vertical conductive vias are provided in the insulating layer, conduction between the modules can be easily established when the passive component built-in modules of the present invention are stacked or stacked with other electronic component built-in modules. Can do.
In addition, the manufacturing method of the passive component built-in module according to the present invention does not require a complicated process of forming a multilayer wiring on the passive component, thereby improving the manufacturing yield and manufacturing a highly reliable passive component built-in module. Can do.

Embodiments of the present invention will be described below with reference to the drawings.
[Passive component built-in module]
FIG. 1 is a cross-sectional view showing an embodiment of a module with built-in passive component according to the present invention. In FIG. 1, a passive component built-in module 1 of the present invention has a passive component chip 21 built in an insulating layer 2. The insulating layer 2 is a stack of insulating layers 3, 4, and 5. Vertical insulating vias 11, 12, and 13 are provided in the insulating layers 3, 4, and 5, respectively. 12 and 13, the insulating layer 2 is electrically connected to the front and back.

  The passive component 21 built in the insulating layer 2 includes terminals 24 and 26 on both sides, and the terminals 24 and 26 and the vertical conduction vias 11, 12 and 13 are connected in the insulating layer 2. Wiring layers 18 and 15 are provided. In addition, wiring layers 16 and 17 are disposed on both surfaces of the insulating layer 2.

  The insulating layer 2 constituting the passive component built-in module 1 of the present invention is made of an organic material such as epoxy resin, benzocyclobutene resin, cardo resin, or polyimide resin, or a combination of these organic materials and reinforcing fibers such as glass fiber. The thickness (total thickness of the insulating layers 3, 4, 5) can be set in the range of 60 to 300 μm, preferably 90 to 300 μm. The thickness of the insulating layers 3 and 4 can be set in the range of 20 to 100 μm, preferably 30 to 100 μm, and the thickness of the insulating layer 5 is appropriately set corresponding to the thickness of the built-in passive component chip 21. can do.

  The wiring layers 15, 16, 17, and 18 constituting the passive component built-in module 1 of the present invention can be made of a conductive material such as copper, silver, gold, chromium, aluminum, or nickel. The vertical conduction vias 11, 12, and 13 can be made of a conductive material such as copper, silver, gold, chromium, and aluminum, or a paste containing these conductive materials. It can be set in the range of 20 to 500 μm, preferably 50 to 300 μm. The passive component built-in module 1 of the present invention may be provided with solder balls on the exposed surfaces of the vertical conduction vias 11 and 12 or on the wirings 16 and 17.

FIG. 2 is a partially enlarged cross-sectional view showing an example of the built-in passive component chip 21. In the example shown in FIG. 2, the passive component chip 21 includes a silicon substrate 22, a thin film passive component forming layer 23 formed on one surface of the silicon substrate 22, and an insulating layer 25 c on the other surface of the silicon substrate 22. And a rear surface terminal 26 disposed through the connector.
The silicon substrate 22 has a through hole, and an insulating thin film 22 'is provided on the surface including the wall surface of the through hole. A through via 30 is disposed in the silicon substrate 22.

The thin-film passive component forming layer 23 includes a resistance wiring 27 connected to the through via 30 on the silicon substrate 22, a wiring 24 'formed on the insulating layer 25a via the via 29a, and an insulating layer via the via 29b. The surface terminal 24 formed on 25b is provided. A lower electrode 28a is connected to the resistance wiring 27, and a part of the wiring 24 'serves as an upper electrode 28b facing the lower electrode 28a through an insulating layer 25a having a desired thickness. It is configured.
On the other surface of the silicon substrate 22, a wiring 26 ′ connected to the through via 30 is formed, and this wiring 26 ′ is connected to the back terminal 26 through the via 29 c.

In such a passive component chip 21, a filter circuit is formed by the capacitor 28 and the resistance wiring 27 formed in the thin film passive component forming layer 23. The thickness of the silicon substrate 22 constituting the passive component chip 21 can be set to 20 to 250 μm, the thickness of the thin film passive component forming layer 23 can be set to about 3 to 10 μm, and the total thickness of the passive component 21 is in the range of 30 to 300 μm. It is preferable to set so. Moreover, it is preferable that the external dimension of one passive component chip 21 is set so that the length of one side is 1 to 20 mm, preferably 1 to 15 mm.
The passive component included in the thin film passive component forming layer includes a capacitor, a resistor, an inductor, a transformer, an LCR circuit, or the like, or a diode element or an operational amplifier element using a PN junction. Is an example and is not limited thereto.

Such a passive component built-in module 1 of the present invention does not include a substrate, and the passive component chip 21 that is electrically conductive by the through via 30 is built in the insulating layer 2, so that it is small and thin. Is possible. Further, since the vertical conduction vias 11, 12, and 13 are arranged in the insulating layer 2, for example, when a plurality of passive component built-in modules 1 of the present invention are stacked to form a laminated structure, or other electronic components are built in. When a stacked structure is formed by overlapping with a module or the like, conduction between the modules can be easily obtained.
In the above-described embodiment, the passive component built-in module includes two passive component chips. However, in the passive component built-in module of the present invention, the number of built-in passive component chips is not limited. Arrangement positions, arrangement intervals and the like can be arbitrarily set.

[Method of manufacturing module with built-in passive components]
3 and 4 are process charts for explaining an embodiment of a method for manufacturing a module with built-in passive component according to the present invention.
In the method of manufacturing a module with built-in passive component according to the present invention, first, a conductive member is inserted into a desired portion of a prepreg 3 'made of an electrically insulating layer resin and reinforcing fibers, and in this state, the prepreg 3' is heated to The insulating layer 3 including the conductive via 11 is formed (FIG. 3A). Thereafter, wiring layers 15 and 16 connected to the vertical conductive vias 11 are formed on both surfaces of the insulating layer 3 to produce a mounting member 31 (FIG. 3B).

  Examples of the prepreg 3 'to be used include those obtained by impregnating reinforcing fibers such as glass fibers with thermosetting organic materials such as epoxy resin, benzocyclobutene resin, cardo resin, and polyimide resin. The thickness of ′ can be 20 to 100 μm, preferably about 30 to 100 μm. In addition, the conductive member for forming the vertical conductive via 11 may be made of a conductive material such as copper, silver, gold, chromium, aluminum, or formed of a paste containing these conductive materials. it can. The shape of such a conductive member is, for example, a truncated cone, a column, and the like, and the thickness can be set in the range of, for example, 20 to 500 μm, preferably 50 to 300 μm.

  The wiring layers 15 and 16 can be formed as follows, for example. First, a conductive layer (for example, a two-layer structure of chromium / copper, titanium / copper, nickel / gold, etc.) is formed on the insulating layer 3 by a vacuum film formation method, and a resist layer is formed on the conductive layer, and a desired layer is formed. A resist pattern is formed by performing pattern exposure and development. Next, using this resist pattern as a mask, a conductive material is deposited by electrolytic plating to form wiring layers 15 and 16, and then the resist pattern and the conductive layer are removed. Examples of the conductive material include copper, silver, gold, chromium, aluminum, nickel, and the like. For example, when the conductive layer has a two-layer structure of chromium / copper and titanium / copper, the conductive material is preferably copper. When the conductive layer has a two-layer structure of nickel / gold, gold is preferable as the conductive material.

Next, the passive component chip 21 is mounted and fixed on the mounting member 31 (FIG. 3C). The passive component chip 21 includes a thin film passive component forming layer 23 having a plurality of surface terminals 24 on the surface thereof on one surface of the silicon substrate 22, and includes a plurality of back surface terminals 26 on the other surface of the silicon substrate 22. A plurality of through vias (not shown) for connecting the thin film passive component forming layer 23 and the back terminal 26 through the silicon substrate 22 are provided. In the illustrated example, the passive component chip 21 is placed on the placement member 31 so that the back terminal 26 is connected to the wiring layer 15. The passive component chip 21 and the mounting member 31 can be fixed using, for example, an insulating resin such as an epoxy resin or a polyimide resin.
The thin film passive component forming layer 23 constituting the passive component chip 21 is formed with a desired thin film passive component such as a capacitor, a resistor, an inductor, a transformer, and an LCR circuit.

  Next, a conductive member is inserted into a desired portion of the prepreg composed of the electrical insulating layer resin and the reinforcing fiber, and the prepreg is heated to form the insulating layer 4 having the vertical conduction vias 12, and then the insulation Wiring layers 17 and 18 connected to the vertical conduction vias 12 are formed on both surfaces of the layer 4 (FIG. 3D). Next, a conductive member is inserted into the prepreg 5 ′ having the opening 6 so as to be connected to the vertical conduction via 12 to form the vertical conduction via 13, and this prepreg 5 ′ is formed on one surface of the insulating layer 4. Overlay the sealing member 32 (FIG. 4A).

The formation of the insulating layer 4 including the vertical conduction vias 12 can be performed in the same manner as the formation of the insulating layer 3 described above, and the wiring layers 17 and 18 are formed in the same manner as the wiring layers 15 and 16 described above. Can do.
The opening 6 of the prepreg 5 'is for incorporating the passive component chip 21 described above. The size of the opening 6 may be slightly larger than that of the passive component chip 21 in consideration of the flow and thermal contraction of the prepreg 5 ′ in the thermocompression bonding process described later. The same prepreg 5 ′ can be used as the prepreg 3 ′, and the thickness of the prepreg 5 ′ can be appropriately set in consideration of the thickness of the passive component chip 21 to be used.

Next, in the sealing member 32, the passive component chip 21 enters the opening 6, the terminal 24 of the passive component chip 21 is connected to the wiring layer 18 of the sealing member 32, and the vertical conductive vias 13 are It is overlaid on the mounting member 31 so as to be connected to the conductive via 11, and is thermocompression bonded (FIG. 4B). Thereby, the mounting member 31 and the sealing member 32 are joined, and the passive component built-in module 1 of the present invention in which the passive component chip 21 is built inside is obtained. Further, when the mounting process of the mounting member 31 and the sealing member 32 is performed in multiple faces, dicing is then performed to obtain the passive component built-in module 1 of the present invention with desired dimensions.
The above-described method for manufacturing the passive component built-in module is an example, and the present invention is not limited to this.

Next, the present invention will be described in more detail with specific examples.
(Production of mounting member)
A prepreg (R1661 manufactured by Matsushita Electric Works Co., Ltd.) having a thickness of about 0.6 mm and 400 mm × 500 mm in which a glass fiber was impregnated with an epoxy resin was prepared. Next, a conductive member having a truncated cone shape (upper diameter 0.15 mm, lower diameter 0.2 mm, height 0.15 mm) formed of silver paste was inserted into the prepreg from the small diameter side. A total of 400 conductive members were inserted such that the adjacent conductive members had a pitch of 1 mm and a lattice shape of 20 mm × 20 mm. Then, the heat processing for 180 minutes and 180 degreeC were performed, the prepreg was hardened, and the insulating layer (thickness 0.07mm) provided with the vertical conduction via was formed.

  Next, a conductive layer composed of two chromium / copper layers was formed on both surfaces of the insulating layer by sputtering, and a liquid resist (LA900 manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the conductive layer. Next, exposure and development were performed through a photomask to form a resist pattern for forming a wiring layer. Using this resist pattern as a mask and using the above conductive layer as a power feeding layer, electrolytic copper plating was performed to form a wiring layer, and then the resist pattern and the conductive layer were removed. This obtained the member for mounting.

(Production and placement of passive components)
A passive component forming layer (thickness 10 μm) having a capacitor as a thin film passive component was provided on one surface of a 50 μm thick silicon substrate provided with a through via (diameter 30 μm). In addition, an insulating layer was provided on the other surface of the silicon substrate, and a terminal was formed so as to be connected to the through via. Thereafter, dicing was performed to produce a passive component chip having a size of 7 mm × 7 mm.
Next, the passive component chip was mounted and fixed on the mounting member using an epoxy resin so that the terminal on the side opposite to the passive component forming layer side of the passive component chip was connected to the wiring layer. The interval between the passive component chips placed in this way was 2 mm.

(Preparation of sealing member)
The same prepreg as used for the mounting member was prepared, and on this prepreg, a truncated cone (upper diameter 0.15 mm, lower diameter 0.2 mm, height 0.15 mm) formed of silver paste was formed. The member was inserted from the small diameter side. A total of 400 conductive members were inserted such that the adjacent conductive members had a pitch of 1 mm and a lattice shape of 20 mm × 20 mm. Then, the heat processing for 180 minutes and 180 degreeC were performed, the prepreg was hardened, and the insulating layer (thickness 0.07mm) provided with the vertical conduction via was formed.

  Next, a conductive layer composed of two chromium / copper layers was formed on both surfaces of the insulating layer by sputtering, and a liquid resist (LA900 manufactured by Tokyo Ohka Kogyo Co., Ltd.) was applied on the conductive layer. Next, exposure and development were performed through a photomask to form a resist pattern for forming a wiring layer. Using this resist pattern as a mask and using the above conductive layer as a power feeding layer, electrolytic copper plating was performed to form a wiring layer, and then the resist pattern and the conductive layer were removed.

  Next, a prepreg (R1661 made by Matsushita Electric Works Co., Ltd.) having a thickness of about 0.06 mm and 400 mm × 500 mm in which a glass fiber is impregnated with an epoxy resin is prepared. An opening was formed. This opening was provided at a position corresponding to the passive component chip mounted on the mounting member. Next, a conductive member having a truncated cone shape (upper diameter 0.15 mm, lower diameter 0.2 mm, height 0.1 mm) formed of silver paste is connected to the prepreg so as to connect to the above-described vertical conduction via. After that, the prepreg was aligned with one surface of the insulating layer so that a desired wiring was exposed in the opening, and overlapped to obtain a sealing member.

(Production of module with built-in passive components)
The sealing member was superimposed on the mounting member so that the passive component chip mounted on the mounting member entered the opening. At this stage, the terminals of the passive component forming layer of the passive component chip are connected to the wiring layer disposed on the sealing member, and the three layers of the upper and lower conductive vias are connected to each other so as to conduct the front and back. It was. In this state, heat treatment at 180 ° C. for 60 minutes was then performed to cure the prepreg. Subsequently, dicing was performed to obtain a passive component built-in module (20 mm × 30 mm, thickness 0.25 mm) of the present invention in which four passive component chips were built.

  It can also be applied to small semiconductor devices and various electronic devices that require high reliability.

It is sectional drawing which shows one Embodiment of the module with a built-in passive component of this invention. It is a partial expanded sectional view which shows an example of the passive component chip | tip used for the passive component built-in module of this invention. It is process drawing explaining one Embodiment of the manufacturing method of the passive component built-in module of this invention. It is process drawing explaining one Embodiment of the manufacturing method of the passive component built-in module of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Passive component built-in module 2 (3, 4, 5) ... Insulating layer 3 ', 5' ... Prepreg 6 ... Opening part 11, 12, 13 ... Vertical conduction | electrical_connection via 15, 16, 17, 18 ... Wiring layer 21 ... Passive Component chip 22 ... Silicon substrate 23 ... Thin-film passive component formation layer 24 ... Front terminal 26 ... Back terminal 31 ... Mounting member 32 ... Sealing member

Claims (6)

  A passive component chip having a plurality of terminals on both sides; an insulating layer containing the passive component chip; a plurality of vertical conduction vias disposed at desired positions of the insulating layer; and a terminal of the passive component chip A wiring layer disposed in the insulating layer so as to connect the vertical conduction vias, and the passive component chip is formed on one surface of the silicon substrate and a plurality of surfaces on the silicon substrate. A thin film passive component forming layer having a surface terminal, a plurality of back surface terminals disposed on the other surface of the silicon substrate, the thin film passive component forming layer disposed so as to penetrate the silicon substrate, and the back surface terminal A passive component built-in module comprising a through via disposed so as to connect the two.   The passive component built-in module according to claim 1, wherein the insulating layer is a composite material of an electrically insulating resin and a reinforcing fiber.   The passive component built-in module according to claim 1, wherein the thin film passive component forming layer includes at least one of a capacitor, a resistor, an inductor, a transformer, and an LCR circuit.   4. The passive component built-in module according to claim 1, further comprising a wiring layer disposed on a surface of the insulating layer so as to connect the upper and lower conductive vias. 5.   5. The passive component built-in module according to claim 4, wherein the wiring layer disposed on the surface of the insulating layer has solder balls. A conductive member is inserted into a desired portion of a prepreg made of an electrically insulating resin and reinforcing fibers, and the prepreg is heated to form an insulating layer having vertical conductive vias, and then the vertical conductive vias on both surfaces of the insulating layer. Forming a wiring layer to be connected to and producing a mounting member;
A thin film passive component forming layer having a plurality of surface terminals on the surface is provided on one surface of the silicon substrate, a plurality of back surface terminals are provided on the other surface of the silicon substrate, and the thin film passive component penetrates the silicon substrate. A passive component chip having a plurality of through vias connecting the formation layer and the back terminal is mounted on the mounting member such that either the front terminal or the back terminal is connected to the wiring layer. A step of placing;
A conductive member is inserted into a desired portion of a prepreg made of an electrically insulating resin and reinforcing fibers, and the prepreg is heated to form an insulating layer having a vertical conduction via, and then the at least one surface of the insulating layer A wiring layer connected to the vertical conduction via is formed, and then a conductive member is inserted into another prepreg having an opening so as to connect to the vertical conduction via, and then a desired portion of the wiring layer is inserted into the opening. A step of producing a sealing member by overlaying the prepreg on the insulating layer so as to be exposed,
The sealing member is overlaid on the mounting member so that the passive component chip enters the opening and the terminals of the passive component chip are connected to the wiring layer of the sealing member, and thermocompression bonding is performed. And a process for producing a module with a built-in passive component.

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