JP2002515177A - 電子デバイスとその製造方法 - Google Patents

電子デバイスとその製造方法

Info

Publication number
JP2002515177A
JP2002515177A JP52363496A JP52363496A JP2002515177A JP 2002515177 A JP2002515177 A JP 2002515177A JP 52363496 A JP52363496 A JP 52363496A JP 52363496 A JP52363496 A JP 52363496A JP 2002515177 A JP2002515177 A JP 2002515177A
Authority
JP
Japan
Prior art keywords
electronic device
layer
transistors
cavity
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP52363496A
Other languages
English (en)
Japanese (ja)
Inventor
エドワード ボレス ティモシー
リタ ヌーナン ポレッテ
Original Assignee
ザ ウィタカー コーポレーション
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ザ ウィタカー コーポレーション filed Critical ザ ウィタカー コーポレーション
Publication of JP2002515177A publication Critical patent/JP2002515177A/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP52363496A 1995-01-30 1996-01-30 電子デバイスとその製造方法 Pending JP2002515177A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US38064595A 1995-01-30 1995-01-30
US08/380,645 1995-01-30
PCT/US1996/001049 WO1996024161A1 (en) 1995-01-30 1996-01-30 Electronic device and process for making same

Publications (1)

Publication Number Publication Date
JP2002515177A true JP2002515177A (ja) 2002-05-21

Family

ID=23501961

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52363496A Pending JP2002515177A (ja) 1995-01-30 1996-01-30 電子デバイスとその製造方法

Country Status (3)

Country Link
JP (1) JP2002515177A (ko)
KR (1) KR19980701728A (ko)
WO (1) WO1996024161A1 (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7026223B2 (en) * 2002-03-28 2006-04-11 M/A-Com, Inc Hermetic electric component package

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1461943A (en) * 1973-02-21 1977-01-19 Raytheon Co Semi-conductor devices
US4104086A (en) * 1977-08-15 1978-08-01 International Business Machines Corporation Method for forming isolated regions of silicon utilizing reactive ion etching
US4506435A (en) * 1981-07-27 1985-03-26 International Business Machines Corporation Method for forming recessed isolated regions
JP2669153B2 (ja) * 1990-12-19 1997-10-27 日本電気株式会社 半導体装置の製造方法

Also Published As

Publication number Publication date
KR19980701728A (ko) 1998-06-25
WO1996024161A1 (en) 1996-08-08

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