JP2002335466A5 - - Google Patents

Download PDF

Info

Publication number
JP2002335466A5
JP2002335466A5 JP2002064255A JP2002064255A JP2002335466A5 JP 2002335466 A5 JP2002335466 A5 JP 2002335466A5 JP 2002064255 A JP2002064255 A JP 2002064255A JP 2002064255 A JP2002064255 A JP 2002064255A JP 2002335466 A5 JP2002335466 A5 JP 2002335466A5
Authority
JP
Japan
Prior art keywords
memory
screen display
display data
video device
video
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002064255A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002335466A (ja
JP3989752B2 (ja
Filing date
Publication date
Priority claimed from EP01400628A external-priority patent/EP1239670A1/en
Application filed filed Critical
Publication of JP2002335466A publication Critical patent/JP2002335466A/ja
Publication of JP2002335466A5 publication Critical patent/JP2002335466A5/ja
Application granted granted Critical
Publication of JP3989752B2 publication Critical patent/JP3989752B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2002064255A 2001-03-09 2002-03-08 例えばビデオデコーダであるビデオ装置及びこのような装置内でのメモリ制御のためのプロセス Expired - Fee Related JP3989752B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP01400628.2 2001-03-09
EP01400628A EP1239670A1 (en) 2001-03-09 2001-03-09 Video apparatus, notably video decoder, and process for memory control in such an apparatus

Publications (3)

Publication Number Publication Date
JP2002335466A JP2002335466A (ja) 2002-11-22
JP2002335466A5 true JP2002335466A5 (https=) 2005-09-08
JP3989752B2 JP3989752B2 (ja) 2007-10-10

Family

ID=8182649

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002064255A Expired - Fee Related JP3989752B2 (ja) 2001-03-09 2002-03-08 例えばビデオデコーダであるビデオ装置及びこのような装置内でのメモリ制御のためのプロセス

Country Status (9)

Country Link
US (1) US7154559B2 (https=)
EP (1) EP1239670A1 (https=)
JP (1) JP3989752B2 (https=)
KR (1) KR100852394B1 (https=)
CN (1) CN1235159C (https=)
AT (1) ATE368355T1 (https=)
DE (1) DE60221306T2 (https=)
ES (1) ES2290208T3 (https=)
MX (1) MXPA02002337A (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20080281999A1 (en) * 2007-05-07 2008-11-13 Mediatek Inc. Electronic system with direct memory access and method thereof
CN101640770B (zh) * 2008-08-18 2011-05-11 青岛海信信芯科技有限公司 屏幕显示菜单的数据载入方法和视频设备
CN101720040B (zh) * 2009-11-11 2011-05-11 四川长虹电器股份有限公司 融合高速存储器和dma通道的视频解码优化方法
CN102291549A (zh) * 2011-09-07 2011-12-21 天津天地伟业数码科技有限公司 基于cortex-m3的osd结构

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5608459A (en) * 1993-08-13 1997-03-04 Texas Instruments Incorporated Video data decoder having motion compensation and image memory circuitry on single substrate
JP3301263B2 (ja) * 1995-03-29 2002-07-15 株式会社日立製作所 データ復号装置
US5898695A (en) * 1995-03-29 1999-04-27 Hitachi, Ltd. Decoder for compressed and multiplexed video and audio data
JPH09128330A (ja) * 1995-11-06 1997-05-16 Sony Corp 映像表示装置
JPH1093928A (ja) * 1996-09-12 1998-04-10 Hitachi Ltd ディジタル放送デコーダ
US6226291B1 (en) * 1996-11-01 2001-05-01 Texas Instruments Incorporated Transport stream packet parser system
US6369855B1 (en) * 1996-11-01 2002-04-09 Texas Instruments Incorporated Audio and video decoder circuit and system
KR19980042023A (ko) * 1996-11-01 1998-08-17 윌리엄비.켐플러 오디오 영상 시스템용 집적 회로
JPH11103429A (ja) * 1997-09-29 1999-04-13 Sony Corp 画像データ復号化装置及びオン・スクリーン・ディスプレイ・データ更新方法
DE19918046B4 (de) * 1998-04-23 2007-02-15 Lg Electronics Inc. Speicherstruktur für Bild-in-Bild-Anzeige bei einer digitalen Videoanzeigeeinheit sowie Verfahren hierfür
US6085278A (en) * 1998-06-02 2000-07-04 Adaptec, Inc. Communications interface adapter for a computer system including posting of system interrupt status
US6593937B2 (en) * 1998-06-18 2003-07-15 Sony Corporation Method of and apparatus for handling high bandwidth on-screen-display graphics data over a distributed IEEE 1394 network utilizing an isochronous data transmission format
JP3356691B2 (ja) * 1998-07-07 2002-12-16 株式会社東芝 情報記録媒体とその記録方法及び再生方法
US6137539A (en) * 1998-10-09 2000-10-24 Matshushita Electric Industrial Co, Ltd Digital television status display
US6774918B1 (en) * 2000-06-28 2004-08-10 Koninklijke Philips Electronics N.V. Video overlay processor with reduced memory and bus performance requirements
JP3598515B2 (ja) * 2001-12-07 2004-12-08 船井電機株式会社 ディスク再生装置及びosd画像の生成方法

Similar Documents

Publication Publication Date Title
JP2000293427A5 (https=)
JP7191062B2 (ja) 遊技機
US20180314629A1 (en) Managing parallel access to a plurality of flash memories
JP2003029739A5 (https=)
JPH10143651A5 (https=)
WO1998019309A1 (fr) Memoire
KR20170012675A (ko) 컴퓨팅 시스템 및 그것의 데이터 전송 방법
JP2002335466A5 (https=)
JP2000215155A5 (https=)
US6715041B2 (en) Non-volatile memory device with multiple ports
JPH07121430A (ja) デジタル映像信号処理用メモリシステム
JP2004021867A5 (https=)
US7003638B2 (en) Memory bus interface for use in a peripheral device
EP1001378A3 (en) Storage device and image data processing apparatus
US7861007B2 (en) Method and apparatus for multimedia display in a mobile device
JP2003189299A5 (https=)
JP2023093568A (ja) 遊技機
JP7191063B2 (ja) 遊技機
TW201010415A (en) Apparatus and method for video processing
JP2007052769A (ja) メモリカードインターフェイス変換フレームワーク
JP2005032035A (ja) メモリデータ格納方式、メモリアクセス回路、及び集積回路
JP2002091823A (ja) 画像表示装置に使用されるメモリ制御装置
US20070126888A1 (en) Method of taking a picture when a memory of a digital camera is already full
CN101194235A (zh) 存储器控制装置及存储器控制方法
JPS6182588A (ja) 半導体記憶装置