JP2002329852A - Solid-state image pickup apparatus and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a compact, inexpensive, solid-state image pickup apparatus where a solid image pickup element having a micro lens has been packaged without sacrificing the functions of the micro lens. SOLUTION: The solid-state image pickup apparatus has a semiconductor chip 52 where a solid-state image pickup element having a micro lens 50 mounted thereon is arranged. A transparent substrate 64 is arranged opposite to a micro lens arrangement region 70 of the semiconductor chip 52, the transparent substrate 64 is fixed to the semiconductor chip 52 at a region 72 being present around the region 70 by a sealing member such as an adhesive 62, and at the same time space 66 between both of them is sealed, thus preventing the micro lens from being covered with the adhesive and hence preventing the lens function from being sacrificed. Also, the solid-state image pickup apparatus has lead wiring for electrically connecting an electrode pad 90 to a rear electrode via the side surface of the semiconductor chip 52, thus achieving rear wiring and miniaturizing the solid-state image pickup apparatus. Further, packaging can be done in the state of a wafer, resulting in reducing manufacturing costs.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a solid-state imaging device and a method of manufacturing the same, and more particularly, to a solid-state imaging device in which a solid-state imaging device having a microlens is packaged and a method of manufacturing the same.

[0002]

2. Description of the Related Art Conventionally, CCD (Charge Coupled Device)
A semiconductor chip on which a solid-state imaging device including
As shown in FIG. 1, they are commercially available as solid-state imaging devices such as CCD area sensors and CCD line sensors. In this solid-state imaging device, a step is provided on the surface of the package 100, and a storage portion 104 for dropping the semiconductor chip 102 is provided at the center thereof. The semiconductor chip 102 is dropped into the storage section 104 and fixed to the bottom of the storage section 104. The terminals of the semiconductor chip 102 are connected to the terminals provided on the steps 108 of the package 100 by bonding wires 106. A cover glass 110 is attached to the top of the package 100, and the package 100
A nitrogen gas is sealed in the internal space formed by the cover glass 110 and the semiconductor chip 102 is hermetically sealed. Further, pins 112 for connecting to signal lines are provided on the back surface of the package 100.

However, when the semiconductor chips are electrically connected and packaged by wire bonding as described above, the solid-state image pickup device becomes large, and the wire bonding must be performed for each semiconductor chip, resulting in a low mounting cost. Has been raised.

[0004]

In recent years, various portable electronic devices such as portable telephones and notebook personal computers have been marketed with the increasing integration and performance of LSIs. At the same time, the miniaturization of semiconductor devices is progressing, and wafer level C
An ultra-small package called SP (Chip Size Package) has also appeared. In this wafer level CSP, the chip size cut out from the wafer becomes the package size.

Here, an example of a wafer level CSP called a Shell Case CSP will be described. This CSP is characterized by a method of forming an electric lead, and therefore, its structure will be described in accordance with the CSP manufacturing process. First, as shown in FIG. 22A, a wafer 214 sandwiched between two glass substrates 220 and 224 is prepared. An electrode pad 216 electrically connected to the semiconductor device together with the semiconductor device is provided on one main surface of the wafer 214.
Are formed. Electrode pad 21 of this wafer 214
The glass substrate 220 is adhered to the main surface on which 6 is formed by an adhesive 218, and the glass substrate 224 is adhered to the main surface on the opposite side of the wafer 214 by an adhesive 222.

Next, as shown in FIG. 22B, a cut is made using a dicing saw until the end surface of the electrode pad 216 is exposed from the glass substrate 224 side, and a groove 226 is formed.
To form Then, as shown in FIG. 22C, the end surface of the electrode pad 216 is brought into contact with the slope 2 of the groove 226.
A metal film is vapor-deposited by sputtering so as to cover 28, and lead wiring 230 is formed. Lead wiring 23
0 is the glass substrate 22 whose end is continuous with the slope 228.
4 so as to be exposed on the back surface. Then, using a dicing saw, the semiconductor chips are cut into individual semiconductor chips.
Is completed. Thus, wafer level C
In the SP, since all the manufacturing steps including packaging can be performed in a wafer state, there is also an advantage that the manufacturing cost is greatly reduced as compared with the related art.

However, in the above-mentioned shell case type CSP, since the glass substrate 220 is adhered to the main surface on which the semiconductor device is formed by the adhesive 218, it is applied to packaging of a solid-state imaging device having microlenses. There is a problem that can not be. In other words, when the shell / case method is directly applied to packaging of a solid-state imaging device having a microlens, the microlens is coated with a photo-curable resin as an adhesive, and the microlens and the surrounding resin are refracted. Since the rate difference is small, there is a problem that the function as a lens (light collecting function) is lost.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and an object of the present invention is to provide a solid-state imaging device in which a solid-state imaging device having a microlens is packaged without impairing the function of the microlens. An object of the present invention is to provide a small-sized and low-cost solid-state imaging device. Another object of the present invention is to package a solid-state imaging device having a microlens without impairing the function of the microlens, and to manufacture a miniaturized solid-state imaging device at low cost.
An object of the present invention is to provide a method for manufacturing a solid-state imaging device.

[0009]

In order to achieve the above object, a solid-state imaging device according to the present invention comprises: a semiconductor substrate on which a solid-state imaging device in which microlenses are arranged corresponding to respective light receiving regions is formed; A surface electrode provided in a region other than the microlens arrangement region on the surface of the semiconductor substrate, a back electrode provided on a back surface of the semiconductor substrate, and a side surface of the semiconductor substrate for supplying power to the solid-state imaging device; Connecting means for electrically connecting the front surface electrode and the back surface electrode through or through the semiconductor substrate, a transparent substrate arranged to face a microlens arrangement region, and the transparent substrate So that the transparent substrate is fixed to the semiconductor substrate around the microlens arrangement region so that the transparent substrate and the semiconductor substrate are not in contact with each other. Characterized by being configured with a sealing member for sealing between.

[0010] The solid-state imaging device of the present invention includes a semiconductor substrate on which a solid-state imaging device in which microlenses are arranged corresponding to respective light receiving regions is formed. A transparent substrate is arranged to face the microlens arrangement region of the semiconductor substrate. For example, the transparent substrate is fixed to the semiconductor substrate around the microlens disposition area by a sealing member such as an adhesive so that the transparent substrate does not contact the microlens, and the space between the transparent substrate and the semiconductor substrate is reduced. Because it seals, the micro lens is covered with adhesive,
The surface of the lens is not damaged by the contact of the microlens with the transparent substrate, and the function of the microlens is not impaired.

In order to supply power to the solid-state imaging device, a front electrode provided in a region other than the microlens arrangement region on the front surface of the semiconductor substrate and a back electrode provided on the back surface of the semiconductor substrate are connected to a semiconductor substrate. Since connection means is provided for electrical connection through the side surface of the substrate or through the semiconductor substrate, wiring space is significantly reduced as compared with the case where the semiconductor chip is electrically connected by wire bonding and packaged. Accordingly, the size of the solid-state imaging device can be reduced.

Further, the solid-state imaging device according to the present invention has an advantage that the manufacturing cost can be greatly reduced as compared with the conventional one because all the manufacturing steps including packaging can be performed in a wafer state.

In the solid-state imaging device described above, the sealing member includes a spacer that separates the semiconductor substrate and the transparent substrate from each other by a predetermined distance and surrounds the microlens arrangement region, and bonds the space between the semiconductor substrate and the transparent substrate by bonding. It is preferable to use a sealing member for sealing. In this case, the spacer and the adhesive serve as a sealing member, but the spacer keeps the distance between the semiconductor substrate and the transparent substrate constant, and
The spacer prevents the adhesive from entering the microlens arrangement region. It is preferable that the height of the spacer be a height at which the transparent substrate does not contact the microlens.

Further, the sealing member may be an adhesive layer for sealing a space between the semiconductor substrate and the transparent substrate by bonding. In this case, the spacer forming step can be omitted, and the manufacturing process can be simplified.

The connection means may be a lead wire provided on a side surface of the semiconductor substrate or a buried wire penetrating the semiconductor substrate. Further, as the adhesive, an ultraviolet curable resin is preferable.

According to the method of manufacturing a solid-state imaging device of the present invention, a solid-state imaging device in which microlenses are arranged corresponding to respective light receiving regions is formed, and a surface electrode is provided in a region other than the microlens arrangement region on the surface. In addition, a spacer is formed on at least one of the semiconductor substrate having the back electrode provided on the back surface and the transparent substrate disposed to face the microlens placement region, and the spacer is interposed between the transparent substrate and the semiconductor substrate to form a transparent substrate. The substrate and the semiconductor substrate are attached in a region other than the microlens arrangement region, and a groove is cut from the back surface of the adhered transparent substrate and the semiconductor substrate so that the end of the surface electrode opposite to the microlens arrangement region is exposed. The lead substrate for electrically connecting the front surface electrode and the back surface electrode is formed on the slope of the groove, and the transparent substrate and the semiconductor substrate adhered to the groove are removed from the groove. Cut into the solid-state imaging device unit at the bottom, characterized in that to produce a solid-state imaging device.

In this manufacturing method, the spacer is interposed between the transparent substrate and the semiconductor substrate, and the transparent substrate and the semiconductor substrate are bonded in a region other than the microlens arrangement region.
The spacer keeps the distance between the semiconductor substrate and the transparent substrate constant, and prevents the adhesive from entering the microlens placement area by the spacer. The lens surface is not damaged by contact, and the function of the microlens is not impaired. In addition, by keeping the distance between the semiconductor substrate and the transparent substrate constant,
The transparent substrate is flat with respect to the arrangement surface of the solid-state imaging device, and the optical accuracy of the solid-state imaging device is improved.

A groove is cut from the back surface of the adhered transparent substrate and semiconductor substrate so that an end of the surface electrode opposite to the microlens arrangement region is exposed, and the surface electrode and the back surface are formed on the slope of the groove. Since lead wires for electrically connecting the electrodes are formed, the wiring space can be greatly reduced as compared with the case where the semiconductor chip is electrically connected by wire bonding and packaged, and the solid-state imaging device can be reduced in size. Can be achieved.

Further, after the lead wiring is formed, the adhered transparent substrate and semiconductor substrate are cut into solid-state image pickup devices to manufacture a solid-state image pickup device. Therefore, all manufacturing steps including packaging are performed in a wafer state. As a result, the manufacturing cost is greatly reduced as compared with the conventional case.

According to another method of manufacturing a solid-state imaging device of the present invention, a semiconductor substrate on which a solid-state imaging device is formed is provided on a semiconductor substrate.
An embedded wiring penetrating the semiconductor substrate is formed, a front surface electrode is provided outside the light receiving region of the solid-state imaging device on the surface of the semiconductor substrate, and a back surface electrode is provided on the back surface. Are electrically connected to each other, micro lenses are arranged corresponding to each of the light receiving areas of the solid-state imaging device, and the transparent substrate and the semiconductor substrate arranged opposite to the micro lens arranging area are spaced apart from each other by a predetermined distance. The solid-state imaging device is manufactured by cutting the transparent substrate and the semiconductor substrate which are attached to each other in an area other than the arrangement area, in units of solid-state imaging elements.

In this manufacturing method, since the transparent substrate and the semiconductor substrate are adhered to each other in a region other than the microlens arrangement region with a predetermined space therebetween, the microlens is covered with an adhesive or the microlens contacts the transparent substrate. The lens surface is not damaged and the function of the microlens is not impaired.

Further, a buried wiring penetrating the semiconductor substrate is formed on the semiconductor substrate on which the solid-state imaging device is formed,
A front surface electrode is provided outside the light receiving region of the solid-state imaging device on the surface of the semiconductor substrate, and a back surface electrode is provided on the back surface. The front surface electrode and the back surface electrode are electrically connected by embedded wiring, so that the semiconductor chip is electrically connected by wire bonding. The wiring space can be greatly reduced as compared with the case where the components are connected in a package, and the size of the solid-state imaging device can be reduced.

Further, after the transparent substrate and the semiconductor substrate are bonded, the bonded transparent substrate and the semiconductor substrate are cut into solid-state image pickup devices to manufacture a solid-state imaging device. , And the manufacturing cost is greatly reduced as compared with the related art.

In the above description, the light receiving region means a light receiving region of each of the photoelectric conversion elements constituting the solid-state imaging device. In the following description, a region where a plurality of photoelectric conversion elements are arranged may be referred to as a light receiving region of a solid-state imaging device.

[0025]

Embodiments of the present invention will be described below in detail with reference to the drawings. (First Embodiment) As shown in FIGS. 1 and 2, the solid-state imaging device according to the first embodiment is configured as a shell case type chip size package (CSP). FIG. 1 is a plan view of the solid-state imaging device viewed through a transparent substrate 64 and an adhesive 62 described later, and the transparent substrate 64 is indicated by a two-dot chain line. This solid-state imaging device includes a plurality (16 in FIG. 1) of micro lenses 50.
And a semiconductor chip 52 having a substantially rectangular shape on which a solid-state image pickup device having the same is formed. The semiconductor chip 52 is mounted on a substrate 56 made of an insulating material such as glass with an adhesive 54 such as an ultraviolet curing resin. It is pasted.

A spacer 60 is provided on the surface of the semiconductor chip 52 so as to surround the region 70 in which the microlenses 50 are disposed. The existing area 72 is isolated. In the area 72,
A plurality (ten in FIG. 1) of substantially rectangular electrode pads 58 are arranged at predetermined intervals along the opposing short sides of the semiconductor chip 52, and each electrode pad 58 is formed by a solid-state imaging device formed on the semiconductor chip 52. Each electrode of the element is electrically connected by a wiring (not shown). The electrode pad 58 can be formed of a metal such as aluminum (Al) or chromium (Cr).

The end of the electrode pad 58 is connected to the semiconductor chip 5
2 is electrically connected to a lead wiring 82 extending to the back surface of the substrate 56 through the side surface of the second substrate 56. The lead wiring 82
For example, it can be formed of a metal such as aluminum (Al) or chromium (Cr).

The transparent substrate 64 is arranged so as to face the region 70 of the semiconductor chip 52. Semiconductor chip 52
And the transparent substrate 64 include the semiconductor chip 52 and the transparent substrate 64.
The transparent substrate 64 is spaced apart from the microlens 50 at a constant interval by a spacer 60 sandwiched between the transparent substrate 64 and the microlens 50. The height of the spacer 60 may be higher than that of the microlens 50, and the height of the microlens 50 is usually about 2 μm.
μm, preferably 3 to 5 μm in height. Thereby, the microlens 50 comes in contact with the transparent substrate 64,
The lens surface is not damaged. As a material of the transparent substrate 64, a transparent insulating material such as glass and polycarbonate is preferable, and glass is particularly preferable.

In the region 72 of the semiconductor chip 52, the semiconductor chip 52 is adhered to the transparent substrate 64 by the adhesive 62, and the transparent substrate 64 is fixed to the semiconductor chip 52, and the semiconductor chip 52 and the transparent substrate 64 A small space 66 formed therebetween is sealed. As the adhesive 62, for example, an ultraviolet curable resin such as photosensitive polyimide can be used. The material of the spacer 60 is not particularly limited. However, when the spacer 60 is made of the same material as the adhesive 62, the spacer 60 and the adhesive 62 can be integrated after curing, and the adhesive strength can be improved.

FIG. 3 is a sectional view of the solid-state imaging device shown in FIG.
FIG. 4 is a line cross-sectional view showing a cross-sectional structure of the semiconductor chip 52 at a portion where a microlens 50 is formed on the surface.
As shown in FIG. 3, the semiconductor substrate 12 is roughly composed of an n-type semiconductor substrate 12a of silicon or the like and a p-type impurity added region (p-well) 12b. The photodiode 14 is formed as a buried photodiode in the p-type impurity-added region 12b, and as described above, the n-type impurity-added region 1 that functions as a charge storage region.
4a and p formed on n-type impurity added region 14a.
It is composed of a + type impurity added region 14b.

The vertical charge transfer channel 20 is formed as an n-type doped region having a thickness of about 0.3 μm in the p-type doped region 12b. Vertical charge transfer channel 20
A read gate channel 26 formed of a p-type impurity added region is provided between the vertical charge transfer channel 20 and the photodiode 14 on the side from which signal charges are read. The n-type impurity-added region 1 is formed on the surface of the semiconductor substrate 12 along the read gate channel 26.
4a is exposed. Then, the signal charges generated in the photodiode 14 are temporarily stored in the n-type impurity added region 14a, and then read out through the read gate channel 26.

On the other hand, between the vertical charge transfer channel 20 and the other photodiode 14, a channel stop 28, which is a p + -type impurity added region, is provided. The channel stop 28 electrically separates the photodiode 14 and the vertical charge transfer channel 20 from each other, and also separates the vertical charge transfer channels 20 from each other so as not to contact each other.

A transfer electrode (vertical transfer electrode) 32 extending in the horizontal direction and having a thickness of about 0.3 μm is formed on the surface of the semiconductor substrate 12 via the gate oxide film 30 so as to pass between the photodiodes. ing. Further, the transfer electrode 32
It is formed so as to cover the read gate channel 26, expose the n-type impurity added region 14a, and expose a part of the channel stop 28. The transfer electrode 3
2, signal charges are transferred from the read gate channel 26 below the electrode to which the read signal is applied.

The transfer electrode 32 is connected to the vertical charge transfer channel 2
0, a vertical charge transfer device (VCCD) 33 for transferring signal charges generated by the photodiode 14 in the vertical direction.
Is composed. The transfer electrode 32 can be formed using an electrode material generally used in a semiconductor manufacturing process or a solid-state device.

Semiconductor substrate 12 on which transfer electrode 32 is formed
Is covered with a surface protection film 36 made of a transparent resin or the like, and the surface protection film 36 has a thickness of about 0.3 μm.
m light-shielding films 38 are formed. The light-shielding film 38 has, for each photodiode 14, an opening 40 having a predetermined shape as a light transmitting portion for transmitting light received by the p + -type impurity-added region 14b, which is a light receiving region. The edge of the light-shielding film 38 extends toward the center of the light-receiving region, and the opening shape of the photodiode 14 is defined by the light-shielding film 38. The light shielding film 38 is formed from a non-conductive material such as a resin material. The resin material preferably contains a photosensitive resin or gelatin as a main base material. For example, a resin material that is provided with a light-blocking property by dispersing a pigment that absorbs or reflects visible light in a resin, or dyeing the resin with a dye that absorbs or reflects visible light can be used. It is preferably an absorptive (low reflectance) material. For example, a resin material in which a black pigment is dispersed in a resin, or a resin material in which a resin is dyed with a black dye can be used. The opening 40 can be formed by forming a resist mask on a light-shielding portion by patterning on a thin film made of a non-conductive material, and removing the non-conductive material by etching using the resist mask.

On the light-shielding film 38 and the surface protective film 36 exposed from the light-shielding film 38, a red color (about 1.0 μm thick insulating layer 43 and a flattening film 44) is formed. A color filter array 46 including an R) filter 46R, a green (G) filter 46G, and a blue (B) filter 46B is formed. The R filter 46R, the G filter 46G, and the B filter 46B are arranged in a predetermined pattern corresponding to the individual photodiodes 14.
Although a detailed description of the arrangement pattern of the color filters is omitted, FIG. 3 shows one R filter 46R, one G filter 46G, and one B filter 46B. Such a color filter array 46 can be manufactured, for example, by forming a resin (color resin) region containing a pigment or dye of a desired color at a predetermined position using a photolithography method or the like.

On the color filter array 46, the flattening film 4
Through 8, a microlens array including a plurality of microlenses 50 is formed. Micro lens 50
Are arranged corresponding to the individual photodiodes 14. These microlenses 50 are, for example, transparent resins having a refractive index of approximately 1.3 to 2.0 (including a photoresist).
Can be formed by, for example, partitioning a layer made of from a predetermined shape by a photolithography method or the like, melting the transparent resin layer of each partition by heat treatment, rounding corners by surface tension, and then cooling. Photodiode 1
The diameter of the opening 40 (that is, the pixel diameter) is 4 to 5 μm, and the microlens 50 covers the entire pixel and has a height of about 2 μm. Note that the thickness from the semiconductor substrate 12 to the surface of the planarizing film 48 is about 5 μm.

Next, a method of manufacturing the solid-state imaging device according to the first embodiment will be described with reference to FIGS. First, as shown in FIG.
A semiconductor wafer 68 made of silicon or the like adhered to 6 and a transparent substrate 64 are prepared. On the semiconductor wafer 68, a plurality of solid-state imaging devices provided with a plurality of microlenses 50 are formed. The region where the solid-state imaging device is formed includes a region 70 where the microlens 50 is disposed,
And a region 72 for wiring and the like which is located around the area. A dicing region 76 is provided between two adjacent solid-state imaging devices in order to separate the individual solid-state imaging devices after packaging by dicing.

The surface of the transparent substrate 64 facing the semiconductor wafer 68 is laid out so as to surround the region 70 on the surface of the semiconductor wafer 68 when the semiconductor wafer 68 and the transparent substrate 64 are aligned and bonded. A spacer 60 having a predetermined height is provided. In the present embodiment, by providing the spacer 60 on the transparent substrate 64 side and bonding the semiconductor wafer 68 and the transparent substrate 64, the distance between the surface of the semiconductor wafer 68 and the transparent substrate 64 can be made constant, It is easy to match.

Next, as shown in FIG.
An ultraviolet curable resin is applied to the region 72 and the dicing region 76 as the adhesive 62 with a predetermined thickness. The spacer 60 is positioned so as to surround the region 70 on the surface of the semiconductor wafer 68, the semiconductor wafer 68 and the transparent substrate 64 are overlapped, and ultraviolet light is irradiated from the transparent substrate 64 side to cure the adhesive 62, 68 and transparent substrate 64
And stick them together. This bonding step is preferably performed in a vacuum or in an atmosphere of an inert gas such as nitrogen. At the time of bonding, the spacer 60 serves as a wall to serve as an adhesive 6
2 is prevented from entering the region 70, so that the microlens 50 is not covered with the adhesive and does not lose its function as a lens.

Next, as shown in FIG. 6, a cut is made in the dicing region 76 using a dicing saw from the substrate 56 side until the end surface of the electrode pad 58 is exposed, thereby forming a groove 78 having a slope 80. I do. As a result, the transparent substrate 64 and the cured adhesive 62 remain in the region 76.

Next, as shown in FIG.
A metal film is deposited by sputtering to form the lead wiring 82 so as to contact the end face of the groove 62 and cover the slope 80 of the groove 62 and expose the end to the back surface of the substrate 56 continuous with the slope 80. Lastly, the solid-state imaging device is cut along a dicing line 77 located substantially at the center of the dicing region 76 into individual solid-state imaging devices and separated into individual solid-state imaging devices. Can be obtained. Note that the portion indicated as the semiconductor wafer 68 becomes the semiconductor chip 52 after being separated into individual solid-state imaging devices.

As described above, the solid-state imaging device according to the present embodiment is constituted by a small package called a wafer level CSP of the shell case type. In this CSP, the lead wiring connected to the electrode pad extends from the side surface to the back surface, so that the back surface wiring can be performed. Compared with the case where the semiconductor chip is electrically connected by wire bonding to form a package, the wiring is reduced. The space can be largely saved, and the solid-state imaging device can be miniaturized. In addition, since all manufacturing processes including packaging, such as formation of electrode pads and lead wiring, can be performed in a wafer state,
The manufacturing cost is greatly reduced as compared with the conventional solid-state imaging device.Moreover, a spacer is provided on the surface of the semiconductor chip so as to surround the microlens arrangement region. Since the intrusion into the microlens arrangement region is prevented, the microlens is not covered with the adhesive and does not lose its function as a lens. Further, since the height of the spacer is set to be higher than that of the microlens, the lens surface does not come into contact with the transparent substrate and the lens surface is not damaged.

Further, when manufacturing a solid-state imaging device, a spacer having a predetermined height is provided on the transparent substrate side to bond the wafer and the transparent substrate, so that the distance between the wafer surface and the transparent substrate can be made constant. It is possible and alignment is easy. In addition, since the package is divided into element units after being packaged, the surface of the solid-state imaging element is not stained at the time of dicing, and reliability can be secured.

(Second Embodiment) As shown in FIG. 8, a solid-state imaging device according to a second embodiment has a structure similar to that of the first embodiment except that a wafer and a transparent substrate are bonded without using a spacer.
Since the CSP is configured as a shell-case type CSP similar to that of the embodiment, the same parts are denoted by the same reference numerals and description thereof will be omitted.

In the region 72 of the semiconductor chip 52, the semiconductor chip 52 is attached to the transparent substrate 64 by the adhesive 62, and the transparent substrate 64 is fixed to the semiconductor chip 52. The thickness of the adhesive 62 is set to be larger than the height of the microlens 50, so that the semiconductor chip 5
A slight space 66 is formed between 2 and the transparent substrate 64, and the space 66 is sealed with the adhesive 62. Since the adhesive 62 is provided only in the region 72 except for the region 70, the microlens 50 is not covered with the adhesive and does not lose its function as a lens.

The thickness of the adhesive 62 may be set larger than the height of the microlens 50 as described above. Since the height of the microlens 50 is usually about 2 μm, the thickness of the adhesive 62 is 3 μm. -10 μm, preferably 3-5 μm
It is said. As a result, the micro lens 50 is
The lens surface is not damaged by contact with the lens.

Since the spacer is not used, when the semiconductor wafer 68 and the transparent substrate 64 are overlapped and bonded as in FIG. 4, the distance between the surface of the semiconductor wafer 68 and the transparent substrate 64 is made constant. The semiconductor wafer 68 and the transparent substrate 64 are moved by a predetermined holding mechanism (not shown).
Are fixedly held in place. By increasing the positional accuracy of the bonding by the holding mechanism, a spacer for keeping the distance between the wafer surface and the transparent substrate unnecessary can be eliminated, and the manufacturing process can be simplified by omitting the spacer forming step. Specifically, positional accuracy of about ± 10 μm is required.

As described above, the solid-state imaging device according to the present embodiment is constituted by a small package called a wafer level CSP of a shell case type. In this CSP, the lead wiring connected to the electrode pad extends from the side surface to the back surface, so that the back surface wiring can be performed. Compared with the case where the semiconductor chip is electrically connected by wire bonding to form a package, the wiring is reduced. The space can be largely saved, and the solid-state imaging device can be miniaturized. In addition, since all manufacturing processes including packaging, such as formation of electrode pads and lead wiring, can be performed in a wafer state,
The manufacturing cost is greatly reduced compared to conventional solid-state imaging devices.Also, the surface of the semiconductor chip is attached to the transparent substrate with an adhesive, but the adhesive is Provided, the microlens is not covered with the adhesive and does not lose its function as a lens. Further, since the thickness of the adhesive is set to be larger than the height of the microlens, the microlens does not come into contact with the transparent substrate and the lens surface is not damaged.

Further, when manufacturing the solid-state imaging device, each of the wafer and the transparent substrate is fixed and held at a predetermined position by a predetermined holding mechanism in order to keep the distance between the wafer surface and the transparent substrate constant. The positioning accuracy of the bonding can be improved without using the spacer, and the manufacturing process can be simplified by omitting the spacer forming step. In addition, since the package is divided into element units after being packaged, the surface of the solid-state imaging element is not stained at the time of dicing, and reliability can be ensured.

(Third Embodiment) As shown in FIGS. 9 and 10, a solid-state imaging device according to a third embodiment has a semiconductor substrate on which a circuit portion including a solid-state imaging device, wiring, and the like is formed. A semiconductor chip 88 having a substantially rectangular shape including the semiconductor chip 88 is provided. The surface of the semiconductor substrate 12 on which the circuit portion is formed is covered with an insulating oxide film 84 such as a silicon oxide film, and the back surface is covered with an insulating oxide film 86. FIG. 9 is a plan view of the solid-state imaging device viewed through the transparent substrate 64, the adhesive 62, and the insulating film 43.

On both sides of the oxide film 84, a semiconductor chip 88
A plurality (ten in FIG. 9) of substantially rectangular electrode pads 90 are arranged at predetermined intervals along short sides facing each other. In the semiconductor substrate 12, so as to penetrate the semiconductor substrate 12,
Through hole 92 whose side surface is covered with insulating oxide film 86
Is provided, the metal is filled in the through hole 92,
A buried wiring 94 is formed. Semiconductor chip 88
A back surface electrode 96 is provided on the back surface with an oxide film 86 interposed therebetween. Each of the electrode pads 90 is connected to the semiconductor substrate 1.
2 is electrically connected to a wiring (not shown) of the circuit portion formed on the rear surface electrode 96 by the embedded wiring 94.
Is electrically connected to

The oxide film 84 and the electrode pad 90 are made of a transparent insulating film 43 made of, for example, silicon nitride.
, And the surface of the semiconductor chip 88 is flattened. A filter section 98 is provided on the light receiving area of the solid-state imaging device, and a plurality of (16 in FIG. 9) microlenses 50 are arranged on the filter section 98. FIG. 11 is a partially enlarged view of this part. As shown in FIG. 11, a red (R) filter 46 is formed on the insulating film 43 of the semiconductor chip 88 via the transparent flattening film 44.
A color filter array 46 including R, green (G) filters 46G and blue (B) filters 46B is formed. The R filter 46R, the G filter 46G, and the B filter 46B correspond to the individual photodiodes 14,
They are arranged in a predetermined pattern. Color filter array 4
A microlens array having a plurality of microlenses 50 is formed on 6 via a flattening film 48. The micro lens 50 is provided for each photodiode 1
4 are arranged. Note that a complementary color filter may be used instead of the primary color filter.

An area 70 where the microlenses 50 are arranged
The transparent substrate 64 is arranged so as to face the. Region 7 on the surface of semiconductor chip 88 on which filter portion 98 is formed
In a region 72 around 0, the semiconductor chip 88 is attached to the transparent substrate 64 with the adhesive 62, and the transparent substrate 64 is fixed to the semiconductor chip 88.

The thickness of the adhesive 62 is set to be larger than the value obtained by adding the height of the microlens 50 to the thickness of the filter section 98. Therefore, the semiconductor chip 88 and the transparent substrate 6 are formed.
4 and a slight space 66 is formed, and the space 66 is sealed with the adhesive 62. Since the adhesive 62 is provided only in the region 72 except for the region 70, the microlens 50 is not covered with the adhesive and does not lose its function as a lens.
The lens surface is not damaged by contact with the lens. The height of the micro lens 50 is about 2 μm, and the thickness of the filter section 98 is about 5 μm. Therefore, the thickness of the adhesive 62 is 8 μm or more, preferably 8 μm to 20 μm.

The cross-sectional structure of the semiconductor chip 88 at the portion where the microlenses 50 are formed has the same configuration as that of the first embodiment, and a description thereof will be omitted.

Next, a method of manufacturing the solid-state imaging device according to the first embodiment will be described with reference to FIGS. First, as shown in FIG. 12, a solid-state imaging device whose surface is covered with an oxide film 84 such as a silicon oxide film, a plurality of circuit portions including wirings, and a silicon or the like in which a plurality of dicing regions 85 are alternately formed. A semiconductor wafer 100 is prepared. Except for the opening region 102 where the through hole 92 is formed, a transparent protective film 104 such as silicon nitride is provided on the semiconductor wafer 100. Thus, the surface of the substrate including the oxide film 84 is covered with the protective film 104. Note that the protective film 104 serves to indirectly protect the circuit portion by protecting the oxide film 84 in the next etching step.

Next, as shown in FIG.
2 is provided with a through hole 92 penetrating the semiconductor wafer 100. Here, the step of forming the through hole 92 will be described in detail. A plurality of (preferably five or more) concave portions having a size of 10 to 20 μm are formed in the opening region 102 having a size of approximately 100 μm by etching. Except for the region where the opening opposite to the through hole 92 is provided, the semiconductor wafer 100
A resist film is provided on the back surface. Using this resist mask, light in a predetermined wavelength range is irradiated from the back side using a mercury lamp or the like to perform photoexcited etching. As an etching solution, a hydrofluoric acid diluting solution (for example, a 2.5 wt% HF solution) is used. The etching proceeds from the concave portion provided in the opening region 102, and a through hole 92 penetrating the semiconductor wafer 100 is formed. After the formation of the through holes 92, the resist film provided on the back surface of the semiconductor wafer 100 is peeled off.

Next, by immersing the semiconductor wafer 100 in a nitric acid solution, the exposed surface of the semiconductor wafer 100 is oxidized to form an oxide film 86 on the back surface of the semiconductor wafer 100 as shown in FIG. , Through hole 92
Oxide film 86 is also formed on the side surface of. These oxide films are used as insulating films. For example, when a silicon wafer is used as the semiconductor wafer 100, an insulating silicon oxide film is generated as the oxide film 86.

Next, as shown in FIG. 15, after forming a protective metal film 106 on the back surface of the semiconductor wafer 100, the through holes 92 are filled with metal to form buried interconnects 94. Here, a method of filling the metal into the through hole 92 will be described in detail. As the metal filling the through hole 92, for example, indium (In) or tin (Sn)
A metal that melts at a low temperature of 100 ° C. to 200 ° C. is used. In particular, In having a small solidification shrinkage is preferable. First,
The semiconductor wafer 100 in which the through hole 92 is formed is put into a pressure-adjustable chamber together with a molten metal bath,
The chamber is evacuated. And, under vacuum,
When the vacuum state is released after immersing the entire semiconductor wafer 100 in the molten metal bath, the molten metal enters the through hole 92. If left in this state for a predetermined time, the invading metal is solidified, and the metal is filled in the through hole 92. The protective metal film 106 is formed to protect the wafer from a metal that melts at a low temperature.

Next, as shown in FIG. 16A, the protective film 104 on the surface of the semiconductor wafer 100 is peeled off, and an electrode pad 90 is formed so as to cover the exposed portion of the embedded wiring 94. In addition, as shown in FIG.
The contact portion of the wiring 108 provided on the surface of the metal pad 00 with the electrode pad 90 is drawn out, and is electrically connected to the electrode pad 90. The electrode pad 90 is connected to a terminal (not shown) of the solid-state imaging device 110 provided on the surface of the semiconductor wafer 100 via the wiring 108. The surface of the semiconductor wafer 100 provided with the wiring 108 and the solid-state imaging device 110 is covered with a transparent oxide film 84.

Next, as shown in FIG. 17, the oxide film 84 formed on the surface of the semiconductor wafer 100 and the electrode pad 90 are formed.
To a transparent insulating film 43 such as silicon nitride.
To flatten the surface. After peeling off the protective metal film 106, a metal film for wiring is formed on the back surface of the semiconductor wafer 100 by vapor deposition or plating, and the metal film is patterned into a predetermined pattern by photolithography and etching to form a back electrode 96. I do.

Next, as shown in FIG. 18, a filter section 98 is provided on the insulating film 43 above the light receiving region of the solid-state imaging device, and a plurality of microlenses 50 are formed on the filter section 98. Here, the step of forming the filter section 98 will be described in more detail. A color filter array 46 including an R filter 46R, a G filter 46G, and a B filter 46B is formed via a planarizing film 44, and a plurality of micro lenses 5 are formed on the color filter array 46 via a planarizing film 48.
A microlens array with zeros is formed. The method of forming the color filter array 46 and the microlens 50 is the same as in the first embodiment, and a description thereof will be omitted. The diameter (that is, the pixel diameter) of the opening 40 of the photodiode 14 is 4 to 5 μm, and the microlens 50 covers the entire pixel and is formed with a height of about 2 μm. Note that the thickness from the semiconductor substrate 12 to the surface of the planarizing film 48 is about 5 μm.

Next, as shown in FIG. 19, the region other than the region 70 where the microlenses 50 are arranged, that is, the region 7
2, the adhesive 62 is applied with a thickness larger than a value obtained by adding the height of the micro lens 50 to the thickness of the filter portion 98,
The semiconductor wafer 100 and the transparent substrate 64 are overlapped, and the adhesive 62 is cured by irradiating ultraviolet rays from the transparent substrate 64 side, and the semiconductor wafer 100 and the transparent substrate 64 are bonded together. This bonding step is preferably performed in a vacuum or in an atmosphere of an inert gas such as nitrogen.

When bonding the semiconductor wafer 100 and the transparent substrate 64, the surface of the semiconductor wafer 100 (the insulating film 43)
In order to keep the distance between the front surface) and the transparent substrate 64 constant, each of the semiconductor wafer 100 and the transparent substrate 64 is fixedly held at a predetermined position by a predetermined holding mechanism (not shown).
By increasing the position accuracy of the bonding by the holding mechanism,
A spacer for keeping a constant distance between the wafer surface and the transparent substrate is not required, and the manufacturing process can be simplified by omitting the spacer forming step. Specifically, positional accuracy of about ± 10 μm is required.

Finally, as shown in FIG. 20, using a dicing saw, cutting is performed along a dicing line 112 substantially at the center of the dicing region 85, and each CCD is cut.
Then, the solid-state imaging device shown in FIGS. 9 and 10 can be obtained. It should be noted that the portion indicated as the semiconductor wafer 100 becomes the semiconductor substrate 12 after being separated into individual solid-state imaging devices.

As described above, the solid-state imaging device according to the present embodiment is constituted by a small package having a chip size.
In this CSP, the backside wiring can be performed using the embedded wiring connected to the electrode pad, and the wiring space is greatly reduced as compared with the case where the semiconductor chip is electrically connected by wire bonding to form a package. Accordingly, the solid-state imaging device can be miniaturized. In addition, since the entire manufacturing process including packaging, such as formation of electrode pads and lead wiring, can be performed in a wafer state, the manufacturing cost is significantly reduced as compared with a conventional solid-state imaging device. It is attached to the transparent substrate with an adhesive, but the adhesive is provided only around it except for the microlens arrangement area, so the microlens is covered with the adhesive and loses the function as a lens There is no. Further, since the thickness of the adhesive is set to be larger than the height of the microlenses, the microlenses do not come into contact with the transparent substrate and the lens surface is not damaged.

Further, when manufacturing the solid-state imaging device, each of the wafer and the transparent substrate is fixed and held at a predetermined position by a predetermined holding mechanism in order to keep a constant distance between the wafer surface and the transparent substrate. The positioning accuracy of the bonding can be improved without using the spacer, and the manufacturing process can be simplified by omitting the spacer forming step. In addition, since the package is divided into element units after being packaged, the surface of the solid-state imaging element is not stained at the time of dicing, and reliability can be ensured. In addition, CSP of shell case method
It is not necessary to stop the dicing halfway as in the case of (1), and the manufacturing is easy.

The present invention relates to a CCD area sensor, C
The present invention can be applied to all solid-state imaging devices including a micro lens such as a CD line sensor and a CMOS image sensor.

In the third embodiment, a solid-state imaging device having a single-layer circuit board has been described. However, in the third embodiment, a solid-state imaging device having a three-dimensional integrated circuit configuration having a plurality of circuit boards is described. It can also be applied to devices.

[0071]

According to the present invention, there is provided a solid-state image pickup device in which a solid-state image pickup device provided with a microlens is packaged without impairing the function of the microlens, and which is small and inexpensive. Can be. Further, according to the present invention, a method for manufacturing a solid-state imaging device, in which a solid-state imaging device having a microlens is packaged without impairing the function of the microlens and a miniaturized solid-state imaging device is manufactured at low cost. Can be provided.

[Brief description of the drawings]

FIG. 1 is a plan view of a solid-state imaging device according to a first embodiment.

FIG. 2 is a sectional view taken along line AA of the solid-state imaging device shown in FIG.

FIG. 3 is a cross-sectional view of the solid-state imaging device shown in FIG. 2 taken along line BB.

FIG. 4 is a sectional view illustrating a manufacturing process of the solid-state imaging device according to the first embodiment;

FIG. 5 is a sectional view illustrating a manufacturing process of the solid-state imaging device according to the first embodiment;

FIG. 6 is a sectional view illustrating a manufacturing step of the solid-state imaging device according to the first embodiment;

FIG. 7 is a cross-sectional view illustrating a manufacturing process of the solid-state imaging device according to the first embodiment.

FIG. 8 is a sectional view of a solid-state imaging device according to a second embodiment.

FIG. 9 is a plan view of a solid-state imaging device according to a third embodiment.

FIG. 10 is a sectional view taken along line AA of the solid-state imaging device shown in FIG. 9;

FIG. 11 is a partially enlarged view of a filter unit and a microlens of the solid-state imaging device shown in FIG. 9;

FIG. 12 is a sectional view illustrating a manufacturing process (circuit forming process) of the solid-state imaging device according to the third embodiment;

FIG. 13 is a sectional view illustrating a manufacturing process (through-hole forming process) of the solid-state imaging device according to the third embodiment;

FIG. 14 is a cross-sectional view illustrating a manufacturing step (surface oxidation step) of the solid-state imaging device according to the third embodiment;

FIG. 15 is a sectional view illustrating a manufacturing process (embedded wiring forming process) of the solid-state imaging device according to the third embodiment;

16A is a cross-sectional view illustrating a manufacturing process (electrode pad forming process) of the solid-state imaging device according to the third embodiment, and FIG. 16B is a cross-sectional view illustrating a pad electrode in the process illustrated in FIG. FIG. 4 is a plan view showing a connection relationship of a circuit unit.

FIG. 17 is a cross-sectional view illustrating a manufacturing step (a back electrode forming step) of the solid-state imaging device according to the third embodiment;

FIG. 18 is a cross-sectional view illustrating a manufacturing process (a filter portion and a microlens forming process) of the solid-state imaging device according to the third embodiment;

FIG. 19 is a cross-sectional view illustrating a manufacturing step (substrate bonding step) of the solid-state imaging device according to the third embodiment;

FIG. 20 is a sectional view illustrating a manufacturing step (cutting step) of the solid-state imaging device according to the third embodiment;

FIG. 21 is a cross-sectional view illustrating a configuration of a conventional solid-state imaging device.

22 (A) to 22 (C) show shell / case type CS
It is sectional drawing which shows the manufacturing process of P.

FIG. 23 is a cross-sectional view showing a configuration of a CSP of a shell case type.

[Explanation of symbols]

 Reference Signs List 12 semiconductor substrate 14 photodiode 20 vertical charge transfer channel 28 channel stop 32 transfer electrode (vertical transfer electrode) 33 vertical charge transfer device (VCCD) 43 insulating layer 44, 48 flattening film 46 color filter array 50 microlens 52, 88 semiconductor Chip 54, 62 Adhesive 56 Substrate 58, 90 Electrode pad 60 Spacer 64 Transparent substrate 66 Space 68, 100 Semiconductor wafer 70 Area (microlens arrangement area) 72 Area (peripheral area) 76 Dicing area 78 Groove 82 Lead wiring 84 Oxide film 92 through hole 94 buried wiring 96 back electrode 98 filter part 102 opening area

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4M118 AA10 AB01 CA03 FA06 FA26 FA33 GC08 GC14 GD04 GD07 HA02 HA11 HA29 5C024 CY47 CY48 EX22 EX24 EX43 5F061 AA00 BA03 CA26 FA06

Claims (9)

[Claims] 1. A semiconductor substrate on which a solid-state imaging device in which micro-lenses are arranged corresponding to respective light receiving regions is formed, and a micro-lens arrangement on a surface of the semiconductor substrate for supplying power to the solid-state imaging device. A front electrode provided in a region other than the region, a back electrode provided on a back surface of the semiconductor substrate, and electrically connecting the front electrode and the back electrode through a side surface of the semiconductor substrate or through the semiconductor substrate. Connecting means for electrically connecting, a transparent substrate disposed opposite to the microlens disposition area, and connecting the transparent substrate to the semiconductor substrate around the microlens disposition area so that the transparent substrate does not contact the microlens. And a sealing member for sealing a space between the transparent substrate and the semiconductor substrate. 2. The sealing member includes a spacer that separates the semiconductor substrate and the transparent substrate by a predetermined distance and surrounds a microlens arrangement region, and seals a space between the semiconductor substrate and the transparent substrate by bonding. The solid-state imaging device according to claim 1, which stops. 3. The solid-state imaging device according to claim 1, wherein the height of the spacer is such that the transparent substrate does not contact the microlens. 4. The solid-state imaging device according to claim 1, wherein the sealing member is an adhesive layer that seals a space between the semiconductor substrate and the transparent substrate by bonding. 5. The solid-state imaging device according to claim 1, wherein said connection means is a lead wiring provided on a side surface of the semiconductor substrate. 6. The solid-state imaging device according to claim 1, wherein said connection means is a buried wiring penetrating a semiconductor substrate. 7. The solid-state imaging device according to claim 1, wherein said adhesive is an ultraviolet curable resin. 8. A solid-state imaging device in which a microlens is arranged corresponding to each of the light receiving areas, a front electrode is provided in a region other than the microlens arrangement region on the front surface, and a back electrode is provided on the rear surface. A spacer is formed on at least one of the semiconductor substrate and the transparent substrate disposed opposite to the microlens placement region, and the transparent substrate and the semiconductor substrate are placed in the microlens placement region with the spacer interposed between the transparent substrate and the semiconductor substrate. A groove is cut out from the back surface of the transparent substrate and the semiconductor substrate, which are stuck in a region other than the microlens arrangement region of the surface electrode, so that an end of the surface electrode is exposed. A lead wiring for electrically connecting the front surface electrode and the back surface electrode is formed, and the attached transparent substrate and semiconductor substrate are cut into solid-state imaging devices at the bottom of the groove. Method for manufacturing a solid-state imaging apparatus for producing a solid-state imaging device. 9. A semiconductor substrate on which a solid-state imaging device is formed,
Forming a buried wiring penetrating the semiconductor substrate, providing a front surface electrode outside the light receiving region of the solid-state imaging device on the surface of the semiconductor substrate and providing a back surface electrode on the back surface, and the buried wiring forms the front surface electrode and the back surface electrode; Are electrically connected to each other, micro lenses are arranged corresponding to each of the light receiving areas of the solid-state imaging device, and the transparent substrate and the semiconductor substrate arranged opposite to the micro lens arranging area are spaced apart from each other by a predetermined distance. A method for manufacturing a solid-state imaging device in which a transparent substrate and a semiconductor substrate which are attached to each other in an area other than an arrangement area are cut into solid-state imaging elements to produce a solid-state imaging device.