JP2004063786A - Solid-state image sensing device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state image sensing device which is improved in drive speed by stacking up a peripheral circuit on the rear surface of a semiconductor substrate and reducing interconnect lines in resistance. <P>SOLUTION: The solid-state image sensing device is equipped with a first semiconductor substrate 101 where a solid state image sensing element is formed, and a transparent member 201 which is connected to the first semiconductor substrate 101 as confronting the light receiving region of the solid-state image sensing element through a gap. A second semiconductor substrate 701 containing the peripheral circuit is stacked up on the rear surface of the semiconductor substrate 101. <P>COPYRIGHT: (C)2004,JPO

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a solid-state imaging device and a manufacturing method thereof, and more particularly to a chip size package (CSP) type solid-state imaging device in which a microlens is integrated on a chip.
[0002]
[Prior art]
A solid-state imaging device including a CCD (Charge Coupled Device) is required to be downsized due to the necessity of application to a mobile phone, a digital camera, and the like.
As one of them, a solid-state imaging device in which a microlens is provided in a light receiving area of a semiconductor chip has been proposed. In such a case, for example, by integrally mounting a solid-state imaging device having a microlens in the light-receiving area so as to have an airtight sealing portion between the light-receiving area of the solid-state imaging device and the microlens, There has been proposed a solid-state imaging device that is miniaturized (Japanese Patent Laid-Open No. 7-202152).
[0003]
According to such a configuration, the mounting area can be reduced, and optical components such as a filter, a lens, and a prism can be bonded to the surface of the hermetic sealing portion, and the light collecting ability of the microlens can be improved. It is possible to reduce the mounting size without causing a decrease.
[0004]
[Problems to be solved by the invention]
However, when mounting such a solid-state imaging device, it is necessary to mount the signal on the support substrate on which the solid-state imaging device is mounted, to make electrical connection and to perform sealing by a method such as bonding, when taking out the signal to the outside. In addition, it is necessary to mount optical components such as a filter, a lens, and a prism, and a signal processing circuit. As described above, since the number of components is large, there is a problem that a lot of time is required for mounting. In addition, with the demand for improvement in resolution, various peripheral circuits are required, and the problem that the entire apparatus becomes large is becoming serious.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a solid-state imaging device manufacturing method that is easy to manufacture and highly reliable.
It is another object of the present invention to provide a solid-state imaging device that is small and has a high driving speed.
[0005]
[Means for Solving the Problems]
Therefore, the solid-state imaging device of the present invention is connected to the first semiconductor substrate formed with a solid-state imaging element and the first semiconductor substrate so as to have a gap facing the light receiving region of the solid-state imaging element. And a second semiconductor substrate including a peripheral circuit on the back side of the semiconductor substrate.
[0006]
According to such a configuration, since the peripheral circuits are stacked, the entire device can be reduced in size, and the distance between the first semiconductor substrate and the second semiconductor substrate can be shortened. Accordingly, the wiring resistance is reduced and the driving speed can be increased.
[0007]
Further, it is possible to obtain a stronger bond by bonding by a method such as room temperature direct bonding so that the first and second semiconductor substrates have a direct bonding surface. Also, electrical connection can be satisfactorily achieved.
[0008]
Moreover, desired joining can be easily performed by joining the first and second semiconductor substrates via an adhesive layer. Here, it is desirable to use an adhesive layer having a coefficient of thermal expansion that is as close as possible to the first and second semiconductor substrates.
[0009]
Furthermore, the first and second semiconductor substrates may be joined via a heat insulating material, whereby the heat of the second semiconductor substrate constituting the peripheral circuit is transferred to the solid-state imaging device substrate, It is possible to prevent adverse effects on the characteristics of the solid-state imaging device.
Furthermore, the first and second semiconductor substrates can be bonded together via a magnetic shield material, so that mutual noise due to unnecessary radiation can be blocked.
[0010]
The method of the present invention also includes a step of forming a plurality of solid-state imaging elements on the surface of the first semiconductor substrate, a step of forming a peripheral circuit on the surface of the second semiconductor substrate, A step of bonding the translucent member to the surface of the first semiconductor substrate so as to have a gap opposite to each other; and a semiconductor substrate bonding for bonding the second semiconductor substrate to the back side of the first semiconductor substrate. And a step of separating the joined body obtained in the joining step for each solid-state imaging device.
[0011]
According to such a configuration, the first semiconductor substrate on which the solid-state imaging device is mounted and the second semiconductor substrate on which the peripheral circuit is mounted are positioned at the wafer level with respect to the translucent member and are collectively mounted. In this way, since the solid-state imaging elements are separated after being integrated, it is possible to form a solid-state imaging apparatus that is easy to manufacture and highly reliable.
[0012]
Desirably, the semiconductor substrate bonding step is a step of bonding the first and second semiconductor substrates by direct bonding so that the substrate can be easily formed without causing contamination of the substrate due to the protruding adhesive.
[0013]
The semiconductor substrate bonding step may be such that the first and second semiconductor substrates are bonded via an adhesive layer, a photocurable adhesive layer, a thermosetting adhesive layer, or a combination thereof. Therefore, it becomes possible to easily join without misalignment.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below with reference to the drawings.
[0015]
(First embodiment)
This solid-state imaging device has a solid-state imaging comprising a silicon substrate 101 as a semiconductor substrate on which a solid-state imaging device 102 is formed, as shown in a sectional view in FIG. A glass substrate 201 as a translucent member is bonded to the surface of the element substrate 100 via a spacer 203S so as to have a gap C corresponding to the light receiving region of the silicon substrate 101, and a peripheral circuit substrate 901 is provided on the back side. Are connected.
Here, the through holes H formed in the silicon substrate 101 are taken out to the back side of the solid-state image sensor substrate 100, and pads 113 and bumps 114 are formed as external take-out terminals formed on the back surface of the solid-state image sensor substrate 100. ing. Then, it is connected to the peripheral circuit substrate 901 through the anisotropic conductive film 115, the periphery is individually separated by dicing, and external connection is made through the bonding pad 118. Here, the spacer 203S has a height of 10 to 500 μm, preferably 80 to 120 μm. Reference numeral 701 denotes a reinforcing plate.
[0016]
Here, as shown in the enlarged cross-sectional view of the main part of the solid-state image pickup device substrate 100, the solid-state image pickup devices are arranged on the surface, and the RGB color filter 46 and the micro lens 50 are formed. A silicon substrate 101 is used. Here, although the through hole does not appear in this cross section, it is formed so as to be connected to the charge transfer electrode 32.
[0017]
In this solid-state imaging device 100, a channel stopper 28 is formed in a p-well 101b formed on the surface of an n-type silicon substrate 101a, and a photodiode 14 and a charge transfer device 33 are formed with the channel stopper interposed therebetween. It will be. Here, the n-type impurity region 14b is formed in the p + channel region 14a, and the photodiode 14 is formed. In addition, a vertical charge transfer channel 20 made of an n-type impurity region having a depth of about 0.3 μm is formed in the p + channel region 14a, and the gate insulating film 30 made of a silicon oxide film is formed thereon. A vertical charge transfer electrode 32 made of a polycrystalline silicon layer is formed to constitute a charge transfer element 33. A read gate channel 26 formed of a p-type impurity region is formed between the vertical charge transfer channel 20 and the photodiode 14 on the side from which signal charges are read out. A through hole (not shown in FIG. 1B) is formed so as to connect to the vertical charge transfer electrode 32.
[0018]
The n-type impurity region 14b is exposed along the readout gate channel 26 on the surface of the silicon substrate 101, and the signal charge generated in the photodiode 14 is temporarily accumulated in the n-type impurity region 14b. The data is read out through the read gate channel 26.
[0019]
On the other hand, a channel stopper 28 made of a p + -type impurity region exists between the vertical charge transfer channel 20 and the other photodiodes 14, whereby the photodiodes 14 and the vertical charge transfer channels 20 are electrically separated. In addition, the vertical charge transfer channels 20 are separated from each other so as not to contact each other.
[0020]
Further, the vertical charge transfer electrode 32 is formed so as to cover the readout gate channel 26, expose the n-type impurity region 14b, and expose a part of the channel stopper 28. Signal charges are transferred from the readout gate channel 26 below the electrode to which the readout signal is applied among the vertical charge transfer electrodes 32.
[0021]
The vertical charge transfer electrode 32 and the vertical charge transfer channel 20 constitute a vertical charge transfer device (VCCD) 33 that transfers the signal charge generated at the pn junction of the photodiode 14 in the vertical direction. The surface of the substrate on which the vertical charge transfer electrode 32 is formed is covered with a surface protective film 36, and a light shielding film 38 made of tungsten is formed thereon, and only the light receiving area 40 of the photodiode is opened, and the other areas are shielded from light. Is configured to do.
[0022]
Further, the upper layer of the vertical charge transfer electrode 32 is covered with a planarizing insulating film 43 for planarizing the surface and a translucent resin film 44 formed on the upper layer, and a filter layer 46 is further formed on the upper layer. Yes. In the filter layer 46, a red filter layer 46R, a green filter layer 46G, and a blue filter layer 46B are sequentially arranged so as to form a predetermined pattern corresponding to each photodiode 14.
[0023]
Further, this upper layer is melted after patterning a transmissive resin containing a photosensitive resin having a refractive index of 1.3 to 2.0 through the planarization insulating film 48 by photolithography, and after being rounded by the surface tension, is cooled. This is covered with a microlens array formed by the microlenses 50.
[0024]
Next, the manufacturing process of this solid-state imaging device will be described. As shown in FIGS. 2A to 2D and FIGS. 3A to 3C, the manufacturing method is positioned at the wafer level and integrated by mounting in a lump. This is based on the so-called wafer level CSP method in which each solid-state imaging device is separated. (Hereinafter, only 2 units are shown in the drawing, but a large number of solid-state image pickup devices are continuously formed on the wafer.) In this method, the solid-state image pickup device substrate and the glass substrate have the same edge, The back surface side is taken out through a through hole penetrating the solid-state imaging device substrate 100 and the reinforcing plate 701 attached to the back surface. Further, here, a sealing cover glass 200 with a spacer in which a spacer 203S is formed in advance is used.
[0025]
First, formation of a glass substrate with a spacer will be described.
As shown in FIG. 2A, a silicon substrate 203 serving as a spacer is attached to the surface of a glass substrate 201 via an adhesive layer 202 made of an ultraviolet curable adhesive (cationic polymerizable energy ray curable adhesive). Then, the resist pattern R1 is left in a portion to be a spacer by an etching method using photolithography.
[0026]
Then, as shown in FIG. 2B, the silicon substrate 203 is etched using the resist pattern R1 as a mask to form a spacer 203S.
[0027]
Thereafter, as shown in FIG. 2C, with the resist pattern R1 for forming the spacer 203S remaining, the inter-spacer region except for the inter-element region is filled with resist, and the glass substrate is fixed to a predetermined depth. By etching up to this point, the inter-element groove portion 204 is formed as shown in FIG. Further, an adhesive layer 207 is formed on the surface of the spacer. Here, since the spacer is formed of a silicon substrate, if etching is performed under such etching conditions that the etching rate of silicon oxide, which is the main component of the glass substrate, is sufficiently larger than the etching rate of silicon, Etching may be performed with the side wall of the spacer exposed in the inter-element region. A dicing blade (grinding stone) may be used when forming the inter-element groove portion 204.
[0028]
Alternatively, photolithography may be performed again to form a resist pattern R that includes the entire sidewall of the spacer, and the groove 204 may be formed by etching through the resist pattern. Thus, the sealing cover glass 200 in which the groove portion 204 and the spacer 203S are formed is obtained.
[0029]
Next, a solid-state image sensor substrate is formed. When forming the element substrate, as shown in FIG. 3A, a silicon substrate 101 (here, a 4 to 8 inch wafer is used) is prepared. (Hereinafter, only one unit is shown in the drawing, but a large number of solid-state image pickup devices are continuously formed on the wafer.) Then, a channel stopper layer is formed using a normal silicon process, and a channel region is formed. To form device regions such as charge transfer electrodes. A reinforcing plate 701 made of a silicon substrate on which a silicon oxide film is formed is bonded to the back surface of the solid-state imaging device substrate 100 by surface active room temperature bonding. (Fig. 3 (a))
[0030]
Thereafter, as shown in FIG. 3B, alignment is performed using alignment marks formed on the peripheral edge of each substrate, and a flat glass substrate 201 is formed on the solid-state imaging device substrate 100 formed as described above. The cover glass 200 to which the spacer 203S is bonded is placed on the substrate, and both are integrated by the adhesive layer 207 by heating. This step is preferably performed in a vacuum or in an inert gas atmosphere such as nitrogen gas.
[0031]
Then, as shown in FIG. 3C, through holes H are formed from the back side of the reinforcing plate 701 by photolithography. Then, a silicon oxide film 109 is formed in the through hole H by CVD, and thereafter anisotropic etching is performed to leave the silicon oxide film 109 only on the side wall of the through hole.
[0032]
Then, as shown in FIG. 4 (a), a tungsten film is formed as a conductor layer 108 for bonding pads and the contact to the through hole H by the CVD method using WF _6.
[0033]
Then, as shown in FIG. 4B, a bonding pad 113 is formed on the surface of the reinforcing plate 701, and a bump 114 is formed.
In this way, the signal extraction electrode terminal and the energization electrode terminal can be formed on the reinforcing plate 701 side.
[0034]
Then, as shown in FIG. 4C, an anisotropic conductive film 115 (ACP) is applied to the surface of the reinforcing plate 701.
Finally, as shown in FIG. 4D, a circuit board 901 on which a drive circuit is formed is connected via this anisotropic conductive film 115. The circuit board 901 is provided with a contact layer 117 made of a conductor layer filled in a through hole H formed so as to penetrate the board and a bonding pad 118. Connection to the circuit board 901 can be performed by ultrasonic bonding, solder bonding, eutectic bonding, or the like.
Therefore, connection with a circuit board such as a printed circuit board can be easily achieved through the bonding pad 118.
[0035]
Thereafter, the entire device is diced along a dicing line DC including the contact layer 117 and the conductor layer 108 inside, and divided into individual solid-state imaging devices. (Although only one unit is shown in the drawing, a plurality of solid-state imaging devices are continuously formed on one wafer.)
In this way, a solid-state imaging device can be formed very easily with good workability.
Since the reinforcing plate 701 is composed of a silicon substrate on which a silicon oxide film is formed, heat insulation or electrical insulation with the solid-state imaging device substrate 100 is possible.
In the above-described embodiment, the conductor layer is formed in the through hole H by the CVD method. However, the contact hole having a high aspect ratio and high workability can be easily obtained by using a plating method, a vacuum screen printing method, or a vacuum suction method. It is possible to fill the conductor layer.
Furthermore, in the above embodiment, the electrical connection between the front and back surfaces of the circuit board on which the solid-state imaging device substrate and the peripheral circuit are mounted using the through holes is not limited to this. It is also possible to form a contact so that the front and back are electrically connected by impurity diffusion.
In this way, the signal extraction electrode terminal and the energization electrode terminal can be formed on the reinforcing plate 701 side.
[0036]
Furthermore, since the individual parts are separated after being mounted together without performing individual positioning or electrical connection such as wire bonding, manufacturing is easy and handling is easy.
[0037]
Further, since the groove portion 204 is formed in the glass substrate 201 in advance and is removed from the surface to the depth reaching the groove portion 204 by a method such as CMP after mounting, it can be divided very easily. is there.
[0038]
In addition, individual solid-state imaging elements can be formed by simply cutting or polishing while the element forming surface is sealed in the gap C by bonding, so there is little damage to the elements, no dust contamination, and reliability. It is possible to provide a solid-state imaging device with high performance.
[0039]
Furthermore, since the silicon substrate is thinned to a depth of about one half by CMP, the size and thickness can be reduced. Furthermore, since the thickness is reduced after bonding with the glass substrate, it is possible to prevent a decrease in mechanical strength.
[0040]
As described above, according to the configuration of the present invention, since positioning is performed at the wafer level and integrated by mounting in a lump, and then separated for each solid-state imaging device, manufacturing is easy and reliable. It is possible to form a solid-state imaging device having a high height.
[0041]
In the embodiment described above, the wafer level CSP is used for batch connection and dicing. However, the solid-state imaging device substrate 100 in which the through holes H are formed and the bumps 114 are formed is diced one by one. Alternatively, the sealing cover glass 200 may be fixed.
The microlens array can also be formed by forming a transparent resin film on the substrate surface and forming a lens layer having a refractive index gradient at a predetermined depth by ion transfer from the surface.
[0042]
In addition to the silicon substrate, glass, polycarbonate or the like can be appropriately selected as the spacer.
[0043]
(Second Embodiment)
Next, a second embodiment of the present invention will be described.
In the first embodiment, the through hole H is formed so as to penetrate the reinforcing plate 701 and the conductor layer 111 is formed. However, in the present embodiment, a silicon substrate in which holes (vertical holes) are formed in advance is used. To form a solid-state imaging device substrate. Thereby, since the formation depth of the vertical hole can be shallow, productivity can be improved and the manufacturing yield can be improved.
[0044]
That is, as shown in FIG. 5A, prior to forming the solid-state imaging device, first, a resist pattern is formed on the back surface of the silicon substrate by photolithography, and RIE (reactive ion etching) is performed using this resist pattern as a mask. Thus, the vertical hole 118 is formed. In this step, a pad 110 made of aluminum or the like is formed on the surface, and a vertical hole 118 is formed so as to reach this pad.
[0045]
Then, as shown in FIG. 5B, a silicon oxide film 119 is formed on the inner wall of the vertical hole by the CVD method.
And as shown in FIG.5 (c), the element area | region for solid-state image sensor formation was formed using the normal silicon process like the said each embodiment.
And as shown in FIG.5 (d), it aligns with the alignment mark formed in the peripheral part of each board | substrate, on the solid-state image sensor board | substrate 100 formed as mentioned above, on the flat glass substrate 201 The cover glass 200 to which the spacer 203S is bonded is placed and heated, and both are integrated by the adhesive layer 207. Again, the bonding step may use surface activated room temperature bonding.
[0046]
Then, as shown in FIG. 5E, a reinforcing plate 701 is joined to the back surface side of the solid-state image pickup device substrate 100 by surface activation normal temperature joining, and the vertical holes 118 are formed by etching using photolithography from the back surface side. The through hole 108 is formed so as to reach. Again, it is desirable that the inner wall of the through hole be insulated. Moreover, you may make it use the reinforcement board which formed the through hole previously.
[0047]
Thereafter, by performing the steps shown in FIGS. 4A to 4D described in the first embodiment, a solid-state imaging device having a structure in which even a circuit board on which peripheral circuits are formed is easily formed. Is done.
As described above, according to the present embodiment, the vertical hole can be formed with a shallow depth, so that the productivity can be improved and the manufacturing yield can be improved.
[0048]
(Third embodiment)
Next, a third embodiment of the present invention will be described.
In the second embodiment, the contacts are formed so as to penetrate the reinforcing plate 701, the solid-state imaging device substrate, and the circuit board, and the electrodes are taken out from the circuit board side. In this embodiment, FIG. As shown in (a) and (b), a conductor layer 120 as a wiring layer is formed on the side wall, and electrodes are taken out from the side wall of the solid-state imaging device.
The manufacturing process is formed in substantially the same manner as in the second embodiment, but the position of the through hole is formed so as to correspond to the end of each solid-state imaging device, and the cutting line DC including the through hole is formed. The solid-state imaging device in which the wiring layer is formed on the side wall can be easily formed by dicing.
In addition, by configuring the conductor layer 120 filling the through hole with a light-shielding material such as tungsten, the solid-state imaging device is shielded from light so that malfunctions can be reduced.
Further, if this reinforcing plate is made of polyimide resin, ceramic, crystallized glass, a silicon substrate whose front and back surfaces are oxidized, etc., it can serve as a heat insulating substrate. Moreover, you may make it form with a light shielding material.
[0049]
(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described.
In the second and third embodiments, the back surface side of the solid-state image pickup device substrate 100 is laminated on the peripheral circuit board via a reinforcing plate. In this embodiment, FIGS. As shown, the solid-state imaging device substrate 100 is stacked on a peripheral circuit substrate 901, and reinforcing plates 701 are sequentially stacked on the back surface side of the peripheral circuit substrate.
[0050]
This reinforcing plate also serves as a heat sink.
The manufacturing process is formed in substantially the same manner as in the second and third embodiments, but the connection resistance is reduced and the high-speed operation is achieved because the solid-state image pickup device substrate 100 and the peripheral circuit substrate 901 are arranged close to each other. Drive becomes possible.
[0051]
(Fifth embodiment)
Next, a fifth embodiment of the present invention will be described.
In this example, in the fifth embodiment, the through hole is formed inside the substrate, and the electrode is taken out on the back side of the peripheral circuit board. In this example, as shown in FIG. A conductive layer 121 as a wiring layer is formed on the substrate.
[0052]
At the time of manufacture, as in the third embodiment, a solid-state imaging device having a sidewall wiring can be easily formed simply by setting the dicing line to a position including a contact formed in a through hole or the like. Is possible.
In this solid-state imaging device, since the wiring is formed on the side wall, a signal extraction terminal and a current supply terminal can be formed on the side wall. However, it goes without saying that the connection may be made by forming pads and bumps on the back surface of the peripheral circuit board 901. Reference numeral 701 denotes a reinforcing plate.
[0053]
(Sixth embodiment)
As shown in the cross-sectional view of FIG. 98, this solid-state imaging device corresponds to a light-receiving region of the silicon substrate 101 on the surface of the solid-state imaging device substrate 100 including a silicon substrate 101 as a semiconductor substrate on which the solid-state imaging device 102 is formed. Then, the glass substrate 201 as a translucent member is bonded via the spacer 203S so as to have a gap C, and formed on the glass substrate 201 and the spacer 203S so as to be connected to the bonding pad BP of the silicon substrate 101. The conductive layer 209 is formed in the through-hole 208 formed, and the pad 210 is formed on the upper surface of the glass substrate, and the signal extraction terminal and the current supply terminal are formed above. Here, the spacer 203S has a height of 10 to 500 μm, preferably 80 to 120 μm.
[0054]
Here, the solid-state image pickup device substrate is shown in FIG. 1B with an enlarged cross-sectional view of the main part, and like the solid-state image pickup device substrate of the first embodiment, the solid-state image pickup device is arranged on the surface. The silicon substrate 101 on which the RGB color filter 46 and the microlens 50 are formed.
[0055]
Next, the manufacturing process of this solid-state imaging device will be described. This method is integrated after positioning at the wafer level and mounting in a lump as shown in FIGS. 10 (a1) to (f) and FIGS. 11 (a) to (e). This is based on the so-called wafer level CSP method in which each solid-state imaging device is separated. (Although only one unit is shown in the drawing, a plurality of solid-state imaging elements are continuously formed on one wafer.) In this method, a spacer 203S is formed in advance and a through-hole penetrating the glass substrate and the spacer is formed. A sealing cover glass with a spacer 200 in which holes are formed is used.
[0056]
That is, in this method, a spacer 203S is attached to a glass substrate 201 constituting the sealing cover glass 200, and in that state, a through hole 208 is formed so as to penetrate the spacer and the glass substrate, and a conductor layer is formed thereon. And a signal extraction terminal and a current supply terminal are formed on the surface of the sealing cover glass.
[0057]
First, as shown in FIG. 10A1, a silicon substrate 203 having a thickness of 10 to 500 μm for forming a spacer is prepared.
Next, as shown in FIG. 10 (a2), a glass substrate 201 for constituting the sealing cover glass 200 is prepared.
Then, as shown in FIG. 10B, an adhesive layer 202 is applied to the surface of the substrate 203.
[0058]
Thereafter, as shown in FIG. 10C, a silicon substrate 203 coated with an adhesive layer 202 is adhered to the surface of the glass substrate 201.
[0059]
Subsequently, as shown in FIG. 10D, a resist pattern is formed by photolithography, and RIE (reactive ion etching) is performed using the resist pattern as a mask, so that a region corresponding to the photodiode, that is, a light receiving region (FIG. An adhesive is applied in advance so as to remove the recess 205 including the region corresponding to 40) in b), or after RIE, removal treatment is performed with oxygen plasma or the like.
[0060]
Subsequently, as shown in FIG. 10E, a resist pattern is formed by photolithography, RIE (reactive ion etching) is performed using this resist pattern as a mask, and a through hole is formed so as to penetrate the spacer 203S and the glass substrate 201. 208 is formed.
[0061]
Then, if necessary, a silicon oxide film (not shown) is formed at least on the inner wall of the spacer made of silicon by CVD.
Note that this step is not necessary when the spacer is formed of an insulator such as glass or resin. Further, a light shielding film may be formed on the inner wall or the outer wall of the spacer.
[0062]
Thereafter, as shown in FIG. 11 (a), a conductor layer 209 is formed on the inner wall of the through hole whose inner wall is insulated by vacuum screen printing or metal plating using a conductive paste such as silver paste or copper paste. A through contact region that penetrates the spacer 203S and the glass substrate 201 is formed.
[0063]
Then, as shown in FIG. 11B, gold bonding pads 210 and 211 or bumps 212 are formed on the front and back surfaces of the glass substrate with spacers so as to be connected to the through contact region. Here, when forming the film, a gold thin film is formed on the front surface and the back surface and patterned by an etching method using photolithography, or screen printing, selective plating, or the like can be applied.
[0064]
Further, as shown in FIG. 11C, an anisotropic conductive resin film 213 is applied.
[0065]
On the other hand, as shown in FIG. 11D, a solid-state imaging device substrate 100 formed with a reinforcing plate 701 is prepared.
[0066]
Then, as shown in FIG. 11E, alignment is performed using alignment marks formed on the peripheral edge of each substrate, and the flat glass substrate 201 is placed on the solid-state imaging device substrate 100 formed as described above. The cover glass 200 to which 203S is bonded is placed and heated, and both are integrated by the anisotropic conductive film 213. For this integration, ultrasonic diffusion bonding, solder bonding, eutectic bonding, or the like can also be applied.
[0067]
Thereafter, the entire device is diced along the dicing line DC and divided into individual solid-state imaging devices.
In this way, a solid-state imaging device in which a contact region such as a bonding pad is formed on the sealing cover glass is formed extremely easily and with good workability.
[0068]
In this way, since the individual parts are separated after being collectively mounted without performing individual positioning or electrical connection such as wire bonding, manufacturing is easy and handling is easy.
[0069]
(Seventh embodiment)
Next, a seventh embodiment of the present invention will be described.
In the sixth embodiment, the solid-state imaging device has been described in which a through-hole penetrating the glass substrate and the spacer is formed, and a contact region such as a bonding pad is formed on the sealing cover glass. In the form, this modification will be described.
[0070]
First, the present embodiment is characterized by the formation of a through hole in a spacer, and a glass substrate 201 is prepared as shown in FIG.
And as shown in FIG.12 (b), the photocurable resin is formed in the surface of this glass substrate 201 by the optical modeling method, and the spacer 213 is formed.
[0071]
Thereafter, as shown in FIG. 12C, a through hole 208 is formed by an etching method using photolithography.
Thus, it is possible to easily obtain a sealing cover glass having a spacer and a through hole.
[0072]
After that, the mounting process shown in FIGS. 9A to 9E is executed in the same manner as described in the sixth embodiment, and is bonded to the solid-state imaging device substrate, and then dicing is performed. Thus, it is possible to obtain the solid-state imaging device shown in FIG.
[0073]
According to this method, the spacer is easily formed. In this embodiment, a photo-curing resin is used, but the adhesive itself may be used. Since the glass substrate and the spacer are integrally formed, it is possible to reduce warpage and distortion, and manufacture is also easy.
[0074]
(Eighth embodiment)
Next, an eighth embodiment of the present invention will be described.
In the sixth embodiment, a silicon substrate for spacer formation is attached to a glass substrate and patterned, but in this embodiment, the glass substrate is etched in one etching process. Thus, the recess and the through hole may be formed simultaneously. Other parts are formed in the same manner as in the sixth embodiment.
[0075]
First, in this embodiment, a glass substrate 201 is prepared as shown in FIG.
And as shown in FIG.13 (b), the resist pattern R is formed in the surface and the back surface of this glass substrate 201, the area | region which should form a through hole has opening in both front and back, and the recessed part 205, If necessary, an area where the cutting groove 204) is to be formed has an opening only on the back surface side.
[0076]
Thereafter, as shown in FIG. 13C, the glass substrate is etched from both sides using the front and back resist patterns as a mask to form a recess 205, a cut groove (not shown), and a through hole 208 at the same time.
[0077]
Thus, it is possible to easily obtain the sealing cover glass in which the spacers are integrally formed and the through holes are formed.
After that, the mounting process shown in FIGS. 11A to 11E is performed in the same manner as described in the sixth embodiment, and is bonded to the solid-state image pickup device substrate, and then dicing is performed. As a result, the solid-state imaging device shown in FIG.
Since the glass substrate and the spacer are integrally formed, it is possible to reduce warpage and distortion, and manufacture is also easy.
[0078]
(Ninth embodiment)
Next, a ninth embodiment of the present invention will be described.
In the sixth embodiment, a silicon substrate for spacer formation is attached to a glass substrate and patterned, but in this embodiment, a spacer already patterned on the glass substrate 201. 203S is pasted, and finally a through hole is formed by an etching process. Other parts are formed in the same manner as in the sixth embodiment.
[0079]
First, in the present embodiment, a glass substrate 201 is prepared as shown in FIG.
On the other hand, as shown in FIG. 14A2, a silicon substrate 203 for spacer formation is prepared.
Then, as shown in FIG. 14B, the silicon substrate 203 is processed by an etching method using photolithography to obtain a spacer 203S.
[0080]
Thereafter, as shown in FIG. 14C, an adhesive 202 is applied to the surface of the patterned spacer.
And as shown in FIG.14 (d), spacer 203S is stuck, aligning with the glass substrate 201. FIG.
Thereafter, as shown in FIG. 14E, a through hole 208 is formed by an etching method using photolithography.
[0081]
In this way, it is possible to easily obtain a sealing cover glass in which a spacer is attached and a through hole is formed.
[0082]
Then, if necessary, a silicon oxide film (not shown) is formed at least on the inner wall of the spacer made of silicon by CVD.
Note that this step is not necessary when the spacer is formed of an insulator such as glass or resin. Further, a light shielding film may be formed on the inner wall or the outer wall of the spacer.
[0083]
(Tenth embodiment)
Next, a tenth embodiment of the present invention will be described.
In the sixth embodiment, a silicon substrate for forming a spacer is attached to a glass substrate, this is patterned, and finally, a through hole penetrating the glass substrate and the spacer is formed by etching. In this embodiment, as shown in FIGS. 7A1 to 7F, the spacer 203S formed by etching the silicon substrate to form the through hole 208a shown in FIG. 7E1 and FIG. The glass substrate 201 on which the through-hole 208b shown in (b2) is formed is aligned using an alignment mark at the wafer level and bonded using the adhesive layer 202. Other portions are formed in the same manner as in the twenty-eighth embodiment.
[0084]
In this case, it is also possible to form the light shielding film (215) on the inner wall where the concave portion of the spacer is desired.
According to such a method, since the through holes are individually formed and bonded, alignment is necessary, but since the aspect ratio may be about half, the formation of the through holes becomes easy.
[0085]
After that, the mounting process shown in FIGS. 3A to 3E is executed in the same manner as described in the first embodiment, and is bonded to the solid-state imaging device substrate, and then dicing is performed. As a result, the solid-state imaging device shown in FIG.
[0086]
(Eleventh embodiment)
Next, an eleventh embodiment of the present invention will be described.
In the sixth embodiment, a silicon substrate for spacer formation is attached to a glass substrate, and after forming a conductor layer 209 in a through hole that penetrates the glass substrate and the spacer, the solid-state imaging device substrate 100 is formed. In this embodiment, as shown in FIGS. 16A to 16D, the sixth to ninth implementations are applied to the solid-state imaging device substrate 100 formed by attaching a reinforcing plate 701 to the back surface. The glass substrate 200 with a spacer formed with the through-hole 208 formed in the above form is aligned and bonded at the wafer level, and then the conductor layer 209 is formed in the through-hole 208. It is what. A bonding pad 210 is formed so as to be connected to the conductor layer 209. Other portions are formed in the same manner as in the first embodiment.
Again, when the conductor layer 209 is embedded, it can be easily formed by vacuum screen printing using a conductive paste such as copper paste or metal plating.
[0087]
In the above-described embodiment, the method of bonding the glass substrate constituting the sealing cover glass and the spacer and the bonding of the solid-state imaging device substrate and the sealing cover glass using the adhesive layer has been described. However, in all the embodiments, when the surface of the spacer and the solid-state imaging device substrate is Si, a metal, or an inorganic compound, it can be appropriately bonded by surface activated room temperature bonding without using an adhesive. If the cover glass is Pyrex, anodic bonding can also be used when the spacer is Si. When the adhesive layer is used, not only the UV adhesive but also a thermosetting adhesive, a semi-curable adhesive, and a thermosetting combined UV curable adhesive may be used as the adhesive layer.
[0088]
As described in the first embodiment, in all the embodiments, as a spacer, in addition to a silicon substrate, 42 alloy, metal, glass, photosensitive polyimide, polycarbonate resin, and the like can be appropriately selected.
[0089]
In addition, when the solid-state imaging device substrate and the sealing cover glass are joined using the adhesive layer, it is preferable that the melted adhesive layer does not flow out by forming a liquid reservoir. The same applies to the joint between the spacer and the solid-state imaging device substrate or the sealing cover glass. The melted adhesive layer flows out by forming a concave or convex portion in the joint and forming a liquid reservoir. Do not do it.
[0090]
In the above-described embodiment, the element formed with the cut groove is separated into individual elements by CMP up to the position of the cut groove. However, grinding, polishing, whole surface etching, or the like can also be used.
[0091]
Moreover, in the said embodiment, when using a reinforcement board (701), as a material, if it comprises a polyimide resin, a ceramic, crystallized glass, the silicon substrate etc. which oxidized the surface and the back surface as needed, heat insulation will be carried out. It can have the role of a substrate. Moreover, you may make it form with a moisture-proof sealing material and a light-shielding material.
[0092]
Further, when forming the adhesive layer, it is possible to appropriately select supply with a dispenser, screen printing, stamp transfer, and the like.
[0093]
In addition, the examples described in each embodiment can be applied to all forms.
[0094]
【The invention's effect】
As described above, according to the present invention, it is possible to form a solid-state imaging device that is small and has a high driving speed.
Further, according to the method of the present invention, positioning is performed at the wafer level, and the solid-state image pickup device substrate, the peripheral circuit substrate, and the translucent member are integrated by being mounted together and then separated for each solid-state image pickup device. Therefore, manufacturing is easy and positioning with high accuracy is possible.
[Brief description of the drawings]
FIGS. 1A and 1B are a cross-sectional view and an enlarged cross-sectional view showing a main part of a solid-state imaging device according to a first embodiment of the present invention.
FIGS. 2A to 2D are diagrams showing manufacturing steps of the solid-state imaging device according to the first embodiment of the present invention.
FIG. 3 is a diagram showing a manufacturing process of the solid-state imaging device according to the first embodiment of the present invention.
FIG. 4 is a diagram showing a manufacturing process of the solid-state imaging device according to the first embodiment of the present invention.
FIG. 5 is a diagram illustrating a manufacturing process of the solid-state imaging device according to the second embodiment of the present invention.
FIG. 6 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the third embodiment of the present invention.
FIG. 7 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the fourth embodiment of the present invention.
FIG. 8 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the fifth embodiment of the present invention.
FIG. 9 is a sectional view showing a solid-state imaging device according to a sixth embodiment of the present invention.
FIG. 10 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the sixth embodiment of the present invention.
FIG. 11 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the sixth embodiment of the present invention.
FIG. 12 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the seventh embodiment of the present invention.
FIG. 13 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the eighth embodiment of the present invention.
FIG. 14 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the ninth embodiment of the present invention;
FIG. 15 is a diagram illustrating manufacturing steps of the solid-state imaging device according to the tenth embodiment of the present invention;
FIG. 16 is a diagram showing manufacturing steps of the solid-state imaging device according to the eleventh embodiment of the present invention.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100 Solid-state image sensor board | substrate 101 Silicon substrate 102 Solid-state image sensor 200 Sealing cover glass 201 Glass substrate 203S Spacer

Claims (8)

A first semiconductor substrate formed with a solid-state imaging device;
A translucent member connected to the first semiconductor substrate so as to have a gap facing the light receiving region of the solid-state imaging device,
2. A solid-state imaging device, wherein a second semiconductor substrate including a peripheral circuit is laminated on the back side of the semiconductor substrate. The solid-state imaging device according to claim 1, wherein the first and second semiconductor substrates are bonded so as to have a direct bonding surface. The solid-state imaging device according to claim 1, wherein the first and second semiconductor substrates are bonded via an adhesive layer. The solid-state imaging device according to claim 1, wherein the first and second semiconductor substrates are bonded via a heat insulating material. The solid-state imaging device according to claim 1, wherein the first and second semiconductor substrates are bonded via a magnetic shield material. Forming a plurality of solid-state imaging elements on the surface of the first semiconductor substrate;
Forming a peripheral circuit on the surface of the second semiconductor substrate;
Bonding the translucent member to the surface of the first semiconductor substrate so as to have a gap facing each light receiving region of the solid-state imaging device;
A semiconductor substrate bonding step of bonding the second semiconductor substrate to the back side of the first semiconductor substrate;
And a step of separating the joined body obtained in the joining step for each solid-state imaging device. The method of manufacturing a solid-state imaging device according to claim 6, wherein the semiconductor substrate bonding step is a step of bonding the first and second semiconductor substrates by direct bonding. The method of manufacturing a solid-state imaging device according to claim 6, wherein the semiconductor substrate bonding step is a step of bonding the first and second semiconductor substrates through an adhesive layer.

Images