JP2002094064A - Thin-film transistor, method for manufacturing the same, liquid crystal display device and electroluminescence display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide the thin film transistor of superior characteristics in the thin-film transistor of a top gate type, to simplify the manufacturing process and to substantially improve productivity. SOLUTION: A laminated film composed of a semiconductor layer, a gate insulation layer and a gate electrode layer is formed on an insulator, the laminated film is etched with a first resist pattern formed on it as a mask, then the first resist pattern is worked into a second resist pattern, and at least the gate electrode layer is etched with the second resist pattern as the mask. Thereafter, a low-resistance semiconductor film to be a source/drain region and an inter- layer insulation film are successively formed, a contact hole to the source/drain region is opened, and a source/drain electrode is formed.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a thin film transistor and a display device using the same.

[0002]

2. Description of the Related Art As a thin film transistor (TFT) applied to a liquid crystal display device or the like, a bottom gate type TFT represented by an inverted stagger type and a top gate type TFT represented by a coplanar type are used. Conventionally, inverted stagger type TFTs whose manufacturing process is relatively easy to simplify are mainly used for liquid crystal displays and the like, but with the recent increase in size and definition of liquid crystal displays, TF
There is a demand for miniaturization of T and reduction of its parasitic capacitance. To achieve this, a top-gate type TFT structure that can easily form self-aligned source / drain regions is advantageous. .

Further, the electrostatic breakdown phenomenon in which a scanning line connected to a gate electrode and a signal line connected to a source electrode are short-circuited or disconnected due to static electricity generated during a manufacturing process is a factor that lowers product yield. As one of the major factors, as a countermeasure to prevent the electrostatic breakdown, the scanning lines and the signal lines are often intentionally electrically connected during the manufacturing process. In the case of a bottom gate structure, it is necessary to newly add a step of exposing the gate electrode in order to take measures against static electricity. However, in the case of a coplanar type top gate TFT, a step of opening a contact hole is originally required. For this reason, there is also a feature that it is not necessary to add a new process and that measures against static electricity are easy.

This top gate type TFT structure has been put to practical use mainly for TFTs using low-temperature polysilicon as an active layer. Hereinafter, a method of manufacturing a conventional top gate TFT will be described with reference to FIG.

FIG. 3 is a schematic view showing the steps of a conventional top gate type TFT. First, a silicon oxide film having a thickness of 100 to 500 nm is formed as a buffer layer 2 on a substrate 1 such as glass by a normal pressure CVD method or the like.

Next, a semiconductor film 3 is formed to a thickness of 10 to 100 nm by a plasma CVD method or the like (FIG. 3).
(A)). If necessary, the semiconductor film 3 may be
Heat treatment at 600 ° C., irradiation with excimer laser, or the like may be performed.

Next, the semiconductor film 3 is patterned by a first photolithography step and an etching step, and the gate insulating film 4 is formed thereon by a normal pressure CVD method or the like.
Is formed with a thickness of 50 to 300 nm (FIG. 3B).

Next, a metal film made of Ti, Mo, W, Al, Ta or the like is formed to a thickness of 50 to 300 nm,
The gate electrode 5 is formed by etching the metal film using the photoresist patterned by the photolithography step as a mask.

Next, using the gate electrode 5 as a mask, ions containing impurities are implanted to form a first low-resistance semiconductor film 7 to be an LDD region (FIG. 3C). The formation of the first low-resistance semiconductor film 7 is performed, for example, in the formation of an n-type layer.
This is performed by ion doping using hydrogen diluted 5% PH ₃ as an ion source gas. Conditions for applying ion doping are as follows: acceleration voltage: 5 to 100 kV, total ion implantation amount: 10
¹³ to 10 ¹⁵ cm ^-2 . For these conditions, optimal conditions and gas concentrations are appropriately selected according to the thickness of the mask, the thickness of the doping layer to be formed, and the like.

Next, a pattern of a resist 6 is formed by a third photolithography step so as to cover the gate electrode 5, and using this as a mask for ion doping, ions containing impurities are implanted to form source / drain regions. A second low-resistance semiconductor film 8 is formed (FIG. 3D).
The second low-resistance semiconductor film 8 is formed by, for example, ion doping using hydrogen-diluted 5% PH ₃ as an ion source gas in forming an n-type layer. Conditions for applying ion doping are as follows: acceleration voltage: 5 to 100 kV, total ion implantation amount: 10 ^{< 14} > to 10 ^{< 16} > cm ^<-2 >. For these conditions, optimal conditions and gas concentrations are appropriately selected according to the thickness of the mask, the thickness of the doping layer to be formed, and the like.

Next, a silicon oxide film serving as the interlayer insulating film 10 is formed to a thickness of 100 to 500 nm by normal pressure CVD, plasma CVD, sputtering, or the like, and an electrode contact to the source / drain region is made. For this purpose, a silicon oxide film is opened by fourth photolithography and etching (FIG. 3E).

After forming a metal film made of Ti, Mo, W, Al, Ta or the like, a source / drain electrode 12 is formed by fifth photolithography and etching to complete a thin film transistor (FIG. 3 (f)). )).

When applied to a liquid crystal display device,
After the passivation film 11 is formed by a plasma CVD method or the like, a contact hole to the drain electrode is formed by sixth photolithography and etching (FIG. 3G).

Finally, a transparent conductive film such as ITO is formed, and a pixel electrode is formed by the seventh photolithography and etching to complete a thin film transistor used for a display device (FIG. 3 (h)).

In the top gate type TFT thus formed, since the LDD region or the source / drain region is formed in a self-aligned manner with respect to the gate electrode, the source / drain region and the gate electrode overlap. The generated parasitic capacitance can be reduced.

[0016]

However, in the above-described conventional method of manufacturing a top gate type thin film transistor, photolithography is performed five times to form a TFT and seven times to apply to a display device. Process is required, compared to the reverse staggered TFT manufacturing process,
Since the number of processes is increased, there is a problem that productivity is low and manufacturing cost is increased. This problem is particularly problematic when applied to a display device. In a conventional thin film transistor, after a semiconductor film is patterned, a gate insulating film and a gate electrode are formed. Therefore, a step caused by the semiconductor film needs to be covered with the gate insulating film, and the thickness of the gate insulating film is increased. Needed.

A method for simplifying the manufacturing process of a thin film transistor is to form a resist pattern having an uneven surface on a surface by using a mask provided with a light-shielding portion and a semi-transparent portion in a photolithography process. A method of forming a plurality of patterns in a photolithography process, that is, a method using so-called gray-tone exposure is disclosed in
No. 307780. However, the method described therein can be applied to a channel dug-down type bottom gate TFT, but cannot be applied to a top gate type TFT.

Further, a gate electrode, a gate insulating film and a
Japanese Patent Application Laid-Open No. 6-250211 discloses a method of reducing the number of steps by etching a stacked body of a Si film at a time. When this method is applied to a top gate type, particularly a coplanar type TFT, In this method, after a stacked body of a gate electrode, a gate insulating film and a semiconductor film is collectively etched, it is necessary to remove the gate electrode only in a portion to be a source / drain region of the semiconductor film, and the number of steps is not reduced.
Also, in the case of manufacturing a bottom gate type TFT, in order to connect the gate electrode and the source electrode as a measure against static electricity, a process of exposing the gate electrode by removing an insulating film and a semiconductor film on a part of the gate electrode is required. Required
There is also a problem that the number of processes increases.

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a thin film transistor having excellent characteristics and greatly reducing the number of manufacturing steps, a display device using the same, and a manufacturing method thereof. I do.

[0020]

In order to achieve the above object, in a thin film transistor according to the present invention, the thickness of the gate insulating film is reduced because the lower layer of the gate electrode is a laminated film of a gate insulating film and a semiconductor film. TF
The ON current of T increases.

In another thin film transistor according to the present invention, the source electrode and the drain electrode are partially formed of a light-transmitting conductive film having a laminated structure with a metal film. Can be realized with a small number of steps.

In the thin film transistor according to another aspect of the present invention, the source electrode and the drain electrode are connected to the semiconductor film via the metal silicide layer, so that the contact resistance decreases and the ON current increases.

Further, in the method of manufacturing a thin film transistor according to the present invention, after the laminated film including the semiconductor layer, the gate insulating layer and the gate electrode layer is etched using the first resist pattern as a mask, the first resist pattern is And the etching is performed using the second resist pattern as a mask, so that the number of TFT manufacturing steps can be reduced.

In another aspect of the method of manufacturing a thin film transistor according to the present invention, the side surface of the laminated film including the semiconductor layer, the gate insulating layer, and the gate electrode layer is protected by a side wall protective film, and / or Is covered with the oxide insulating film of the gate electrode, it is possible to reduce leakage current and short circuit between the electrodes.

In another method of manufacturing a thin film transistor according to the present invention, a laminated film comprising a light-transmitting conductive film and a metal film is etched using the first resist pattern as a mask, and then the first resist pattern is converted to the second resist film. And the etching is performed using the second resist pattern as a mask, so that the number of steps of manufacturing a transmission type or semi-transmission type TFT is reduced.

Further, since the liquid crystal display device according to the present invention is driven by the thin film transistor according to the present invention, the productivity of a liquid crystal display device having excellent display performance can be greatly improved.

Further, since the electroluminescent display device according to the present invention is driven by the thin film transistor according to the present invention, the productivity of the electroluminescent display device having excellent display performance can be greatly improved.

Hereinafter, the operation of the present invention will be described.

According to the structure of the thin film transistor of the present invention, the structure is simplified and the ON current is improved as compared with the prior art. Thus, according to the method for manufacturing a thin film transistor of the present invention, the number of manufacturing steps is reduced as compared with the conventional method, so that productivity can be improved and manufacturing cost can be reduced.

According to the liquid crystal display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the high quality liquid crystal display device is improved. .

Further, according to the electroluminescent display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the electroluminescent display device with high image quality is improved. improves.

[0032]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described more specifically with reference to examples.

In the method of manufacturing a thin film transistor according to the present invention, the resist film is exposed by using a mask provided with a light-shielding portion and a semi-transmissive portion in a part of the photolithography process. A so-called gray-tone exposure technique for forming a resist pattern having irregularities is used. This exposure technique is disclosed in JP-A-11-307780.

In this embodiment, the first film and the second film are formed on the laminated film by using the above-described gray-tone exposure technique, and the first film having the unevenness and the partially different thickness is used. Is formed. Then, the first film and the second film are etched using the first resist pattern as a mask.

Next, a concave portion in the first resist pattern, that is, a portion having a small thickness is removed by etching or ashing, and processed into a second resist pattern. Then, using the second resist pattern as a mask, only the upper first film of the laminated film is etched.

Thereafter, by removing the second resist pattern, a plurality of patterns can be formed in one photolithography step, so that a conventional method in which a photolithography step is performed for each pattern can be achieved. ,
The number of steps can be reduced.

As an etching method for forming a pattern, there are a method of dividing the etching for each pattern as described above, and a method of etching the laminated film using the first resist pattern as a mask. There is also a method in which the upper first film of the films is simultaneously etched and a plurality of patterns are formed by one etching.

(Embodiment 1) This embodiment relates to a method of manufacturing the thin film transistor of the first embodiment.

FIG. 1 is a schematic view showing the steps of a first embodiment of the thin film transistor according to the present invention.

First, a 200-nm-thick silicon oxide film as a buffer layer 2, a 50-nm-thick polycrystalline silicon film as a semiconductor film 3, and a 50-nm-thick silicon oxide film as a gate insulating film 4 on a substrate 1 made of glass or the like. A 200 nm-thick aluminum film is sequentially formed as the film and the gate electrode 5.

In this embodiment, a polycrystalline silicon film is used as the semiconductor film 3, a silicon oxide film is used as the buffer layer 2 and the gate insulating film 4, and an aluminum film is used as the gate electrode 5. However, the present invention is not limited to this. is not.
In addition, their thicknesses may be set according to the material, consistency with other processes, and the like.

Next, by a photolithography process using the gray tone exposure technique, the surface has irregularities,
A first resist pattern having a partially different thickness is formed (FIG. 1A).

Then, using the first resist pattern as a mask, the gate electrode 5, the gate insulating film 4 and the semiconductor film 3 are etched (FIG. 1B).

Next, the concave portions in the first resist pattern are removed by etching, and processed into a second resist pattern. Then, the gate electrode 5 is etched using the second resist pattern as a mask.

In the present embodiment, only the gate electrode 5 is etched using the second resist pattern as a mask. However, the gate electrode 5 and the gate insulating film 4 may be etched.

Thereafter, the semiconductor film 3 is doped with an n-type impurity to form a first low-resistance semiconductor film serving as an LDD region (FIG. 1C).

Next, a side wall protective film 9 is formed on each side surface of the semiconductor film 3, the gate insulating film 4, and the gate electrode 5. The sidewall protective film 9 can be formed, for example, by forming a silicon nitride film having a thickness of 2 μm on the entire surface of the substrate and then etching back by anisotropic etching.

Then, by doping an n-type impurity using the sidewall protective film 9 as a mask, a second low-resistance semiconductor film serving as a source / drain region can be formed without performing a photolithography step (FIG. 9). 1
(d)).

The side wall protective film 9 is preferable because it is effective for preventing a leak current and a short circuit between the gate electrode 5 and the source / drain region.

Further, before forming the side wall protective film 9, the gate electrode is anodized to insulate the surface including at least the side surface, because the leakage current and the short circuit between the gate electrode 5 and the source / drain region can be reduced. Is more desirable in preventing In this case, the material of the gate electrode is Si, A
Examples thereof include a single layer or a laminate of 1, Ta, Ti, or an alloy thereof.

Subsequent steps are the same as in the prior art.
0 to form a silicon oxide film with a thickness of 300 nm;
After opening the silicon oxide film by the second photolithography and etching in order to make an electrode contact to the source / drain region, a metal film made of Ti, Al or the like is formed, and the third photolithography and etching are performed. Source / drain electrodes 12 are formed.

If a part of the interlayer insulating film 10 on the gate electrode 5 is opened when the contact hole to the source / drain region is opened, the gate electrode 5 And the source / drain electrodes 12 are electrically connected to each other, so that a short circuit or disconnection due to static electricity generated during the manufacturing process can be prevented.

The connection between the gate electrode 5 and the source / drain electrode 12 is finally cut off in one of the steps.

Further, after a passivation film 11 made of a silicon nitride film is formed, a contact hole to the drain electrode is formed by fourth photolithography and etching.

Finally, a transparent conductive film such as ITO is formed, and the pixel electrode 13 is formed by the fifth photolithography and etching to complete a thin film transistor.

In this embodiment, the aluminum film is used as the gate electrode. However, a metal such as aluminum, tantalum, molybdenum, chromium, titanium, or an alloy thereof, or a silicon film containing a large amount of impurities may be used. . When a silicon film containing a large amount of impurities is used, an oxide insulator can be formed on the surface by a method such as thermal oxidation or plasma oxidation.

It is preferable to use an amorphous silicon film as the semiconductor film 3 because it is not necessary to form an LDD region, and the number of steps of impurity doping is reduced by one.

It is desirable to use a microcrystalline or polycrystalline silicon film as the semiconductor film 3 because the ON current of the TFT increases as compared with the amorphous silicon film.
Note that a microcrystalline or polycrystalline silicon film refers to a silicon film excluding an amorphous silicon film and a single crystal silicon film.

Although an n-type impurity (specifically, phosphorus) is used as the impurity, a p-type impurity such as boron may be used.

Note that the thin film transistor of the first embodiment is
Since the gate insulating film 4 and the semiconductor film 3 are stacked below the gate electrode 5, it is not necessary for the gate insulating film 4 to cover the thickness difference of the semiconductor 3, so that the gate insulating film can be thinned. And the ON current of the TFT can be increased.

(Embodiment 2) The present embodiment relates to a method of manufacturing the thin film transistor of the second embodiment.

FIG. 2 is a process schematic diagram of a second embodiment of the thin film transistor according to the present invention.

Up to the point of opening the contact hole, first, a silicon oxide film is formed as a buffer layer 2 to a thickness of 200 nm on a substrate 1 made of glass or the like as before.

Next, a semiconductor film 3 is formed to a thickness of 50 nm by a plasma CVD method or the like. If necessary, the semiconductor film 3 may be subjected to a heat treatment at 450 to 600 ° C., an excimer laser irradiation, or the like.

Next, the semiconductor film 3 is patterned by a first photolithography step and an etching step, and a silicon oxide film is formed thereon as a gate insulating film 4.
It is formed with a thickness of 00 nm.

Next, a metal film made of Ti, Mo, W, Al, Ta, or the like is formed to a thickness of 300 nm, and the metal film is etched using the photoresist patterned in the second photolithography step as a mask. Then, the gate electrode 5 is formed.

Next, using the gate electrode 5 as a mask, n
The first low-resistance semiconductor film 7 serving as an LDD region is formed by implanting ions containing a type impurity. Next, a resist pattern is formed by a third photolithography step so as to cover the gate electrode 5, and ions containing an n-type impurity are implanted using the resist pattern as a mask for ion doping, thereby forming a second source / drain region. Is formed.

Then, a silicon oxide film having a thickness of 400 nm is formed as the interlayer insulating film 10, and the silicon oxide film is used to make electrode contact with the source / drain regions.
A hole is formed by fourth photolithography and etching.

When opening a part of the interlayer insulating film 10 on the gate electrode 5 when opening a contact hole to the source / drain region, when the source / drain electrode 12 is subsequently formed, the gate electrode 5 And the source / drain electrodes 12 are electrically connected to each other, so that a short circuit or disconnection due to static electricity generated during the manufacturing process can be prevented.

The connection between the gate electrode 5 and the source / drain electrode 12 is finally cut off in one of the steps.

In the present embodiment, next, a light-transmitting conductive film 15 such as ITO and Ti, Mo, W, Al, Ta, C
A metal film 14 composed of r, Ag or an alloy thereof and a laminated film is sequentially formed, and a fifth photolithography process using a gray-tone exposure technique has a surface with irregularities and a partially different thickness. A first resist pattern is formed (FIG. 2A).

Then, the metal film 14 and the light transmitting conductive film 15 are etched using the first resist pattern as a mask (FIG. 2B).

Next, the recesses in the first resist pattern are removed by etching, and processed into a second resist pattern. Then, the metal film 14 is etched using the second resist pattern as a mask.

Then, by removing the second resist pattern, a transmissive or transflective thin film transistor is completed.

In the present embodiment, after forming a contact hole to the source / drain region of the semiconductor film, before forming the light-transmitting conductive film 15 serving as a source / drain electrode, the source / drain is formed. It is desirable to form a metal silicide film in a portion where the region is exposed, since it is effective in reducing the contact failure of the source / drain electrodes and increasing the ON current of the TFT. As a method of forming the metal silicide film, a metal film of Ti, Mo, W, Ta, Ni, Cr or the like is formed after opening the contact hole, and after heat treatment, a metal film other than the silicided portion is formed. It can be formed by etching.

Since the use of an amorphous silicon film as the semiconductor film 3 does not require the formation of an LDD region, at least the step of doping impurities is one step.
It is desirable to reduce the number of times.

It is desirable to use a microcrystalline or polycrystalline silicon film as the semiconductor film 3 because the ON current of the TFT is increased as compared with an amorphous silicon film.

Although an n-type impurity (specifically, phosphorus) is used as the impurity, a p-type impurity such as boron may be used.

Note that the thin film transistor of the second embodiment is
Since at least the source electrode and the drain electrode are formed of a light-transmitting conductive film and a part of the light-transmitting conductive film has a stacked structure with a metal film, the number of steps for manufacturing a transmission-type or semi-transmission-type thin film transistor can be reduced.

Note that a stacked structure of a light-transmitting conductive film and a metal film over a wiring including a source electrode and a drain electrode is preferable because wiring resistance can be reduced.

In order to make a thin film transistor a transmissive type, it is sufficient to remove a metal film on a light-transmitting conductive film in a portion to be a pixel electrode. The metal film may be left on a part of the transparent conductive film.

In the present embodiment, the steps up to the step of forming the interlayer insulating film corresponding to the first half of the manufacturing process of the thin film transistor are performed by the conventional method, but this step is performed by the method described in the first embodiment. Is preferable because the number of manufacturing steps can be further reduced.

(Embodiment 3) The present embodiment relates to a liquid crystal display device of the present invention.

FIG. 4 is a schematic view of a liquid crystal display device according to a third embodiment of the present invention. FIG. 5 is an equivalent circuit of a liquid crystal display device according to a third embodiment of the present invention. Using the method described in Embodiment Mode 1 or 2, a thin film transistor including a pixel electrode is formed in a matrix on a substrate as a switching transistor of each pixel, an alignment film is applied, and alignment processing is performed by rubbing. Was done. FIG. 4 shows an example in which a thin film transistor is formed by the method described in Embodiment 1. Then, an alignment film was similarly applied to the counter substrate 16 on which the counter electrode 18 and the color filter 17 were formed, and an alignment process was performed by rubbing. The two substrates are attached to each other, a liquid crystal 19 is injected between them, and a polarizing plate 20 is arranged before and after the two substrates. Then, by connecting the driving circuit 22 for driving each switching transistor 25, the liquid crystal display device is completed.

Note that the signal line 24 and the source electrode of the thin film transistor connected to the signal line 24 manufactured by the method described in Embodiment 2 are formed of a light-transmitting conductive film in which a metal film is laminated at least partially. Using a thin film transistor in which the pixel electrode and the drain electrode of the thin film transistor connected to the pixel electrode are made of at least a light-transmitting conductive film as the switching transistor 25 of the pixel reduces the manufacturing steps of the transmissive and transflective liquid crystal display devices. It is desirable because it can.

(Embodiment 4) The present embodiment relates to the electroluminescent display device of the present invention.

FIG. 6 is a schematic diagram of an electroluminescent display device according to a fourth embodiment of the present invention. FIG. 7 is an equivalent circuit of an electroluminescent display device according to a fourth embodiment of the present invention. Embodiment 1 or Embodiment 2
The thin film transistors are formed in a matrix as switching transistors and current driving TFTs of each pixel by using the method described in (1). FIG. 6 illustrates an example in which a thin film transistor is formed by the method described in Embodiment 1. After the formation of the thin film transistor, for example, a polydialkylfluorene derivative 29 which actually emits light is formed, for example, as a conductive polymer 28, for example, polyethylene dioxythiophene (PEDT), and finally a Ca cathode 30 is deposited to complete the electroluminescent display device. The operation is as follows. First, when a display signal is applied to the signal line 24 when a pulse signal is applied to the scanning line 23 so that the switching transistor 25 is turned on, the driving transistor 32 is turned on and a current flows from the current supply line 33, The luminescence cell 31 emits light.

In this embodiment, a polydialkylfluorene derivative is used as the electroluminescent material. However, another organic material, for example, another polyfluorene-based material, polyphenylvinylene-based material, or an inorganic material may be used. As a method for forming the electroluminescent material, a method such as coating, vapor deposition, or inkjet may be used.

[0089]

According to the structure of the thin film transistor of the present invention, the structure is simplified as compared with the conventional one, and
The current is improved. Thus, according to the method for manufacturing a thin film transistor of the present invention, the number of manufacturing steps is reduced as compared with the conventional method, so that productivity can be improved, manufacturing cost can be reduced, and the practical effect is large.

Further, according to the liquid crystal display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the high quality liquid crystal display device is improved. The practical effect is great.

According to the electroluminescent display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the electroluminescent display device of high image quality is improved. Improved, practical effect is great.

[Brief description of the drawings]

FIG. 1 is a schematic view showing the steps of a first embodiment of a thin film transistor according to the present invention.

FIG. 2 is a process schematic diagram of a second embodiment of the thin film transistor according to the present invention.

FIG. 3 is a schematic view showing a process of a conventional top gate type TFT.

FIG. 4 is a schematic diagram of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 5 is an equivalent circuit diagram of a liquid crystal display device according to a third embodiment of the present invention.

FIG. 6 is a schematic diagram of an electroluminescent display device according to a fourth embodiment of the present invention.

FIG. 7 is an equivalent circuit diagram of an electroluminescent display device according to a fourth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 Semiconductor film 4 Gate insulating film 5 Gate electrode 6 Resist 7 First low resistance semiconductor film 8 Second low resistance semiconductor film 9 Side wall protective film 10 Interlayer insulating film 11 Passivation film 12 Source / drain electrode 13 Pixel electrode 14 Metal film 15 Translucent conductive film 16 Counter substrate 17 Color filter 18 Counter electrode 19 Liquid crystal 20 Polarizer 21 Backlight 22 Drive circuit 23 Scan line 24 Signal line 25 Switching transistor 26 Liquid crystal cell 27 Storage capacitance 28 High conductivity Molecule 29 Polyfluorene derivative 30 Ca cathode 31 Electroluminescence cell 32 Driving transistor 33 Current supply line

Continued on the front page (72) Inventor Mikihiko Nishitani 1006 Kazuma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.F-term (reference) MA05 MA07 MA14 MA15 MA16 MA18 MA19 MA20 MA27 MA28 MA35 MA37 MA41 NA25 NA27 NA29 PA02 PA04 PA07 QA07 5C094 AA05 AA13 AA24 AA42 AA43 AA44 AA53 BA03 BA27 BA43 CA19 CA24 DA13 DA15 DB01 DB04 EA04 EA05 EB01 EB01 EB07 EB02 GB10 5F110 AA16 CC02 DD02 DD13 EE03 EE04 EE06 EE08 EE14 EE32 EE33 FF02 GG02 GG13 GG14 GG15 GG25 HJ01 HL02 HL03 HL04 HL05 HL06 HL07 HL11 HM15 NN03 NN04 NN23 Q11 Q01 Q01 PP01

Claims (37)

[Claims] 1. A top-gate thin film transistor formed on an insulator and comprising a semiconductor film, a gate insulating film, a gate electrode, and a source electrode and a drain electrode connected to the semiconductor film, wherein the lower layer of the gate electrode is provided. Wherein at least the semiconductor film and the gate insulating film are laminated. 2. A top gate type thin film transistor formed on an insulator and comprising a semiconductor film, a gate insulating film, a gate electrode, and a source electrode and a drain electrode connected to the semiconductor film, wherein the lower layer of the gate electrode is formed. A thin film transistor, wherein at least the semiconductor film and the gate insulating film are laminated, and a sidewall protective film made of an insulator is provided on at least side surfaces of the gate electrode, the gate insulating film, and the semiconductor film. 3. The thin film transistor according to claim 1, wherein an oxide insulator of the gate electrode is formed on at least a side surface of the gate electrode. 4. The semiconductor device according to claim 1, wherein said gate electrode is made of Si, Al, Ta, T
The thin film transistor according to claim 3, comprising a single layer or a laminate of i or an alloy thereof. 5. The semiconductor device according to claim 1, wherein at least the semiconductor film is laminated below the gate insulating film.
Alternatively, the thin film transistor according to claim 2. 6. A thin film transistor having at least a gate electrode, a gate insulating film, a semiconductor film having at least a channel region and a source / drain region, an interlayer insulating film, and a source electrode and a drain electrode connected to the source / drain region. Forming a laminated film comprising at least a semiconductor film, an insulating film, and a gate electrode on an insulating substrate; forming a first resist pattern on the laminated film; and Etching the laminated film using a pattern as a mask, processing the first resist pattern to form a second resist pattern, and etching at least the gate electrode using the second resist pattern as a mask And a method for manufacturing a thin film transistor. 7. A thin film transistor having at least a gate electrode, a gate insulating film, a semiconductor film having at least a channel region and a source / drain region, an interlayer insulating film, and a source electrode and a drain electrode connected to the source / drain region. Forming a laminated film including at least a semiconductor film, an insulating film, and a gate electrode on an insulating substrate; forming a resist pattern on the laminated film; and forming the laminated pattern using the resist pattern as a mask. A method for manufacturing a thin film transistor, comprising: a step of etching a film; and a step of selectively forming an insulating sidewall protective film on at least a side surface of the laminated film. 8. The method according to claim 7, wherein impurities are implanted into the semiconductor layer using the side wall protective film as at least a part of a mask. 9. The method according to claim 6, further comprising the step of oxidizing at least a side surface of the gate electrode to form an insulator. 10. The method according to claim 1, wherein said gate electrode is made of Si, Al, Ta,
The method for manufacturing a thin film transistor according to claim 9, comprising a single layer or a laminate of Ti or an alloy thereof. 11. A liquid crystal display device in which at least a pixel is driven by a thin film transistor, wherein at least a semiconductor film and a gate insulating film are laminated at least under a scanning line and a gate electrode of the thin film transistor connected to the scanning line. A liquid crystal display device characterized by the above-mentioned. 12. A liquid crystal display device in which at least pixels are driven by a thin film transistor, wherein at least a semiconductor film and a gate insulating film are stacked at least under a scan line and a gate electrode of the thin film transistor connected to the scan line, A liquid crystal display device comprising a side wall protective film made of an insulator on at least side surfaces of the scanning line, the gate electrode, the semiconductor film, and the gate insulating film. 13. The liquid crystal display device according to claim 11, wherein at least the semiconductor film is laminated below the gate insulating film. 14. An electroluminescence display device comprising a pixel having at least a switching thin film transistor and a current driving thin film transistor, wherein at least a scanning line and a gate electrode of the thin film transistor connected to the scanning line are provided at least under a semiconductor. An electroluminescent display device, wherein a film and a gate insulating film are stacked. 15. An electroluminescent display device comprising a pixel having at least a switching thin film transistor and a current driving thin film transistor, wherein at least a scanning line and at least a semiconductor layer are formed under a gate electrode of the thin film transistor connected to the scanning line. An electroluminescent display device comprising a film and a gate insulating film laminated, and comprising a side wall protective film made of an insulator on at least side surfaces of the scanning line, the gate electrode, the semiconductor film and the gate insulating film. . 16. A thin film transistor having a semiconductor film, a gate insulating film, a gate electrode, a source electrode, and a drain electrode formed on an insulator, wherein the source electrode and the drain electrode are made of at least a light-transmitting conductive material. A thin film transistor, a part of which has a laminated structure with a metal film. 17. The thin film transistor according to claim 16, wherein at least the source electrode and the drain electrode made of the light-transmitting conductive material are connected to the semiconductor film via a metal silicide layer. 18. A semiconductor device according to claim 18, wherein at least the semiconductor film and the gate insulating film are stacked under the gate electrode.
18. The semiconductor device according to claim 16, wherein at least the semiconductor film is laminated below the gate insulating film.
3. The thin film transistor according to claim 1. 19. The thin film transistor according to claim 16, wherein the light-transmitting conductive material is an ITO film. 20. The method according to claim 19, wherein the metal silicide layer comprises Ti, Mo,
18. The thin film transistor according to claim 17, wherein the thin film transistor is a reaction product of any one of W, Ta, Ni, and Cr and the semiconductor film. 21. At least a gate electrode, a gate insulating film,
In a method for manufacturing a thin film transistor including at least a semiconductor film having a channel region and a source / drain region, an interlayer insulating film, and a source electrode and a drain electrode connected to the source / drain region, Forming a contact hole to a source / drain region of the formed semiconductor film; laminating a conductive film having at least a light-transmitting property and a metal film on the substrate having the contact hole formed therein; Forming a first resist pattern on the metal film,
Etching the at least the metal film and the light-transmitting conductive film using the first resist pattern as a mask, forming the second resist pattern by processing the first resist pattern, Etching a metal film using at least the second resist pattern as a mask. 22. At least a gate electrode, a gate insulating film,
In a method for manufacturing a thin film transistor including at least a semiconductor film having a channel region and a source / drain region, an interlayer insulating film, and a source electrode and a drain electrode connected to the source / drain region, Forming a contact hole to a source / drain region of the formed semiconductor film; forming a metal silicide layer in at least a part of the source / drain region; and forming a contact hole on the substrate where the contact hole is formed. Forming a conductive film having at least a light-transmitting property. 23. At least a gate electrode, a gate insulating film,
In a method for manufacturing a thin film transistor including at least a semiconductor film having a channel region and a source / drain region, an interlayer insulating film, and a source electrode and a drain electrode connected to the source / drain region, at least a semiconductor film is formed on an insulating substrate. Forming a laminated film including an insulating film and a gate electrode, forming a first resist pattern on the laminated film, and etching the laminated film using the first resist pattern as a mask; 2. The method according to claim 1, further comprising: a step of processing the first resist pattern to form a second resist pattern; and a step of etching at least the gate electrode using the second resist pattern as a mask. 23. The method for manufacturing a thin film transistor according to 21 or 22. 24. The method according to claim 21, wherein the light-transmitting conductive film is an ITO film. 25. The method according to claim 25, wherein the metal silicide layer comprises Ti, Mo,
23. The method of claim 22, wherein the semiconductor film is a reaction product of any one of W, Ta, Ni, and Cr with the semiconductor film. 26. A light-transmitting conductive film in which a signal line and a source electrode of the thin film transistor connected to the signal line are at least partially laminated with a metal film in a liquid crystal display device in which at least pixels are driven by the thin film transistor. And a drain electrode of the thin film transistor connected to the pixel electrode and the pixel electrode is made of at least a light-transmitting conductive film. 27. The liquid crystal display device according to claim 26, wherein the pixel electrode is a transmissive display device comprising only a light-transmitting conductive film. 28. The liquid crystal display device according to claim 26, wherein at least a part of the pixel electrode is a transflective display device in which a light-transmitting conductive film and a metal film are stacked. 29. In a liquid crystal display device in which at least pixels are driven by a thin film transistor, at least a semiconductor film and a gate insulating film are laminated at least under a scanning line and a gate electrode of the thin film transistor connected to the scanning line. The liquid crystal display device according to claim 26, wherein: 30. The semiconductor device according to claim 26, wherein at least the source electrode and the drain electrode made of the light-transmitting conductive film are connected to a semiconductor film constituting the thin film transistor via a metal silicide layer. The liquid crystal display device according to any one of the above. 31. The liquid crystal display device according to claim 26, wherein said light-transmitting conductive film is an ITO film. 32. The method according to claim 31, wherein the metal silicide layer is made of Ti, Mo,
31. The liquid crystal display device according to claim 30, wherein the semiconductor film is a reaction product of any one of W, Ta, Ni, and Cr with the semiconductor film. 33. In an electroluminescent display device having at least a switching thin film transistor and a current driving thin film transistor in a pixel, a signal line and a source electrode of the thin film transistor connected to the signal line are at least partially formed of a metal film. Wherein the pixel electrode and the drain electrode of the thin film transistor connected to the pixel electrode are at least made of a conductive film having a light-transmitting property. 34. The semiconductor device according to claim 33, wherein at least the source electrode and the drain electrode made of the light-transmitting conductive film are connected to a semiconductor film constituting the thin film transistor via a metal silicide layer. Electroluminescent display device. 35. In an electroluminescence display device having at least a switching thin film transistor and a current driving thin film transistor in a pixel, at least a semiconductor film is formed at least below a scanning line and a gate electrode of the thin film transistor connected to the scanning line. 34. The electroluminescent display device according to claim 33, wherein a gate insulating film is stacked, and at least a semiconductor film is stacked below the gate insulating film. 36. The electroluminescent display device according to claim 33, wherein the light-transmitting conductive film is an ITO film. 37. The method according to claim 37, wherein the metal silicide layer is made of Ti, Mo,
35. The electroluminescent display device according to claim 34, wherein the electroluminescent display device is a reaction product of any one of W, Ta, Ni, and Cr and the semiconductor film.