JP2002134756A - Semiconductor device and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a top gate thin-film transistor which is superior in characteristics, for simplifying a manufacturing process and significantly improving productivity. SOLUTION: A semiconductor film is formed on an insulator, and the semiconductor film is etched with a first resist pattern formed on the semiconductor film as a mask. The first resist pattern is worked into a second resist pattern, and impurity is injected into the semiconductor film with the second resist pattern as the mask. Thus, an LDD region is formed. Then, the thin-film transistor of GOLD structure is manufactured, by forming a gate insulating film, a gate electrode, source/drain regions, an interlayer insulating film and source/ drain electrodes.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly, to a thin film transistor and a display device using the same.

[0002]

2. Description of the Related Art As a thin film transistor (TFT) applied to a liquid crystal display device or the like, a bottom gate type TFT represented by an inverted stagger type and a top gate type TFT represented by a coplanar type are used. Conventionally, inverted stagger type TFTs whose manufacturing process is relatively easy to simplify are mainly used for liquid crystal displays and the like, but with the recent increase in size and definition of liquid crystal displays, TF
There is a demand for miniaturization of T and reduction of its parasitic capacitance. To achieve this, a top-gate type TFT structure that can easily form self-aligned source / drain regions is advantageous. . In addition, the static electricity generated during the manufacturing process causes the scanning line connected to the gate electrode and the signal line connected to the source electrode to be short-circuited or disconnected, which is a major factor in reducing the product yield. As a countermeasure to prevent the electrostatic breakdown, a scanning line and a signal line are often intentionally electrically connected during a manufacturing process.
In the case of a bottom gate structure, it is necessary to newly add a step of exposing the gate electrode in order to take measures against static electricity. However, in the case of a coplanar type top gate TFT, a step of opening a contact hole is originally required. For this reason, there is also a feature that it is not necessary to add a new process and that measures against static electricity are easy.

This top gate type TFT structure has been put to practical use mainly for TFTs using low-temperature polysilicon as an active layer. Hereinafter, a conventional method of manufacturing a top gate type TFT will be described with reference to FIG.

FIG. 9 is a schematic view showing the steps of a conventional top gate type TFT.

First, a silicon oxide film is formed on a substrate 1 such as glass as a buffer layer 2 by a normal pressure CVD method or the like.
It is formed with a thickness of 00 to 500 nm.

Next, a semiconductor film 3 is formed to a thickness of 10 to 100 nm by a plasma CVD method or the like (FIG. 9).
(A)). If necessary, the semiconductor film 3 may be
Heat treatment at 600 ° C., irradiation with excimer laser, or the like may be performed.

Next, the semiconductor film 3 is patterned by a first photolithography step and an etching step, and the gate insulating film 4 is formed thereon by a normal pressure CVD method or the like.
Is formed with a thickness of 50 to 300 nm (FIG. 9B).

Next, chromium (Cr), titanium (T
i) A photoresist formed by forming a metal film made of molybdenum (Mo), tungsten (W), aluminum (Al), tantalum (Ta), or the like to a thickness of 50 to 300 nm and patterning by a second photolithography process The gate electrode 5 is formed by etching the metal film using the mask as a mask.

Next, using the gate electrode 5 as a mask, ions containing impurities are implanted to form a first low-resistance semiconductor film to be the LDD region 7 (FIG. 9C). This LDD
The region 7 is formed, for example, by hydrogen dilution 5 in forming an n-type layer.
The ion doping is performed using% PH ₃ as an ion source gas. The conditions for applying ion doping are as follows: acceleration voltage: 5 to 100 kV, total ion implantation amount: 10 ¹³ to 10 ¹⁵
cm ^-2 . For these conditions, optimal conditions and gas concentrations are appropriately selected according to the thickness of the mask, the thickness of the doping layer to be formed, and the like.

Next, a pattern of a resist 13 is formed by a third photolithography step so as to cover the gate electrode 5, and this is used as a mask for ion doping.
The source / drain regions 8 are implanted by implanting ions containing impurities.
(FIG. 9)
(D)). The source / drain regions 8 are formed by, for example, ion doping using hydrogen diluted 5% PH ₃ as an ion source gas in forming an n-type layer. Conditions for applying ion doping are as follows: acceleration voltage: 5 to 100 kV, total ion implantation amount: 10 ^{< 14} > to 10 ^{< 16} > cm ^<-2 >, and lower resistance than the LDD region 7. These conditions are:
Optimal conditions and gas concentrations are appropriately selected depending on the thickness of the mask, the thickness of the doping layer to be formed, and the like.

The TFT is called GOLD (Gate Overlap L).
In the case of a tightly-doped drain structure, a second gate electrode pattern is formed of a metal film instead of a resist pattern, and ion doping is performed using the second gate electrode pattern as a mask.

Next, a silicon oxide film to be an interlayer insulating film 9 is formed to a thickness of 100 to 500 nm by a normal pressure CVD method, a plasma CVD method, a sputtering method, or the like, and
A hole is formed in the silicon oxide film by fourth photolithography and etching to make an electrode contact to the drain region (FIG. 9E).

And Cr, Ti, Mo, W, Al, T
After forming a metal film made of a or the like, the source / drain electrode 1 is formed by fifth photolithography and etching.
0 to complete the thin film transistor (FIG. 9
(F)).

When applied to a liquid crystal display device,
After the passivation film 11 is formed by a plasma CVD method or the like, a contact hole to the drain electrode is formed by the sixth photolithography and etching (FIG. 9G).

Finally, a transparent conductive film such as ITO is formed, and the pixel electrode 12 is formed by the seventh photolithography and etching to complete a thin film transistor used for a display device (FIG. 9 (h)).

In the top gate type TFT thus formed, since the LDD region or the source / drain region is formed in self-alignment with the gate electrode, the source / drain region and the gate electrode overlap. The generated parasitic capacitance can be reduced.

[0017]

However, in the above-described conventional method of manufacturing a top gate type thin film transistor, photolithography is performed five times to form a TFT and seven times to apply to a display device. Process is required, compared to the reverse staggered TFT manufacturing process,
Since the number of processes is increased, there is a problem that productivity is low and manufacturing cost is increased. This problem is particularly problematic when applied to a display device. Further, a conventional thin film transistor using a polycrystalline silicon film as an active layer has an offset region and an LDD region in order to reduce an OFF current. There is a problem that the ON current decreases because of the series resistance between the gate and the drain.

As a method of simplifying the manufacturing process of a thin film transistor, a resist pattern having an uneven surface is formed in a photolithography process using a mask provided with a light-shielding portion and a semi-transparent portion. A method of forming a plurality of patterns in a photolithography process, that is, a method using so-called gray-tone exposure is disclosed in
No. 307780. However, the method described therein can be applied to a channel dug-down type bottom gate TFT, but cannot be applied to a top gate type TFT.

The problem that the ON current of the thin film transistor is reduced by the LDD region is, for example, a GOLD (Gate Overlap Lig) in which the LDD region is provided below the gate electrode.
htly-doped drain) structure. However, in the conventional GOLD structure forming method, since the gate electrode pattern is formed twice, the number of steps is greatly increased, and the gate electrode becomes extremely thick, so that stress and steps are increased.

An object of the present invention is to solve the above-mentioned problems of the prior art, and to provide a thin film transistor having excellent characteristics and greatly reducing the number of manufacturing steps, a display device using the same, and a manufacturing method thereof. I do.

[0021]

In order to achieve the above object, a method of manufacturing a thin film transistor according to the present invention comprises the steps of: etching a semiconductor film using a first resist pattern as a mask; In order to process into a resist pattern and perform etching or impurity implantation using the second resist pattern as a mask, a TFT
The number of manufacturing steps is reduced.

In another method of manufacturing a thin film transistor according to the present invention, a laminated film composed of a light-transmitting conductive film and a metal film is etched using the first resist pattern as a mask, and then the first resist pattern is changed to the second resist pattern. And the etching is performed using the second resist pattern as a mask, so that the number of steps of manufacturing a transmission type or semi-transmission type TFT is reduced.

Further, the thin film transistor according to the present invention comprises:
The thickness of the gate electrode is large on the channel region of the semiconductor film,
It has a thin structure on the LDD region, and has a GOLD structure. Further, since this gate electrode structure is formed by one photolithography process, the process is simplified and the ON current of the TFT increases.

In another thin film transistor according to the present invention, the gate electrode is formed of a laminated film of a metal film and a light-transmitting conductive film, and the gate electrode and the pixel electrode are formed in the same layer. A transmission type liquid crystal display device can be realized with a small number of steps.

Further, since the liquid crystal display device according to the present invention is driven by the thin film transistor according to the present invention, the productivity of a liquid crystal display device having excellent display performance can be greatly improved.

Further, since the electroluminescent display device according to the present invention is driven by the thin film transistor according to the present invention, the productivity of the electroluminescent display device having excellent display performance can be greatly improved.

According to the structure of the thin film transistor of the present invention, the manufacturing process is simplified as compared with the conventional one, and
N current is improved. Thus, according to the method for manufacturing a thin film transistor of the present invention, the number of manufacturing steps is reduced as compared with the conventional method, so that productivity can be improved and manufacturing cost can be reduced.

Further, according to the liquid crystal display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the high quality liquid crystal display device is improved. .

Further, according to the electroluminescent display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the electroluminescent display device with high image quality is improved. improves.

[0030]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described more specifically with reference to embodiments.

In the method of manufacturing a thin film transistor according to the present invention, the resist film is exposed by using a mask provided with a light-shielding portion and a semi-transparent portion in a part of the photolithography process, so that the surface of the resist film is developed. A so-called gray-tone exposure technique for forming a resist pattern having irregularities is used. This exposure technique is disclosed in JP-A-11-307780.

In this embodiment, a first resist pattern having irregularities on the surface and having a partially different thickness is formed on the film to be etched by using the above-described gray tone exposure technique. Then, the film to be etched is etched into a first processing pattern using the first resist pattern as a mask.

Next, a concave portion in the first resist pattern, that is, a portion having a small thickness is removed by etching or ashing, and processed into a second resist pattern. Then, using the second resist pattern as a mask, a part of the film to be etched is etched or an impurity is implanted into the film to be etched.

After that, by removing the second resist pattern, a plurality of patterns can be formed in one photolithography step, and therefore, compared to the conventional method of performing a photolithography step for each pattern. ,
The number of steps can be reduced.

As an etching method for forming a pattern, a method of dividing the etching for each pattern as described above, and a method of etching a film to be etched using the first resist pattern as a mask, the concave portion of the first resist pattern and its recess. There is also a method in which a part of the underlying film to be etched is simultaneously etched and a plurality of patterns are formed by one etching.

(Embodiment 1) The present embodiment relates to a method of manufacturing the thin film transistor and the thin film transistor array substrate of the first embodiment.

FIGS. 1 and 2 are schematic views showing the steps of a first embodiment of the thin film transistor according to the present invention. First, a 200 nm-thick silicon oxide film as a buffer layer 2 and a 50 nm-thick film as a semiconductor film 3 are formed on a substrate 1 such as glass.
Are sequentially formed.

In this embodiment, a polycrystalline silicon film is used as the semiconductor film 3 and a silicon oxide film is used as the buffer layer 2, but the present invention is not limited to this. In addition, their thicknesses may be set according to the material, consistency with other processes, and the like. As a method for forming a polycrystalline silicon film, a method of melting and recrystallizing an amorphous silicon film subjected to a dehydrogenation treatment by excimer laser annealing,
A method of directly depositing by VD may be used. As a method for forming a silicon oxide film, plasma CV
D method and normal pressure CVD method.

Note that it is preferable to use a crystalline silicon film, for example, a microcrystalline silicon film or a polycrystalline silicon film, as the semiconductor film 3 because the mobility is higher than that of an amorphous silicon film. In the case of an amorphous silicon film, it is not particularly necessary to form an LDD region.

Next, a first resist pattern having a partially different thickness and unevenness is formed by a photolithography process using the above-described gray tone exposure technique (FIG. 1A).

Then, the semiconductor film 3 is etched using the first resist pattern as a mask (FIG. 1).
(B)).

Next, the recesses in the first resist pattern are removed by etching, and processed into a second resist pattern. Then, using the second resist pattern as a mask, the semiconductor film 3 is doped with an n-type impurity by a first impurity implantation step to form a channel region 6 and an LDD region 7 in the semiconductor film (FIG. 1).
(C)).

In this embodiment, a region having a smaller impurity doping amount than the LDD region 7 is defined as the channel region 6.
Is defined.

Next, after the resist 13 is peeled off, a silicon oxide film having a thickness of 100 nm is formed as a gate insulating film (FIG. 1D).

According to the method for manufacturing a thin film transistor as described above, the islanding of the semiconductor film and the formation of the LDD region can be performed by one photolithography step, and the number of manufacturing steps can be reduced.

Subsequently, the light-transmitting conductive film 14 and the metal film 1
5 are sequentially formed, and a third resist pattern having a partially different thickness and unevenness is formed thereon by a photolithography process using the above-described gray tone exposure technique (FIG. 2A).

Then, the transparent conductive film 14 and the metal film 15 are etched using the third resist pattern as a mask (FIG. 2B).

Next, the recesses in the third resist pattern are removed by etching, and processed into a fourth resist pattern. Then, using the fourth resist pattern as a mask, the metal film 15 is etched (FIG. 2).
(C)).

When the metal film 15 is etched,
By partially leaving the metal film 15 in the display area on the pixel electrode, a transflective thin film transistor array substrate is formed. If the metal film 15 is not left in the display area on the pixel electrode, a transmission type thin film transistor array substrate is formed.

Then, the resist 13 is removed, and the gate electrode 5 and the pixel electrode 1 overlapping the LDD region 7 are removed.
2 is formed, a semiconductor film is doped with an n-type impurity by a second impurity implantation step using the gate electrode 5 as a mask to form the source / drain region 8 (FIG. 2).
(D)).

In this embodiment, an ITO film and a Ti film are used as the translucent conductive film 14 and the metal film 15, respectively. When an Al film is used as the metal film 15, a battery reaction occurs with the ITO film in an alkaline solution. Therefore, the metal film 15 may be made of Cr, Ta, Mo, W, A in addition to Ti.
A single layer or a laminated film of g, Si, an alloy thereof, and an Al alloy is desirable.

The use of an ITO film as the light-transmitting conductive film 14 is desirable because a light-transmitting conductive film having high light-transmitting properties, high conductivity and high heat resistance is formed.

According to the method for manufacturing a thin film transistor as described above, the gate electrode and the pixel electrode can be formed by one photolithography step, and the number of manufacturing steps can be reduced.

In this embodiment, the GOLD is formed by forming the LDD region in the first impurity implantation step and the source / drain region in the second impurity step.
Although the structure is formed, a normal LDD structure can be obtained by changing the order.

Subsequent steps are the same as in the conventional case.
After a silicon oxide film is formed with a thickness of 300 nm, the silicon oxide film is opened by third photolithography and etching in order to make electrode contact with the source / drain region 8 and the pixel electrode 12, and then Ti,
A metal film made of Al or the like is formed, and the source / drain electrodes 10 are formed by fourth photolithography and etching.
To form

When a contact hole to the source / drain region 8 is opened, a part of the interlayer insulating film 9 on the gate electrode 5 is also opened. 5 is electrically connected to the source / drain electrode 10 and is desirable because a short circuit or disconnection can be prevented from occurring due to static electricity generated during the manufacturing process.

The connection between the gate electrode 5 and the source / drain electrode 10 is finally cut off in any of the steps.

Further, after the passivation film 11 made of a silicon nitride film is formed, the pixel electrode 12 and, if necessary, the pad portions of the gate electrode and the source / drain electrode are opened by fifth photolithography and etching. Through the steps described above, a thin film transistor array substrate is completed (FIG. 3).

Note that the thin film transistor of the present invention is
Because of the LD structure, the LD
Since the D region does not become a parasitic resistance, a thin film transistor having a high ON current and a low OFF current is realized.

In the present embodiment, the source /
Since the patterning of the drain electrode and the opening of the light-transmitting portion of the pixel electrode are performed in separate steps, the source / drain electrodes and the ITO film forming the pixel electrode are not simultaneously exposed on the surface. This is desirable because even if an Al film having low resistance is used as the source / drain electrodes, a battery reaction between the Al film and the ITO film does not occur.

In the present embodiment, the opening of the pixel electrode is performed after the passivation film 11 is formed. However, the opening of the pixel electrode is simultaneously performed when the contact hole to the source / drain region 8 is opened. The effect of the present invention can be exerted even if holes are opened. In this case, in patterning the source / drain electrodes,
By leaving the metal film constituting the source / drain electrodes on a part of the pixel electrode, a transflective thin film transistor array substrate can be formed. In addition, the pixel electrode includes a transmissive portion made of a translucent conductive film, a reflective portion composed of a laminated film of a metal film 15 forming a part of a gate electrode and a metal film forming a source / drain electrode, A preferable configuration (FIG. 4) in which the portion has irregularities is preferable because the reflectance of the reflection portion increases.

Although an n-type impurity (specifically, phosphorus) is used as the impurity, a p-type impurity such as boron may be used.

(Embodiment 2) This embodiment relates to a method of manufacturing the thin film transistor of the second embodiment.

FIG. 4 is a process schematic diagram of a second embodiment of the thin film transistor according to the present invention.

First, as in the first embodiment, a buffer layer 2 and a semiconductor film 3 are sequentially formed on a substrate 1 made of glass or the like.

Note that it is preferable to use a crystalline silicon film, for example, a microcrystalline silicon film or a polycrystalline silicon film as the semiconductor film 3 because the mobility is higher than that of an amorphous silicon film.

Next, after the semiconductor film 3 is formed into islands by a photolithography process, the gate insulating film 4 and the gate electrode 5 are laminated, and a part thereof is partially formed thereon by the photolithography process using the above-described gray tone exposure technique. A first resist pattern having different thicknesses and irregularities is formed (FIG. 5A).

Then, the gate electrode 5 is etched using the first resist pattern as a mask (FIG. 5).
(B)).

Next, the recesses in the first resist pattern are removed by etching, and processed into a second resist pattern. Then, a part of the gate electrode 5 is etched using the second resist pattern as a mask (FIG. 5C).

Next, after the resist 13 is peeled off, as an impurity implantation step, an n-type impurity is implanted into the semiconductor film 3 by ion doping to form a channel region 6, an LDD region 7 and a source / drain region 8 (FIG. 5 (d)).

In this embodiment, a region having a smaller impurity doping amount than the LDD region 7 is defined as the channel region 6.
Is defined.

The material of the gate electrode 5 is Ta, Cr, Ti, M formed by sputtering or the like.
It is preferable to use a single layer film of o, W, Ag, Si, or an alloy thereof because the deposition and etching steps of the gate electrode are simplified.

The material of the gate electrode 5 is Ta, Cr, Ti, M formed by sputtering or the like.
The use of a laminated film of o, W, Ag, Si or an alloy thereof utilizes the etching selectivity of the upper film and the lower film of the laminated film during etching using the second resist pattern as a mask. By etching only the upper layer of the laminated film, the gate electrode shape and L
This is desirable because the reproducibility of the amount of impurities implanted into the DD region 7 and the uniformity in the substrate are improved.

In the impurity implantation step, the convex portion of the gate electrode 5 is
Since the recess of the gate electrode 5 is used as an implantation mask for the DD region 7, the channel region 6, the source / drain region 8, and the LDD region 7 having a smaller impurity implantation amount than the source / drain region 8 into which the impurity is not implanted are formed. It can be formed in a self-aligned manner by a single impurity implantation process.

Subsequently, a silicon oxide film having a thickness of 300 nm is formed as the interlayer insulating film 9, and a silicon oxide film for making electrode contact with the source / drain region 8 is formed.
After opening by photolithography and etching, a source / drain electrode 10 is formed by depositing and patterning a metal film made of Ti, Al or the like, thereby completing a thin film transistor.

According to the above-described method of manufacturing a thin film transistor, three regions having different impurity concentrations can be formed in a semiconductor film by one impurity implantation step, and the number of manufacturing steps can be reduced.

Further, in the thin film transistor of the present invention, the gate electrode has irregularities and the film thickness decreases stepwise on the side surface, so that the coverage of the gate electrode with the interlayer insulating film 9 is improved, and Defects such as a short circuit between the source / drain electrodes are reduced.

Also, the thin film transistor of the present invention
Because of the LD structure, the LD
Since the D region does not become a parasitic resistance, a thin film transistor having a high ON current and a low OFF current is realized.

If a part of the interlayer insulating film 9 on the gate electrode 5 is opened when the contact hole to the source / drain region 8 is opened, the gate electrode 5 is electrically connected to the source / drain electrode 10 and is desirable because a short circuit or disconnection can be prevented from occurring due to static electricity generated during the manufacturing process.

Note that the connection between the gate electrode 5 and the source / drain electrode 10 is finally cut off in one of the steps.

When manufacturing a thin film transistor array substrate having a pixel electrode, a passivation film 11 made of a silicon nitride film is further formed, and then a contact hole to a drain electrode is formed. If necessary, the pad portions of the gate electrode and the source electrode are also opened.

Finally, after depositing the light-transmitting conductive film, patterning is performed to form the pixel electrode 12.

Through the above steps, a thin film transistor array substrate is completed (FIG. 6).

The use of an ITO film as the light-transmitting conductive film forming the pixel electrode 12 is desirable in terms of high light-transmitting property, conductivity, and heat resistance.

In the present embodiment, an n-type impurity (specifically, phosphorus) is used as an impurity, but a p-type impurity such as boron may be used.

(Embodiment 3) The present embodiment relates to a method for manufacturing a thin film transistor array substrate according to the third embodiment.

FIG. 7 is a process schematic diagram of a thin film transistor according to a third embodiment of the present invention.

In this embodiment, first, as in the second embodiment, a buffer layer 2 and a semiconductor film 3 are sequentially formed on a substrate 1 made of glass or the like, and the semiconductor film 3 is turned into an island by a photolithography process. .

It is preferable to use a crystalline silicon film, for example, a microcrystalline silicon film or a polycrystalline silicon film as the semiconductor film 3 because the mobility is higher than that of an amorphous silicon film.

Next, the gate insulating film 4 and the light transmitting conductive film 1
4 and a metal film 15 are sequentially laminated, and a first resist pattern having a partially different thickness and unevenness is formed thereon by a photolithography process using the above-described gray tone exposure technique (FIG. 7A )).

Then, the light-transmitting conductive film 14 and the metal film 15 are etched using the first resist pattern as a mask to form a pattern of a gate electrode and a pixel electrode (FIG. 7B).

Next, the recesses in the first resist pattern are removed by etching, and processed into a second resist pattern. Then, using the second resist pattern as a mask, the light transmitting conductive film 14 on the gate electrode and the pixel electrode pattern is etched (FIG. 7).
(C)). Thereby, the gate electrode 5 having irregularities is formed.

At the time of etching the metal film 15,
By partially leaving the metal film 15 in the display area on the pixel electrode, a transflective thin film transistor array substrate is formed. If the metal film 15 is not left in the display area on the pixel electrode, a transmission type thin film transistor array substrate is formed. FIG. 7D is an explanatory diagram of this embodiment (FIG. 7D).
Shows an example of a transmission type.

Next, after the resist 13 is stripped off, as an impurity implantation step, an n-type impurity is implanted into the semiconductor film 3 by ion doping to form a channel region 6, an LDD region 7 and a source / drain region 8 (FIG. 7 (d)).

In this embodiment, a region having a smaller impurity doping amount than the LDD region 7 is defined as the channel region 6.
Is defined.

The use of an ITO film as the light-transmitting conductive film 14 is desirable in terms of high light-transmitting properties, conductivity, and heat resistance.

Further, as the metal film 15, Ta, Cr, Ti, Mo, W, A formed by sputtering or the like.
It is desirable to use a single-layer film or a laminated film of g, Si, an alloy thereof, and an Al alloy because a battery reaction with the ITO film is prevented.

In the impurity implantation step, the convex portion of the gate electrode 5 is
Since the recess of the gate electrode 5 is used as an implantation mask for the DD region 7, the channel region 6, the source / drain region 8, and the LDD region 7 having a smaller impurity implantation amount than the source / drain region 8 into which the impurity is not implanted are formed. It can be formed in a self-aligned manner by a single impurity implantation process.

Subsequently, a silicon oxide film having a thickness of 300 nm is formed as the interlayer insulating film 9, and the silicon oxide film is formed by photolithography and etching in order to make electrode contact with the source / drain region 8 and the pixel electrode 12. After the opening, a metal film made of Ti, Al or the like is formed, and the source / drain electrodes 10 are formed by photolithography and etching.

When a contact hole to the source / drain region 8 is opened, a part of the interlayer insulating film 9 on the gate electrode 5 is also opened. 5 is preferably electrically connected to the source / drain electrode 10 to prevent short circuit or disconnection due to static electricity generated during the manufacturing process.

Note that the connection between the gate electrode 5 and the source / drain electrode 10 is finally disconnected in one of the steps.

Further, after the passivation film 11 made of a silicon nitride film is formed, the pixel electrode 12 and, if necessary, the pad portions of the gate electrode and the source / drain electrode are opened by photolithography and etching.
Through the steps described above, a thin film transistor array substrate is completed (FIG. 8).

In the present embodiment, the opening of the pixel electrode is performed after the passivation film 11 is formed. However, the opening of the pixel electrode is simultaneously performed when the contact hole to the source / drain region 8 is opened. The effect of the present invention can be exerted even if holes are opened. In this case, in patterning the source / drain electrodes,
By leaving the metal film constituting the source / drain electrodes on a part of the pixel electrode, a transflective thin film transistor array substrate can be formed. In addition, the pixel electrode includes a transmissive portion made of a translucent conductive film, a reflective portion composed of a laminated film of a metal film 15 forming a part of a gate electrode and a metal film forming a source / drain electrode, A preferable configuration in which the portion has irregularities is preferable because the reflectance of the reflection portion increases.

In the method of manufacturing a thin film transistor array substrate according to the present embodiment, the gate electrode and the pixel electrode can be formed in one photolithography step, and the number of manufacturing steps is reduced.

Further, since the thin film transistor array substrate of the present invention has a GOLD structure, the thin film transistor
Since the LDD region does not become a parasitic resistance at N,
A thin film transistor having a high N current and a low OFF current is realized.

Further, in the thin film transistor array substrate of the present invention, the gate electrode has irregularities, and the film thickness decreases stepwise on the side surfaces. Defects such as a short circuit between the electrode and the source / drain electrode are reduced.

In this embodiment, an n-type impurity (specifically, phosphorus) is used as an impurity, but a p-type impurity such as boron may be used.

(Embodiment 4) The present embodiment relates to a liquid crystal display device of the present invention.

FIG. 10 is a schematic diagram of a liquid crystal display device according to a fourth embodiment of the present invention. FIG. 11 is an equivalent circuit of a liquid crystal display device according to a fourth embodiment of the present invention. Using the method described in Embodiment Mode 1, 2, or 3, a thin film transistor including a pixel electrode is formed in a matrix as a switching transistor of each pixel, an alignment film is applied, and rubbing is performed. An orientation treatment was performed. FIG. 10 shows an embodiment in which a thin film transistor is formed by the method described in Embodiment 2. Then, an alignment film was similarly applied to the counter substrate 16 on which the counter electrode 18 and the color filter 17 were formed, and an alignment process was performed by rubbing. The two substrates are bonded together, and the liquid crystal 19
And the polarizing plates 20 are arranged before and after both substrates. Then, by connecting the driving circuit 22 for driving each switching transistor 25, the liquid crystal display device is completed.

Note that by using a thin film transistor having a high ON current and a low OFF current manufactured by the method described in Embodiment Mode 1, Embodiment 2 or Embodiment 3 as the switching transistor 25 of the pixel, a display is realized. It is possible to reduce the number of manufacturing steps for transmissive and transflective liquid crystal display devices having excellent quality.

As a result, a liquid crystal display device having excellent display quality can be manufactured at low cost and with high productivity.

(Embodiment 5) The present embodiment relates to an electroluminescent display device of the present invention.

FIG. 12 is a schematic view of an electroluminescent display device according to a fifth embodiment of the present invention. FIG.
Is an equivalent circuit of the electroluminescent display device according to the fifth embodiment of the present invention. By using the method described in Embodiment Mode 1, 2, or 3, a transmission thin film transistor is formed in a matrix as a switching transistor and a current driving TFT of each pixel. FIG. 12 shows an embodiment in which a thin film transistor is formed by the method described in Embodiment 2. Thereafter, for example, a polydialkylfluorene derivative 29 which actually emits light is formed with, for example, polyethylenedioxythiophene (PEDT) as the conductive polymer 28, and finally C
The cathode 30 is deposited to complete the electroluminescent display device. The operation is as follows. First, the scanning line 2 is turned on so that the switching transistor 25 is turned on.
When a display signal is applied to the signal line 24 when the pulse signal is given to the transistor 3, the driving transistor 32 is turned on, a current flows from the current supply line 33, and the electroluminescence cell 31 emits light.

In this embodiment, a polydialkylfluorene derivative is used as the electroluminescent material, but other organic materials, for example, other polyfluorene-based materials, polyphenylvinylene-based materials, or inorganic materials may be used. As a method for forming the electroluminescent material, a method such as coating, vapor deposition, or inkjet may be used.

The thin-film transistor manufactured by the method described in Embodiment Mode 1, Embodiment 2 or Embodiment 3 having a high ON current and a low OFF current is connected to the switching transistor 25 and the driving transistor 32 of the pixel.
As a result, it is possible to reduce the number of manufacturing steps for an electroluminescent display device having excellent display quality.

Thus, an electroluminescent display device having excellent display quality can be manufactured at low cost and with high productivity.

Further, the electroluminescent display device does not require a counter substrate, a polarizing plate, a backlight, and the like, and therefore can be manufactured at lower cost than a liquid crystal display device.

[0118]

According to the structure of the thin film transistor of the present invention, the manufacturing process is simplified and the ON current is improved as compared with the prior art. Thus, according to the method for manufacturing a thin film transistor of the present invention, the number of manufacturing steps is reduced as compared with the conventional method, so that productivity can be improved, manufacturing cost can be reduced, and the practical effect is large.

Further, according to the liquid crystal display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the high quality liquid crystal display device is improved. The practical effect is great.

Further, according to the electroluminescent display device of the present invention, the manufacturing process of the TFT for driving the pixel is simplified, and the driving capability of the pixel is improved, so that the productivity of the electroluminescent display device with high image quality is improved. Improved, practical effect is great.

[Brief description of the drawings]

FIG. 1 is a schematic diagram showing a first half of a first embodiment of a thin film transistor array substrate according to the present invention.

FIG. 2 is a schematic view of the latter half of the first embodiment of the thin film transistor array substrate according to the present invention.

FIG. 3 is a schematic view of a thin film transistor array substrate according to the first embodiment of the present invention.

FIG. 4 is a schematic diagram of a transflective thin film transistor array substrate according to the present invention.

FIG. 5 is a process schematic diagram of a thin film transistor according to a second embodiment of the present invention.

FIG. 6 is a schematic view of a thin film transistor according to a second embodiment of the present invention.

FIG. 7 is a process schematic diagram of a thin film transistor array substrate according to a third embodiment of the present invention.

FIG. 8 is a schematic view of a thin film transistor array substrate according to a third embodiment of the present invention.

FIG. 9 is a schematic view of the process of a conventional top gate type TFT.

FIG. 10 is a schematic diagram of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 11 is a diagram showing an equivalent circuit of a liquid crystal display device according to a fourth embodiment of the present invention.

FIG. 12 is a schematic view of an electroluminescent display device according to a fifth embodiment of the present invention.

FIG. 13 is a diagram showing an equivalent circuit of an electroluminescence display device according to a fifth embodiment of the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2 Buffer layer 3 Semiconductor film 4 Gate insulating film 5 Gate electrode 6 Channel region 7 LDD region 8 Source / drain region 9 Interlayer insulating film 10 Source / drain electrode 11 Passivation film 12 Pixel electrode 13 Resist 14 Translucent conductive film 15 Metal film 16 Counter substrate 17 Color filter 18 Counter electrode 19 Liquid crystal 20 Polarizer 21 Backlight 22 Drive circuit 23 Scan line 24 Signal line 25 Switching transistor 26 Liquid crystal cell 27 Storage capacitor 28 Conductive polymer 29 Polyfluorene derivative 30 Ca cathode 31 Electroluminescence cell 32 Driving transistor 33 Current supply line

Continuation of the front page (51) Int.Cl. ⁷ Identification code FI Theme coat II (reference) H01L 21/28 301 H01L 29/78 616A 617L 617K 627C F term (reference) 2H092 JA24 JA34 JA41 KA04 KA05 KA10 KB25 MA08 MA15 MA17 MA27 MA30 NA27 PA08 PA09 PA11 PA13 4M104 BB02 BB14 BB36 CC05 FF13 GG20 5C094 AA02 AA42 AA43 AA45 AA46 BA03 BA27 BA43 CA19 DA09 EA04 EA05 EB02 HA08 5F110 AA07 AA16 CC02 DD02 EE02 EE04 GG02 FF23 NN24 NN72 PP03 PP35 QQ02 QQ04 QQ11

Claims (35)

[Claims] Claims: 1. An insulator having at least a channel region,
A method of manufacturing a thin film transistor including a semiconductor film including an LDD region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. Forming a first thin film including at least a semiconductor film; forming a first resist pattern on the first thin film; and etching the first thin film using the first resist pattern as a mask And forming a second resist pattern by processing the first resist pattern, and implanting impurities into the first thin film using the second resist pattern as a mask. A method for manufacturing a thin film transistor. 2. An insulator having at least a channel region,
A method of manufacturing a thin film transistor including a semiconductor film including an LDD region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. A step of forming a metal film to be a gate electrode on a substrate on which at least a semiconductor film and a gate insulating film are formed, a step of forming a first resist pattern on the metal film, and masking the first resist pattern Etching the metal film, processing a first resist pattern to form a second resist pattern, and using the second resist pattern as a mask to form a part of the metal film to a desired thickness. Forming irregularities in the metal film by etching the semiconductor film; and forming the semiconductor film using the metal film having irregularities as a mask. Manufacturing method of a thin film transistor which is characterized in that at least comprising the step of implanting impurities into. 3. The semiconductor device according to claim 2, wherein an LDD region and a source / drain region are formed in the semiconductor film by a step of implanting impurities into the semiconductor using the metal film having the unevenness as a mask. Method for manufacturing thin film transistor. 4. At least a channel region on the insulator,
A thin film transistor including a semiconductor film including an LDD region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film.
The gate electrode is formed of a single-layer film having a concave portion and a convex portion,
A thin film transistor, wherein an LDD region of a semiconductor film is formed in a self-aligned manner with respect to the concave portion of the gate electrode. 5. At least a channel region on the insulator,
A thin film transistor including a semiconductor film including an LDD region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film.
The gate electrode is formed of a laminated film including a first electrode layer and a second electrode layer formed thereon, and a channel of the semiconductor film is provided below the first electrode layer via the gate insulating film. A thin film transistor, wherein a channel region of the semiconductor film is formed below the second electrode layer via the first electrode layer and the gate insulating film. . 6. A semiconductor film having at least a channel region, an LDD region, and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. And a liquid crystal display device in which at least pixels are driven by a thin film transistor including a pixel electrode connected to the source electrode or the drain electrode, wherein the gate electrode of the thin film transistor connected to a scanning line has a concave portion and a convex portion. A liquid crystal display device, wherein an LDD region of the semiconductor film is formed in a self-aligned manner with respect to a concave portion of the gate electrode. 7. The liquid crystal display device according to claim 6, wherein the gate electrode comprises a single layer film. 8. The gate electrode comprises a laminated film including a first electrode layer and a second electrode layer formed thereon,
The concave portion of the gate electrode comprises a first electrode layer, and the convex portion of the gate electrode comprises a first electrode layer and a second electrode layer formed thereon. Liquid crystal display device. 9. A semiconductor film having at least a channel region, an LDD region, and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. And an electroluminescence display device having a switching and current driving thin film transistor having a pixel electrode connected to the source electrode or the drain electrode in a pixel, wherein the gate electrode of the thin film transistor connected to a scanning line has a concave portion. And a convex part,
An electroluminescent display device, wherein an LDD region of the semiconductor film is formed in a self-aligned manner with respect to a concave portion of the gate electrode. 10. The electroluminescent display device according to claim 9, wherein said gate electrode is formed of a single-layer film. 11. The gate electrode comprises a laminated film comprising a first electrode layer and a second electrode layer formed thereon, wherein the recess of the gate electrode comprises a first electrode layer, The electroluminescent display device according to claim 9, wherein the protruding portion of the electrode comprises a first electrode layer and a second electrode layer formed thereon. 12. A semiconductor film having at least a channel region, an LDD region, and a source / drain region on an insulator, a gate insulating film, a gate electrode formed on the gate insulating film, and connected to the semiconductor film. In a method for manufacturing a thin film transistor array substrate including a source electrode and a drain electrode and a pixel electrode connected to the source electrode or the drain electrode, a light-transmitting conductive film is formed on a substrate on which at least a semiconductor film and a gate insulating film are formed. Forming a metal film sequentially, forming a first resist pattern on the metal film, and etching the metal film and the light-transmitting conductive film using the first resist pattern as a mask to form a gate. Forming a pattern of electrodes and pixel electrodes, and processing the first resist pattern A step of forming a second resist pattern; a step of etching at least a part of the metal film forming the pixel electrode using the second resist pattern as a mask; a step of forming a source / drain region of the semiconductor film and the pixel A method for manufacturing a thin film transistor array substrate, comprising at least a step of connecting electrodes. 13. A semiconductor film having at least a channel region and a source / drain region on an insulator, a gate insulating film, a gate electrode formed on the gate insulating film, a source electrode connected to the semiconductor film, and In a thin film transistor array substrate including a drain electrode and a pixel electrode connected to the source electrode or the drain electrode, the gate electrode is formed of a laminated film of a light-transmitting conductive film and a metal film, and the pixel electrode is at least the gate electrode. A thin film transistor array substrate comprising a light-transmitting conductive film in the same layer as the above. 14. A semiconductor film having at least a channel region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, a source electrode and a drain electrode connected to the semiconductor film, and the source. In a liquid crystal display device in which at least a pixel is driven by a thin film transistor including an electrode or a pixel electrode connected to the drain electrode, the gate electrode of the thin film transistor connected to a scan line is a stack of a light-transmitting conductive film and a metal film. A liquid crystal display device comprising a film, wherein the pixel electrode comprises a light-transmitting conductive film at least in the same layer as the gate electrode. 15. A semiconductor film having at least a channel region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, a source electrode and a drain electrode connected to the semiconductor film, and the source. In an electroluminescence display device having a switching and current driving thin film transistor having a pixel electrode connected to an electrode or the drain electrode in a pixel, the gate electrode of the thin film transistor connected to a scanning line has a light-transmitting conductive property. An electroluminescent display device comprising a laminated film of a film and a metal film, wherein the pixel electrode comprises a light-transmitting conductive film at least in the same layer as the gate electrode. 16. A semiconductor film having at least a channel region, an LDD region, and a source / drain region on an insulator, a gate insulating film, a gate electrode formed on the gate insulating film, and connected to the semiconductor film. In a method for manufacturing a thin film transistor array substrate including a source electrode and a drain electrode and a pixel electrode connected to the source electrode or the drain electrode, a light-transmitting conductive film is formed on a substrate on which at least a semiconductor film and a gate insulating film are formed. Forming a metal film sequentially, forming a first resist pattern on the metal film, and etching the metal film and the light-transmitting conductive film using the first resist pattern as a mask to form a gate. Forming a pattern of electrodes and pixel electrodes, and processing the first resist pattern Forming a second resist pattern, etching at least a part of the metal film forming the gate electrode using the second resist pattern as a mask, and implanting impurities using the gate electrode as a mask A method of manufacturing a thin film transistor array substrate, comprising at least a step of forming an LDD region and a source / drain region of a semiconductor film, and a step of connecting the source / drain region of the semiconductor film to the pixel electrode. 17. A semiconductor film having at least a channel region, an LDD region, and a source / drain region on an insulator, a gate insulating film, a gate electrode formed on the gate insulating film, and connected to the semiconductor film. In a thin film transistor array substrate including a source electrode and a drain electrode and a pixel electrode connected to the source electrode or the drain electrode, the gate electrode formed in the same layer as the pixel electrode has a light-transmitting conductive film and A channel region and an LDD region of the semiconductor film are formed below the light-transmitting conductive film with the gate insulating film interposed therebetween, and a lower portion of the metal film is formed below the light-transmitting conductive film. A thin film transistor, wherein a channel region of the semiconductor film is formed via the light transmitting conductive film and the gate insulating film. A transistor array substrate. 18. A semiconductor film including at least a channel region, an LDD region, and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. In a liquid crystal display device in which at least a pixel is driven by a thin film transistor including a pixel electrode connected to the source electrode or the drain electrode, the gate electrode formed in the same layer as the pixel electrode has a light-transmitting conductive film. A channel region and an LDD region of the semiconductor film are formed below the light-transmitting conductive film with the gate insulating film interposed therebetween. A channel region of the semiconductor film formed through the light-transmitting conductive film and the gate insulating film. A liquid crystal display device characterized by the following. 19. The display device according to claim 14, wherein a part of the pixel electrode has a laminated structure of the light-transmitting conductive film and the light-shielding metal film, and a display is of a semi-transmissive type. The liquid crystal display device according to the above. 20. The light-shielding metal film is composed of a first metal film forming at least a part of a gate electrode and a second metal film forming a source electrode and a drain electrode, and has irregularities on its surface. 20. The liquid crystal display device according to claim 19, wherein: 21. A semiconductor film having at least a channel region, an LDD region and a source / drain region, a gate insulating film, a gate electrode formed on the gate insulating film, and a source electrode and a drain electrode connected to the semiconductor film. And an electroluminescence display device including a switching and current driving thin film transistor in a pixel including a pixel electrode connected to the source electrode or the drain electrode, wherein the gate electrode formed in the same layer as the pixel electrode is A channel layer and an LDD region of the semiconductor film are formed below the light-transmitting conductive film with the gate insulating film interposed therebetween. The light-transmitting conductive film includes a stacked film including a metal film formed thereon. The semiconductor under the metal film via the translucent conductive film and the gate insulating film. An electroluminescent display device, wherein a channel region of a film is formed. 22. The first resist pattern, which is formed by a photolithography step of transferring a mask pattern of a reticle having a light-transmitting portion, a semi-light-transmitting portion, and a light-shielding portion to a resist, has a partial film having irregularities. 4. The resist pattern according to claim 1, wherein the resist patterns have different thicknesses.
The method for manufacturing a thin film transistor according to any one of the above. 23. The method according to claim 22, wherein the semi-light-transmitting portion of the reticle is formed of a light-shielding pattern having a size smaller than a resolution limit. 24. The first resist pattern, which is formed by a photolithography step of transferring a mask pattern of a reticle having a light-transmitting portion, a semi-light-transmitting portion, and a light-shielding portion onto a resist, is partially formed with unevenness. 17. The method according to claim 12, wherein the resist patterns have different thicknesses. 25. The method according to claim 24, wherein the translucent portion of the reticle is formed of a light-shielding pattern having a size equal to or less than a resolution limit. 26. The method according to claim 1, wherein the semiconductor film is a crystalline silicon film. 27. The method according to claim 12, wherein the semiconductor film is a crystalline silicon film. 28. The thin film transistor according to claim 4, wherein the semiconductor film is a crystalline silicon film. 29. The thin film transistor array substrate according to claim 13, wherein the semiconductor film is a crystalline silicon film. 30. The semiconductor device according to claim 6, wherein the semiconductor film is a crystalline silicon film.
4. The liquid crystal display device according to claim 18 or claim 19. 31. The semiconductor device according to claim 9, wherein the semiconductor film is a crystalline silicon film.
2. The electroluminescent display device according to claim 1. 32. The method according to claim 12, wherein the light-transmitting conductive film is an ITO film. 33. The thin film transistor array substrate according to claim 13, wherein the light-transmitting conductive film is an ITO film. 34. The light-transmitting conductive film is an ITO film.
10. The liquid crystal display device according to any one of 9. 35. The electroluminescent display device according to claim 15, wherein the light-transmitting conductive film is an ITO film.