JP2002076311A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

Info

Publication number
JP2002076311A
JP2002076311A JP2000265384A JP2000265384A JP2002076311A JP 2002076311 A JP2002076311 A JP 2002076311A JP 2000265384 A JP2000265384 A JP 2000265384A JP 2000265384 A JP2000265384 A JP 2000265384A JP 2002076311 A JP2002076311 A JP 2002076311A
Authority
JP
Japan
Prior art keywords
layer
semiconductor device
semiconductor
semiconductor substrate
connection hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000265384A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002076311A5 (enExample
Inventor
Kazunobu Kuwazawa
和伸 桑沢
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2000265384A priority Critical patent/JP2002076311A/ja
Priority to US09/943,094 priority patent/US20020068428A1/en
Publication of JP2002076311A publication Critical patent/JP2002076311A/ja
Publication of JP2002076311A5 publication Critical patent/JP2002076311A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743—Making of internal connections, substrate contacts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/811—Combinations of field-effect devices and one or more diodes, capacitors or resistors
    • H10D84/813—Combinations of field-effect devices and capacitor only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00—Three-dimensional [3D] integrated devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2000265384A 2000-09-01 2000-09-01 半導体装置およびその製造方法 Pending JP2002076311A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000265384A JP2002076311A (ja) 2000-09-01 2000-09-01 半導体装置およびその製造方法
US09/943,094 US20020068428A1 (en) 2000-09-01 2001-08-29 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000265384A JP2002076311A (ja) 2000-09-01 2000-09-01 半導体装置およびその製造方法

Related Child Applications (2)

Application Number Title Priority Date Filing Date
JP2008070860A Division JP2008199045A (ja) 2008-03-19 2008-03-19 半導体装置およびその製造方法
JP2008070859A Division JP2008199044A (ja) 2008-03-19 2008-03-19 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2002076311A true JP2002076311A (ja) 2002-03-15
JP2002076311A5 JP2002076311A5 (enExample) 2006-10-19

Family

ID=18752657

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000265384A Pending JP2002076311A (ja) 2000-09-01 2000-09-01 半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US20020068428A1 (enExample)
JP (1) JP2002076311A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009150863A (ja) * 2007-07-26 2009-07-09 Honeywell Internatl Inc 多層シリコン・オン・インシュレータ基板中に位置非依存の駆動装置電極を有するセンサ
JP2013222838A (ja) * 2012-04-17 2013-10-28 Renesas Electronics Corp 半導体装置およびその製造方法
KR20220013902A (ko) * 2020-07-27 2022-02-04 더 보잉 컴파니 매립형 웰 장치에 대한 서브미크론 콘택트 제작

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6645796B2 (en) * 2001-11-21 2003-11-11 International Business Machines Corporation Method and semiconductor structure for implementing reach through buried interconnect for silicon-on-insulator (SOI) devices
FR2987699A1 (fr) * 2012-03-01 2013-09-06 St Microelectronics Sa Composant electronique realise sur un substrat fdsoi
JP7157027B2 (ja) 2019-09-12 2022-10-19 株式会社東芝 半導体装置

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69839780D1 (de) * 1997-12-19 2008-09-04 Advanced Micro Devices Inc Silizium auf eine isolator-konfiguration welche mit der massen-cmos-architektur kompatibel ist
US6121659A (en) * 1998-03-27 2000-09-19 International Business Machines Corporation Buried patterned conductor planes for semiconductor-on-insulator integrated circuit
US6600173B2 (en) * 2000-08-30 2003-07-29 Cornell Research Foundation, Inc. Low temperature semiconductor layering and three-dimensional electronic circuits using the layering
US6759282B2 (en) * 2001-06-12 2004-07-06 International Business Machines Corporation Method and structure for buried circuits and devices

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009150863A (ja) * 2007-07-26 2009-07-09 Honeywell Internatl Inc 多層シリコン・オン・インシュレータ基板中に位置非依存の駆動装置電極を有するセンサ
JP2013222838A (ja) * 2012-04-17 2013-10-28 Renesas Electronics Corp 半導体装置およびその製造方法
KR20220013902A (ko) * 2020-07-27 2022-02-04 더 보잉 컴파니 매립형 웰 장치에 대한 서브미크론 콘택트 제작
JP2022023811A (ja) * 2020-07-27 2022-02-08 ザ・ボーイング・カンパニー 埋め込まれたウェルデバイスに対するサブミクロン接点を製造すること
JP7739074B2 (ja) 2020-07-27 2025-09-16 ザ・ボーイング・カンパニー 埋め込まれたウェルデバイスに対するサブミクロン接点を製造すること
KR102885684B1 (ko) 2020-07-27 2025-11-12 더 보잉 컴파니 매립형 웰 장치에 대한 서브미크론 콘택트 제작

Also Published As

Publication number Publication date
US20020068428A1 (en) 2002-06-06

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