JP2001332643A - Semiconductor device and its manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can realize a multi-chip module while improving reliability, and its manufacturing method. SOLUTION: After a rear side protection film 11 is formed in a back side of wafers 1-1 to 1-3, discrete dicing treatment is carried out. After the semiconductor chips A, B, C, subjected to discrete dicing treatment are disposed again to realize a multi-chip module, a first surface protection film 3 which covers a surface and a side of the module and fills up a chip clearance are formed. After re-wiring 5, a post 6 and a second surface protection film 7 are provided, a semiconductor device 10, which is made a multi-chip module by dicing again along a cut line CL to leave the surface protection film 3 of a prescribed thickness in a cut surface, is formed. Therefore, rear, front and side surfaces of the semiconductor device 10 are entirely covered with the protection films 3, 11, thus improving reliability.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to a CSP (Chip Siz
The present invention relates to a semiconductor device having a (e.

[0002]

2. Description of the Related Art In recent years, a semiconductor device having a CSP structure in which a chip and a package have substantially the same size has been known.
12 to 15 are cross-sectional views illustrating an example of a wafer-level CSP, which is a semiconductor device of this type. Hereinafter, the manufacturing process will be described with reference to these drawings. In the semiconductor device, as shown in FIG. 12, first, a plurality of connection pads (aluminum electrodes) 2 are formed on the surface (circuit surface) side of a wafer (silicon substrate) 1 and then, although not shown, each connection pad is formed. A protective film made of silicon oxide, silicon nitride, or the like is formed so as to cover the entire front surface of the wafer 1 so as to expose the central portion of the wafer 2.

[0003] A first front-side protective film 3 is formed on the protective film so that a central portion of each connection pad 2 is opened. The first front-side protective film 3 is formed, for example, by applying and curing a polyimide-based resin material over the entire circuit surface side of the wafer 1 and then performing resist patterning and protective film patterning using an etchant, and then stripping the resist. Is formed.

Next, a rewiring 5 is provided on each connection pad 2 exposed through the opening 4 formed by the first front-side protective film 3.
To form As described later, the rewiring 5 is formed by arranging a columnar electrode (post 6 described later) connected to each connection pad 2 of each cut and singulated semiconductor device on a matrix at the center, as described later. The purpose is to increase the pitch and electrode area of the connection pads 2 formed only in the peripheral portion of the semiconductor device to improve the bonding strength with the circuit board and the reliability of the connection.

After the rewiring 5 is formed, a plurality of posts (columnar electrodes) 6 are provided at predetermined positions on the rewiring 5. The post 6 is formed, for example, by applying and curing a resist for forming a post with a thickness of about 100 to 150 μm, performing resist patterning, and applying electrolytic plating to a portion opened thereby. In this way, when the structure shown in FIG. 12 is obtained, as shown in FIG. 13, the entire circuit surface side of the wafer 1 is molded with a resin material such as epoxy so as to cover the posts 6, and the second surface side protective film is formed. 7 is formed.
Then, after the second front-side protective film 7 is cured, the entire wafer 1 is transferred to a grinding table, and the upper surface of the second front-side protective film 7 is polished by a grinder to remove the post 6. Is exposed (see FIG. 14).

Thereafter, the back side of the wafer 1 is polished so as to have a predetermined thickness, or a process of marking a product number or a lot number on the polished back side is performed. Next, the wafer 1 is placed on a dicing tape mounted on a dicing frame with the back side facing downward, and then the wafer 1 is diced along a cut line 8 as shown in FIG. The individualized semiconductor device 10 is formed.

[0007]

By the way, in order to realize a semiconductor device which is made into a multi-chip module with such a wafer level CSP structure, a plurality of chips of rewirings 5 and posts 6 are arranged in one module. As far as possible, the area of the semiconductor device 10 to be singulated may be increased. However, even if the area of the semiconductor device 10 to be singulated is simply enlarged, the side surface (including the cut surface) and the back surface of the silicon substrate (wafer 1) are exposed as can be seen from the cross-sectional structure shown in FIG. In such a state, there is a problem that this becomes a factor for lowering reliability such as chip breakage and moisture penetration from an exposed surface. The present invention has been made in view of such circumstances, and an object of the present invention is to provide a semiconductor device which can be formed into a multi-chip module while improving reliability and a method of manufacturing the same.

[0008]

According to a first aspect of the present invention, there is provided a semiconductor device, comprising: a chip module having a set of semiconductor chips of a plurality of singulated wafers; The chip module is characterized by comprising a first protective film covering the back surface, and a second protective film formed so as to cover the front surface and the cut surface when the individual pieces are cut for each module.

According to a sixth aspect of the present invention, in the method of manufacturing a semiconductor device, a first step of forming a first protective film covering a back surface of the wafer, and a plurality of wafers having passed through the first step are individually formed into chips. A second step of singulating and rearranging the chips into chip modules each having a set of chips on each wafer; and a third step of forming a second protective film covering the surface and side surfaces of the chip modules.
And a fourth step of cutting the chip module into individual pieces with a width smaller than the chip gap so that the second protective film remains on the cut surface.

In the semiconductor device according to the present invention, the back surface of a chip module in which semiconductor chips of a plurality of singulated wafers are grouped is cut by a first protective film on the front surface and each module. Since the cut surface is covered with the second protective film, it is possible to form a multi-chip module while improving the reliability.

Further, in the method of manufacturing a semiconductor device according to the present invention, a plurality of wafers on which a first protective film covering a back surface is formed are divided into semiconductor chips, and a chip module in which a set of chips of each wafer is formed. After that, a second protective film is formed to cover the surface and side surfaces of the chip module, and the chip module is divided into individual pieces with a width smaller than the chip gap so that the second protective film remains on the cut surface. , The individualized chip module will be covered with a protective film on the back, surface and side surfaces, and as a result,
Factors that lower reliability, such as chip breakage and moisture penetration from the exposed surface, can be eliminated, and a multi-chip module can be formed while improving reliability.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. 1 to 10 are cross-sectional views for explaining a structure of a semiconductor device according to an embodiment and a manufacturing process thereof. In these drawings, portions common to the above-described conventional example are denoted by the same reference numerals. It is. In this embodiment, as will be described later, a multi-chip module including a set of semiconductor chips A, B, and C, which are singulated from three different types of wafers 1-1 to 1-3, respectively, is described. I assume.

In the manufacturing process according to the present invention, as shown in FIG. 1, a back surface of a wafer 1 having a thickness t1 on which a plurality of connection pads 2 are formed is cut and polished to obtain a thickness t2 背面. (1/3 to 2/3) Wafer 1 of t1 is formed. A plurality of connection pads 2 formed on the front side of wafer 1
Are provided in the peripheral portion of each semiconductor chip of the module which is cut into pieces by cutting in the final step of the process. The integrated circuit elements (not shown) formed between the connection pads 2 of each semiconductor chip What is connected. Note that a protective film P made of silicon oxide, silicon nitride, or the like is formed on the front side of the wafer 1 so as to cover the entire surface of the wafer 1. An exposed opening is formed.

Next, as shown in FIG. 2, a protective resin (for example, an organic resin material such as polyimide or epoxy) is applied to the back side of the cut and polished wafer 1 so as to have a predetermined thickness. The back surface protective film 11 is formed. Backside protective film 1
1 may be a single layer of a resin such as polyimide or epoxy, or may have a laminated structure of a plurality of resin layers.

Next, the backside protective film 11 is cured, and thereafter, a lot number, a product number, and the like are marked on the backside protective film 11 by a laser (see FIG. 3). After the marking is completed, the wafer 1 is mounted on the dicing tape 21 mounted on the dicing frame 20 so that the back surface side protective film 11 faces as shown in FIG. When the wafer 1 is mounted on the dicing tape 21, the wafer 1 is cut along a predetermined cut line CL.
Is subjected to a dicing process for engraving the cutting groove 1a. At this time, the backside protective film 11 is fully cut so that the individual semiconductor chips can be separated from the dicing tape 21 individually.

Now, different types of wafers 1-1 to 1-3
Are subjected to the steps shown in FIGS. 1 to 4, whereby the semiconductor chips A, B,
It is assumed that C is singulated (see FIGS. 5A to 5C).
In the above description, different types of wafers mean different integrated circuits formed in the semiconductor chips A, B, and C which are cut into pieces by cutting. Each of the semiconductor chips A, B, and C is peeled off from the dicing tape 20, and is placed on another dicing tape 20 as shown in FIG.
As shown in (1), the semiconductor chips A, B, and C are divided into blocks so that each of the semiconductor chips A, B, and C constitutes one set.

At this time, an appropriate space is provided between the facing surfaces of the semiconductor chips A, B, and C. Also,
An appropriate space is provided between the blocks. However, the space between the blocks may be larger than the space between the opposing surfaces of the semiconductor chips A, B, and C in each block. This is desirable in reducing the size of each multichip module. At this time, there may be no space between the opposing surfaces of the semiconductor chips A, B, and C in each block. In this embodiment, it is assumed that the semiconductor chips B and C are arranged with an appropriate space provided in the width direction of the semiconductor chip A.

After the rearrangement is completed, FIG.
As shown in FIG. 1, the semiconductor chips A, B, and C are rearranged while covering the side surfaces (peripheral surfaces) and opening the central portions of the connection pads 2 provided on the front surface side. First covering the surface to fill the gap between the chips
Is formed.

The first front-side protective film 3 includes a protective film P formed on the front surface of each of the rearranged semiconductor chips A, B, and C, and a connection pad exposed from an opening of the protective film P. 2 above, it is desirable to form a method by applying a polyimide resin material and spin-coating, for example, so as to fill the side surfaces of each of the semiconductor chips A, B, and C and the gap between the chips. It is possible to use an appropriate method such as a printing method using a squeegee or a coating method using ink ejection from nozzles.

Next, each semiconductor chip A,
After the first surface-side protective film 3 formed on the surfaces of B and C is cured, a photoresist is applied to the side surface and the upper surface (not shown). (Not shown) and the surface-side protective film 3 are sequentially patterned. Thereby, the first surface-side protective film 3
Then, similarly to the above-described conventional example, the opening 4 exposing the central portion of each connection pad 2 is formed, and then the photoresist is removed.

Thereafter, as shown in FIG. 7 which is an enlarged view of the main part M in FIG. 6, the connection pad 2 exposed through the opening 4 formed in the first front side protective film 3 is formed. The rewiring 5 is formed. For the rewiring 5, a UBM layer is deposited on the front surface protective film 3 after the photoresist is stripped by sputtering or the like.
Thereafter, the photoresist for rewiring is applied and cured, and the photoresist for rewiring is patterned by photolithography with an opening having a predetermined shape so that the rewiring 5 shown in FIG. 7 is formed. It is formed by applying electrolytic plating to a portion opened by this resist. In the state where the rewiring 5 is formed by the electrolytic plating, U deposited on the entire surface of the front-side protective film 3 is removed.
The BM layer is made of UB deposited on the dicing frame 20.
The plating electrode including the M layer portion is left.

In this manner, one end is connected to each connection pad 2, and the other end is connected to the front side protective film 3, and each rewiring extending to the center side of each semiconductor chip of the module to be cut into pieces by cutting. After the formation of the post 5, a post (columnar electrode) 6 is provided at a predetermined location on the other end of each rewiring 5. Although not shown, the post 6 is coated with a photoresist for forming a post with a thickness of, for example, about 100 to 150 μm, cured, and then forms an opening for exposing the center of the other end of each rewiring 5. The opening is formed by performing electrolytic plating. When performing this electrolytic plating, the UBM layer deposited on the entire surface of the first front-side protective film 3 and on the dicing frame 20 is used as one electrode. After the plating process, the photoresist for forming the post is peeled off, and the UBM layer deposited on the unnecessary portion is removed by etching. FIG. 7 is an enlarged sectional view showing a state where this step is completed.

After the structure shown in FIG. 7 is thus formed, as shown in FIG. 8, the entire circuit surface of each of the semiconductor chips A, B and C is covered with polyimide or epoxy so as to cover the post 6. The second surface-side protective film 7 is formed by molding with the above resin material. Second surface protective film 7
May be composed of a single layer of polyimide, epoxy or the like, or may be a laminated structure of these resin layers. In this case, the back side protective layer 11 and the first front side protective layer 3 described above are used.
In order to ensure reliability against environmental changes, it is preferable that the second front-side protective film 7 be formed of a resin layer containing a material whose main components are substantially the same.

Then, the second front-side protective film 7 is cured, and then its upper surface is polished to polish the end surface 6a of the post 6.
(See FIG. 8). With respect to the exposed end face 6a, an oxide film on the surface is removed, and a metallizing process such as solder printing is performed thereon. Thereafter, as shown in FIG. 10, dicing is performed along the cut line CL so that the first surface-side protective film 3 having a predetermined thickness remains on the cut surface, whereby the semiconductor chips A, B, and C are combined into one module. Is formed.

As described above, according to the embodiment of the present invention, for each of the wafers 1-1 to 1-3 of different types, the backside protective film 11 is formed on the backside, and then individualized. The semiconductor chips A, B, and C singulated from each of these wafers are sorted into non-defective products and rearranged into a multi-chip module, and the front and side surfaces of the rearranged chips A, B, and C are covered. 1st filling gap
Of the front side protective film 3 is formed, followed by the rewiring 5 and the post 6
After the second front-side protective film 7 is provided, the cut line C is formed so that the first front-side protective film 3 having a predetermined thickness remains on the cut surface.
L is again diced to form the semiconductor device 10 which has been made into a multi-chip module.
In the case of No. 0, the back surface, front surface, and side surfaces are all covered with the protective films 3 and 11, and as a result, factors that lower reliability such as chip breakage and moisture penetration from the exposed surface can be removed, and reliability is improved. It is a translation.

Further, in this embodiment, the UBM layer deposited on the dicing frame 20 is left as a plating electrode, so that a separate electrode is not formed on the wafer 1 as in the prior art. Electroplating for forming the rewiring 5 and the post 6 can be performed. Further, in this embodiment, since the back surface, the front surface, and the side surfaces of the semiconductor device 10 are all covered with the protective films 3 and 11, handling such as transferring the individualized semiconductor device 10 to a tray is extremely easy. become.

In the above-described embodiment, the intervals between the posts 6 formed on the semiconductor chips A, B, and C are shown to be different according to the size of each semiconductor chip. In order to make the bonding conditions uniform, it is desirable that the spacing be substantially uniform.
In this case, a part of the rewiring 5 formed on the protective film extends to the adjacent semiconductor chip side beyond the boundary between the semiconductor chips A, B, and C, and the post 6 is provided at the end. Is also good.

Further, in the above-described embodiment, a case has been described in which a semiconductor device is formed as a multi-chip module in which semiconductor chips cut from a plurality of types of wafers of different types are formed as a set. Even when the semiconductor chips to be manufactured are the same, the present invention can be applied to a case where only good products are sorted and rearranged, or a case where rearrangement is performed to increase the space between multi-chip modules.

In the above description, the individualized semiconductor chips A, B, and C are rearranged so as to form a multi-chip module. However, the present invention can be applied to the case of manufacturing a single chip. . That is, in the dicing step after the formation of the back surface protective film 11, as shown in FIG. 11A, for example, when the wafer 1 is diced into individual pieces, only non-defective semiconductor chips are taken out of the individualized semiconductor chips. , And rearranged in the form shown in FIG. 6B or FIG. 6C, and thereafter, the first front-side protective film 3, the rewiring 5, the post 6, and the second May be formed.

When the rearrangement is performed, it is possible to arbitrarily set, for example, to increase the space between the semiconductor chips. When the semiconductor device 10 is formed by dividing the wafer 1 into the semiconductor chips, It is also possible to make the thickness of the first front-side protective film 3 formed on the side surface of the device 10 sufficient, or to adjust the dimensions of the finally finished semiconductor device 10.

In the above-described embodiment, the rewiring 5 is formed on each of the semiconductor chips A, B, and C, and the post 6 is formed on the rewiring 5. Has a two-layer structure, but the present invention can also be applied to a semiconductor device in which the post 6 is directly formed without forming the rewiring 5 on each of the semiconductor chips A, B, and C. In that case, the surface-side protective film can be made into a single layer.

[0032]

According to the first aspect of the present invention, the back surface of the chip module in which the semiconductor chips of the plurality of singulated wafers are set as one set is formed by the first protective film, and the front surface and each module are separated. Since the cut surface when the individual pieces are cut is covered with the second protective film, a multi-chip module can be formed while improving the reliability. According to the sixth aspect of the present invention, the plurality of wafers on which the first protective film covering the back surface is formed are singulated into chips, and the chips are rearranged into chip modules each having a set of chips. After that, a second protective film is formed to cover the surface and side surfaces of the chip module, and the chip module is cut into individual pieces with a width smaller than the chip gap so that the second protective film remains on the cut surface. Therefore, the individualized chip module has its back surface, front surface and side surfaces all covered with a protective film, and as a result, it is possible to remove factors such as chip breakage and moisture penetration from the exposed surface, which lower reliability, A multi-chip module can be formed while improving reliability.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view for explaining an embodiment of the present invention, which is a cross-sectional view showing an initial state of a semiconductor device manufacturing process.

FIG. 2 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 1;

FIG. 3 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 2;

FIG. 4 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 3;

FIG. 5 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 4; .

FIG. 6 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 5;

FIG. 7 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 6;

FIG. 8 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 7;

FIG. 9 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following FIG. 8;

FIG. 10 is a cross-sectional view for explaining the semiconductor device manufacturing process following FIG. 9;

FIG. 11 is a plan view for explaining a modification.

FIG. 12 is a cross-sectional view illustrating a method of manufacturing a conventional semiconductor device.

FIG. 13 is a cross-sectional view for explaining a step following the step shown in FIG. 12;

FIG. 14 is a sectional view for illustrating a step following the step shown in FIG. 13;

FIG. 15 is a sectional view for illustrating a step following the step shown in FIG. 14;

DESCRIPTION OF SYMBOLS 1 Wafer 2 Connection pad 3 First surface protective film (second protective film) 4 Opening 5 Rewiring path 6 Post 7 Second surface protective film 10 Semiconductor device 11 Back surface protective film (First Protective Film) 20 Dicing Frame 21 Dicing Tape

Claims (10)

[Claims] 1. A chip module comprising a set of semiconductor chips of a plurality of singulated wafers, the chip module comprising: a first protective film covering a back surface;
A semiconductor device comprising: a second protective film formed so as to cover a surface and a cut surface when individual pieces are cut for each module. 2. The semiconductor device according to claim 1, wherein each of the semiconductor chips has a columnar electrode on a surface side. 3. The method according to claim 1, wherein
The semiconductor device, wherein the second protective film has a stacked structure including a lower layer and an upper layer, and a rewiring is formed on the lower layer. 4. The semiconductor device according to claim 1, wherein the semiconductor chips in each of the modules have different types of integrated circuits. 5. The semiconductor device according to claim 1, wherein the semiconductor chips in each of the modules are arranged with a space, and the second protective film is formed in a space between the semiconductor chips. A semiconductor device characterized by the above-mentioned. 6. A first step of forming a first protective film covering a back surface of a wafer, and singulating a plurality of wafers through the first step into chips, and forming a set of chips on each wafer. A second step of rearranging the chip modules, a third step of forming a second protective film covering the surface and side surfaces of the chip module, and the second step of forming the second protective film on a cut surface. And a fourth step of cutting the chip module into individual pieces with a width smaller than a chip gap. 7. The method according to claim 6, wherein the first
Forming a columnar electrode on the front side of the wafer in the step (b). 8. The invention according to claim 6, wherein
The step of forming the second protective film in the third step includes a step of forming a first surface protective film and a second surface protective film, and further includes the step of forming the first surface protective film and the second surface protective film. 2. A method of manufacturing a semiconductor device, comprising a step of forming a rewiring on the first surface protection film between the steps of forming the second surface protection film. 9. The method according to claim 6, wherein the plurality of wafers in the first step include wafers of different types. 10. The invention according to claim 6, wherein the second step includes a step of arranging each semiconductor chip in the chip module with a space, and the third step includes:
Forming a second protection film in a space between the semiconductor chips.