JP2005191485A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which reliability is enhanced, and a manufacturing method for the same. <P>SOLUTION: In manufacturing a CSP, after rewiring 5 and posts 6 are formed, dicing grooves 9 are formed by applying dicing to places for pelletizing a wafer 1, and a surface-side protecting film 7 that fills the dicing grooves 9 is formed so as to cover the surface and side faces of the wafer 1. The rear face of the wafer 1 is ground to thin the chips. The dicing grooves 9 are subjected to re-dicing to obtain the semiconductor devices 10 in such a way that the prescribed thickness of the surface-side protecting film 7 remains on each cut face. Thereby, all of the surface and the side surfaces of each pelletized semiconductor device 10 are covered with the protecting film 7. As a result, factors that degrade reliability such as chip breakage, the penetration of water from exposed faces or the like are excluded to enhance the reliability. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a semiconductor device having a CSP (chip size package) structure and a manufacturing method thereof.

A CSP structure in which the package size of a semiconductor device is almost the same as that of a semiconductor chip is known. 12 to 14 show an example of a conventional CSP manufacturing method and its structure.
As shown in FIG. 12, the semiconductor device first forms the aluminum electrode terminal 2 on the surface of the silicon substrate 1, and then exposes the surface of the silicon substrate 1 to silicon oxide and nitride so that a part of each terminal is exposed. A formed protective film covered with silicon or the like is formed. And the surface side protective film 3 is formed on this protective film so that a part of each terminal 2 may open.
The surface-side protective film 3 is formed, for example, by applying a polyimide resin material to the entire circuit surface side of the wafer 1 and then performing patterning using photolithography.

  Next, the rewiring 5 is formed on each terminal 2 exposed through the opening part 4 which the surface side protective film 3 forms. By arranging the columnar electrodes 6 connected to the respective terminals 2 of the semiconductor device, the pitch and the electrode area of the terminals 2 formed only in the peripheral portion of the semiconductor device are expanded, and the reliability of connection with the circuit board is improved. Is for.

  After the rewiring 5 is formed, a plurality of columnar electrodes 6 are provided at predetermined locations on the rewiring 5. The columnar electrode 6 is formed by performing resist patterning and performing electrolytic plating on the opened portion. In this way, when the structure shown in FIG. 12 is obtained, as shown in FIG. 13, the entire front side of the silicon substrate 1 is molded with a resin material such as epoxy so as to cover the columnar electrode 6 and the surface side protective film 7 is formed. To do. And after hardening this surface side protective film 7, the upper surface side of the surface side protective film 7 is grind | polished with a grinding device, and the end surface of the post | mailbox 6 is exposed.

Thereafter, the back side is polished so as to have a predetermined thickness. A product number or lot number is marked on the polished back side. Next, after dicing with the back side facing downward, as shown in FIG. 14, the wafer 1 is diced along the scribe line 8 so that the semiconductor device 10 separated into chips is formed. (For example, refer to Patent Document 1 and Non-Patent Document 1).
JP 2001-326299 A (page 2-3) “Super CSP” by Toshimi Kawahara, IEEE Transactions on advanced packaging, vol. 23, no. 2, May 2000, p. 215

  Incidentally, in the conventional semiconductor device 10 described above, as shown in FIG. 14, the side surface (including the cut surface) of the silicon substrate 1 is exposed, and the surface for cutting the surface protective film and the silicon substrate simultaneously. Protective film cracks and chip breakage occur at the interface between the protective film and the chip. There is a problem that this becomes a factor of reducing reliability, such as chip breakage and moisture permeation from the exposed surface. Accordingly, an object of the present invention is to provide a semiconductor device and a method for manufacturing the same that can solve such problems and improve reliability.

  In order to achieve the above object, a semiconductor device according to the present invention covers a silicon substrate having a plurality of columnar electrodes formed on the surface thereof, covers the surface and side surfaces of the silicon substrate excluding the columnar electrodes, and separates the silicon substrate. It has a surface side protective film formed so as to cover the cut surface when cut into pieces.

  In the method for manufacturing a semiconductor device of the present invention, a surface-side protective film is provided that has a plurality of planar cutting grooves at locations where the silicon substrate is separated, covers the surface and side surfaces of the silicon substrate, and fills the cutting grooves. A second step of grinding the back surface of the silicon substrate to expose the surface protective film filled in the grinding groove, and the cutting so that the surface-side protective film remains on the cut surface It has a third step of cutting the silicon substrate into pieces with a width narrower than the groove.

  In the semiconductor device according to the present invention, since the surface and side surfaces are covered with the surface-side protective film, the reliability is improved. Further, in the method of manufacturing a semiconductor device according to the present invention, a cutting groove having a plurality of planes is provided at a location where the silicon substrate is separated, and then the surface and side surfaces of the silicon substrate are covered and the cutting groove is filled. After forming the side protection film and grinding the back surface of the silicon substrate to expose the surface side protection film filled in the cutting groove, the silicon substrate is narrower than the cutting groove so that the surface side protection film remains on the cut surface. Is cut into pieces. Since the cutting grooves are composed of multiple flat surfaces, the adhesion between the cutting surface and the surface protective film is improved, and the individual semiconductor devices are all covered with the protective film on the surface and side surfaces. As a result, it is possible to remove factors that lower the reliability such as moisture permeation from the water and improve the reliability. Further, the thickness of the chip can be reduced by back surface polishing, so that a small semiconductor device can be obtained.

  Hereinafter, an embodiment of the present invention will be described with reference to the drawings. 1 to 11 are cross-sectional views for explaining a structure of a semiconductor device according to an embodiment and a manufacturing process thereof.

  In the manufacturing process according to the present invention, first, as shown in FIG. 2, a plurality of connection pads 2 are formed on the surface side, and are provided in the peripheral portion of each semiconductor chip 10 cut and separated in the final process. It has been. The connection pad 2 is electrically connected to an integrated circuit element (not shown) formed between the connection pads 2 of each semiconductor chip. A surface protective film 3 made of silicon oxide, silicon nitride, polyimide, or the like is formed on the surface side of the wafer 1 so as to cover the entire surface of the wafer. An opening 4 exposing a part is formed.

  Thereafter, the rewiring 5 is formed on the connection pad 2 exposed through the opening 4 formed in the surface protective film 3. The rewiring 5 is formed by depositing a UBM layer on the entire surface of the surface protective film 3 by UBM sputtering or the like, and then applying and curing a photoresist for rewiring, and then rewiring the photoresist for rewiring by photolithography. After the patterning having an opening with a predetermined shape is performed, electrolytic plating is performed on a portion opened by the resist.

  Thus, after forming each rewiring 5 extended to the center side of the semiconductor chip, one end is connected to each connection pad 2 and the other end is on the surface protection film 3. A post (columnar electrode) 6 is provided at a predetermined location on the other end. The post 6 has a thickness of about 100 to 150 μm, for example, applied and cured with a photoresist for forming a post, and forms an opening exposing the center of the other end of each rewiring 5. It is formed by applying electrolytic plating. After this plating process, the post-forming photoresist is peeled off, and the UBM layer deposited on unnecessary portions is removed by etching. Next, as shown in FIG. 3, when the wafer 1 is mounted on the dicing tape 21, the wafer 1 is subjected to a dicing process on the wafer 1 along a predetermined scribe line 8. Cutting is performed so that the depth of the deepest portion of the cutting groove 9 composed of a plurality of planes is smaller than the wafer thickness, and at the same time, the depth is cut deeper than a desired wafer thickness described later. By processing in this way, the surface protective film 7 filled in the cutting grooves 9 in the wafer back surface processing step described later can be exposed from the back surface of the wafer substrate 1. 8, 9, and 10 show examples of the shape of the cutting groove 1a. FIG. 11 is a plan view of the cutting groove 9 as seen from the wafer surface.

  After the structure shown in FIG. 3 is formed in this way, the entire circuit surface of the wafer 1 is molded with a resin material such as polyimide or epoxy so as to cover the post 6 as shown in FIG. A protective film 7 is formed. The surface-side protective film 7 may be composed of a single layer such as polyimide or epoxy, but may have a laminated structure of these resin layers. Then, as shown in FIG. 5, this front surface side protective film 7 is cured, and then the rear surface grinding is performed to reduce the thickness of the silicon substrate, so that the surface protective film 7 filled in the above-described cutting grooves 9 reaches the ground surface. Grind up to. In addition, the back grinding can obtain the same result by silicon etching. Thereafter, a metallization process such as solder printing is performed thereon to form bumps. Next, as shown in FIG. 6, the portion of the cutting groove 1a formed of a plurality of planes is diced again so that the surface-side protective film 7 having a predetermined thickness remains on the cut surface, and the wafer 1 is separated into chips to obtain a semiconductor device. 10 is formed. Further, when a problem occurs such that the bump formed by the above-mentioned metallization process contacts the hub of the blade during dicing, this dicing can be diced from the back surface of the silicon substrate. At this time, since no bump is formed on the back surface of the silicon substrate, there is no problem due to dicing.

  As described above, according to one embodiment of the present invention, a cutting groove 9 having a plurality of planes deeper than a desired wafer thickness is processed by dicing in advance at a location where the wafer 1 is separated into pieces, and thereafter The front surface side surface of the wafer 1 and the side surface thereof are covered, and the front surface side protective film 7 filling the cutting grooves 9 is formed. The wafer 1 is ground to the desired thickness, and the surface protective film is exposed. Since the cutting groove 9 is diced again to form the semiconductor device 10 so that the surface-side protective film 7 having a predetermined thickness remains on the processed cut surface, the surface and side surfaces of the separated semiconductor device 10 are all surfaces. As a result, it is covered with the protective film 7. As a result, it is possible to remove factors that reduce reliability such as chip breakage and moisture penetration from the exposed surface, and reliability is improved. As shown in FIG. 7, the wafer 1 may be mounted on the dicing tape 21 on either the front surface or the back surface, and the cutting groove 9 of the wafer 1 is diced along a predetermined scribe line 8. As a result, defects during dicing due to bumps formed on the wafer surface do not occur, and a high-quality chip can be manufactured.

  As described above, since the surface and side surfaces are covered with the surface-side protective film, the reliability of the apparatus can be improved. In addition, a cutting groove consisting of a plurality of planes is processed at a location where the silicon substrate is separated into pieces, and then the surface and side surfaces of the silicon substrate are covered and a surface side protective film filling the cutting groove is formed before silicon The back surface of the substrate is ground until the surface protective film filled in the cutting groove is exposed, and then the silicon substrate is cut into individual pieces with a width narrower than the cutting groove so that the front side protective film remains on the cut surface. The singulated semiconductor device is covered with a protective film on all surfaces and side surfaces. As a result, it is possible to remove factors that reduce reliability, such as chip breakage and moisture penetration from the exposed surface, and improve reliability. be able to.

It is sectional drawing which shows 1st Example of this invention. It is sectional drawing for demonstrating the manufacturing process of the semiconductor device by this invention. FIG. 3 is a cross-sectional view for explaining a manufacturing step of the semiconductor device following that of FIG. 2; FIG. 4 is a cross-sectional view for illustrating the manufacturing process of the semiconductor device following FIG. 3. FIG. 5 is a cross-sectional view for illustrating the manufacturing process of the semiconductor device following FIG. 4. FIG. 6 is a cross-sectional view for illustrating the manufacturing process of the semiconductor device following FIG. 5. FIG. 7 is a cross-sectional view for illustrating the manufacturing process of the semiconductor device following FIG. 6. It is sectional drawing which shows the 2nd Example of this invention. It is sectional drawing which shows the 3rd Example of this invention. It is sectional drawing which shows the 4th Example of this invention. It is a figure of the wafer substrate back surface which shows 5th Example of this invention. It is sectional drawing for demonstrating the manufacturing method of the semiconductor device of a prior art example. FIG. 13 is a cross-sectional view for illustrating the conventional method for manufacturing the semiconductor device following FIG. 12. FIG. 14 is a cross-sectional view for explaining the conventional method for manufacturing the semiconductor device following FIG. 13.

Explanation of symbols

1 silicon substrate 2 connection pad 3 surface side protective film (first layer)
4 Opening 5 Rewiring 6 Post 7 Front side protective film (2nd layer)
8 Scribe line 9 Cutting groove 10 Semiconductor device 20 Dicing blade 21 Dicing tape

Claims (7)

  A silicon substrate with a plurality of electrodes formed on the surface, and a silicon substrate with a surface protective film after a grinding groove is provided by separating the silicon substrate to cover the surface and side surfaces excluding the electrode portion of the silicon substrate with a surface protective film. The grinding groove has a surface protective film formed to cover the cut surface when the silicon substrate is cut into individual pieces, and covers the side surface of the substrate, and the grinding groove is formed by more than one plane. Semiconductor device.   The semiconductor device according to claim 1, wherein the grinding groove has a grinding amount equal to or less than a thickness of a silicon substrate before processing and equal to or more than a desired wafer thickness.   The semiconductor device according to claim 1, wherein the shape of the grinding groove is a curved surface.   The semiconductor device according to claim 1, wherein the grinding groove includes a plurality of grinding grooves.   The bottom portion of the surface protective film is exposed in a back surface processing step for thinning the silicon substrate, so that a cutting point for separating chips from the back surface of the silicon substrate can be easily understood by the silicon substrate and the surface protective film. Item 14. The semiconductor device according to Item 1.   The semiconductor device according to claim 7, wherein the silicon substrate is separated into chips with the back surface of the silicon substrate as the front surface, and the chips are taken from a dicing tape.   Forming a surface-side protective film that fills the cutting grooves in order to cover the surface and side surfaces of the silicon substrate by providing a cutting groove having a silicon substrate thickness or less at a location where the silicon substrate is separated into pieces, and the silicon substrate A step of exposing a side surface protective film in a back surface processing step for thinning, and a step of cutting the silicon substrate into individual pieces with a width narrower than the cutting groove so that the back surface side protective film remains on the cut surface. A method for manufacturing a semiconductor device, comprising:

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