JP2001256068A5 - - Google Patents

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Publication number
JP2001256068A5
JP2001256068A5 JP2000070824A JP2000070824A JP2001256068A5 JP 2001256068 A5 JP2001256068 A5 JP 2001256068A5 JP 2000070824 A JP2000070824 A JP 2000070824A JP 2000070824 A JP2000070824 A JP 2000070824A JP 2001256068 A5 JP2001256068 A5 JP 2001256068A5
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JP
Japan
Prior art keywords
main memory
failure information
error
error detection
code
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JP2000070824A
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English (en)
Japanese (ja)
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JP3839215B2 (ja
JP2001256068A (ja
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Priority to JP2000070824A priority Critical patent/JP3839215B2/ja
Priority claimed from JP2000070824A external-priority patent/JP3839215B2/ja
Priority to US09/805,169 priority patent/US6779148B2/en
Publication of JP2001256068A publication Critical patent/JP2001256068A/ja
Publication of JP2001256068A5 publication Critical patent/JP2001256068A5/ja
Application granted granted Critical
Publication of JP3839215B2 publication Critical patent/JP3839215B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2000070824A 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム Expired - Fee Related JP3839215B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000070824A JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム
US09/805,169 US6779148B2 (en) 2000-03-14 2001-03-14 Error detection and correction method in a computer system and main memory controller of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000070824A JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム

Publications (3)

Publication Number Publication Date
JP2001256068A JP2001256068A (ja) 2001-09-21
JP2001256068A5 true JP2001256068A5 (https=) 2005-03-17
JP3839215B2 JP3839215B2 (ja) 2006-11-01

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ID=18589494

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000070824A Expired - Fee Related JP3839215B2 (ja) 2000-03-14 2000-03-14 誤り検出・訂正方法、計算機システムの主記憶制御装置、及び計算機システム

Country Status (2)

Country Link
US (1) US6779148B2 (https=)
JP (1) JP3839215B2 (https=)

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EP1296207B1 (de) * 2001-09-25 2014-08-27 Siemens Aktiengesellschaft HMI Gerät und Verfahren zur Bedienung einer technischen Einrichtung, Automatisierungssystem mit HMI Gerät und Computerprogrammprodukt mit Programm zur Durchführung des Verfahrens in einem HMI Gerät oder Automatisierungssystem
US7278083B2 (en) * 2003-06-27 2007-10-02 International Business Machines Corporation Method and system for optimized instruction fetch to protect against soft and hard errors
US8176250B2 (en) * 2003-08-29 2012-05-08 Hewlett-Packard Development Company, L.P. System and method for testing a memory
US7346755B2 (en) * 2003-09-16 2008-03-18 Hewlett-Packard Development, L.P. Memory quality assurance
US7171591B2 (en) * 2003-12-23 2007-01-30 International Business Machines Corporation Method and apparatus for encoding special uncorrectable errors in an error correction code
US7404118B1 (en) * 2004-09-02 2008-07-22 Sun Microsystems, Inc. Memory error analysis for determining potentially faulty memory components
WO2006100776A1 (ja) * 2005-03-24 2006-09-28 Fujitsu Limited ファームウェアによるメモリエラーアドレス管理
US9459960B2 (en) 2005-06-03 2016-10-04 Rambus Inc. Controller device for use with electrically erasable programmable memory chip with error detection and retry modes of operation
US7831882B2 (en) 2005-06-03 2010-11-09 Rambus Inc. Memory system with error detection and retry modes of operation
US7562285B2 (en) 2006-01-11 2009-07-14 Rambus Inc. Unidirectional error code transfer for a bidirectional data link
US20070271495A1 (en) * 2006-05-18 2007-11-22 Ian Shaeffer System to detect and identify errors in control information, read data and/or write data
US8352805B2 (en) 2006-05-18 2013-01-08 Rambus Inc. Memory error detection
US7506226B2 (en) * 2006-05-23 2009-03-17 Micron Technology, Inc. System and method for more efficiently using error correction codes to facilitate memory device testing
JP5136643B2 (ja) * 2008-05-29 2013-02-06 富士通株式会社 クロスバスイッチシステム
JP5284069B2 (ja) * 2008-12-11 2013-09-11 株式会社東芝 メモリシステム及びメモリアクセス方法
JP5600963B2 (ja) * 2010-02-22 2014-10-08 富士通株式会社 不揮発性記憶装置、及びデータ初期化方法
JP2012124642A (ja) * 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置、データ転送装置、及びプログラム
JP2012124643A (ja) * 2010-12-07 2012-06-28 Fuji Xerox Co Ltd 受信装置及びデータ転送装置
US8762821B2 (en) * 2012-03-30 2014-06-24 Intel Corporation Method of correcting adjacent errors by using BCH-based error correction coding
US8806295B2 (en) 2012-05-24 2014-08-12 International Business Machines Corporation Mis-correction and no-correction rates for error control
FR2992504A1 (fr) * 2012-06-26 2013-12-27 Commissariat Energie Atomique Dispositif et procede pour la correction d'erreurs dans un mot de code
JP6600146B2 (ja) * 2015-03-27 2019-10-30 ルネサスエレクトロニクス株式会社 データ処理回路及びエラー訂正方法
CN108664533A (zh) * 2017-04-02 2018-10-16 田雪松 编码图样信息的处理方法及装置
CN113113076B (zh) 2017-08-08 2024-07-26 慧荣科技股份有限公司 解码方法及相关的闪存控制器与电子装置
EP3776207B1 (en) 2018-03-26 2023-08-09 Rambus Inc. Command/address channel error detection
CN110532127B (zh) * 2019-08-13 2023-03-03 南京芯驰半导体科技有限公司 一种差错校验位协议转换器
KR102633829B1 (ko) * 2021-12-30 2024-02-02 성균관대학교산학협력단 버스트 에러 정정 코드 생성 방법, 컴퓨터 판독 가능한 기록 매체, 컴퓨터 프로그램 및 장치
US11804859B2 (en) * 2022-01-20 2023-10-31 Hewlett Packard Enterprise Development Lp Analog error detection and correction in analog in-memory crossbars

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US5459742A (en) * 1992-06-11 1995-10-17 Quantum Corporation Solid state disk memory using storage devices with defects
JP2665113B2 (ja) 1992-09-07 1997-10-22 株式会社日立製作所 計算機システムと主メモリ制御装置
US6003144A (en) * 1997-06-30 1999-12-14 Compaq Computer Corporation Error detection and correction

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