JP2001102396A - 半導体チップを実装するための方法と装置 - Google Patents
半導体チップを実装するための方法と装置Info
- Publication number
- JP2001102396A JP2001102396A JP2000270719A JP2000270719A JP2001102396A JP 2001102396 A JP2001102396 A JP 2001102396A JP 2000270719 A JP2000270719 A JP 2000270719A JP 2000270719 A JP2000270719 A JP 2000270719A JP 2001102396 A JP2001102396 A JP 2001102396A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- bond head
- knob
- solder
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP99810816.1 | 1999-09-10 | ||
| EP99810816 | 1999-09-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001102396A true JP2001102396A (ja) | 2001-04-13 |
| JP2001102396A5 JP2001102396A5 (enExample) | 2007-11-08 |
Family
ID=8243019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2000270719A Pending JP2001102396A (ja) | 1999-09-10 | 2000-09-06 | 半導体チップを実装するための方法と装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2001102396A (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111162027A (zh) * | 2019-12-27 | 2020-05-15 | 陈学军 | 一种轨道式运输基板封装作业用电动浮动夹紧装置 |
-
2000
- 2000-09-06 JP JP2000270719A patent/JP2001102396A/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111162027A (zh) * | 2019-12-27 | 2020-05-15 | 陈学军 | 一种轨道式运输基板封装作业用电动浮动夹紧装置 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070904 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20070919 |
|
| A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20080627 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20100212 |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20100223 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20100713 |