JP2001062046A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To minimize a disadvantage to be given to a game player by constituting a game machine to normally exchange commands between a game control means and a bonus ball control means in the machine where data required when a power supply disconnection such as a power interruption or the like occurs is preserved and the game is re-started from a state at the time of the power source disconnection when a power source is restored. SOLUTION: This CPU 56 in a game control main substrate 231 transmits a bonus ball command to a bonus ball control substrate 37, by which the number of bonus balls to be discharged is specified in accordance with the detecting signals of various prize winning detecting means, which are inputted to a switch circuit 58. Besides, CPU 56 introduces the output signal of a power source voltage monitor means to a mask possible interruption terminal and masks an interruption during the transmission of the bonus ball command to the substrate 37 when the power source disconnection is detected. Then the bonus ball command is received by bones ball control CPU, a during-command- reception flag is set while command reception is processed. The command reception processing is controlled to continue, if the during-command-reception flag is set, while a power source is cut off.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a gaming machine such as a pachinko gaming machine, and more particularly to a game machine in which a game medium is shot by a player's operation and the game medium wins a prize area provided in the game area. A predetermined value is given to the player, and a special game is performed by the entry of the game medium into the specific winning section, and the predetermined game value is given to the player based on the result of the special game being in a predetermined mode. The present invention relates to a gaming machine that can be provided.

[0002]

2. Description of the Related Art As a gaming machine, a game medium such as a game ball is launched into a game area by a launching device, and when a game medium wins a winning area such as a winning opening provided in the game area, a predetermined number of prize balls are obtained. Are paid out to players.
Furthermore, a variable display unit capable of changing the display state is provided,
There is a configuration in which a predetermined game value is provided to a player when a display result of the variable display unit has a predetermined specific display mode.

[0003] When the display result of the variable display section for displaying a special symbol is a combination of a predetermined specific display mode, it is usually called a "big hit". In addition, the game value is a right to make the state of the variable prize ball device provided in the game area of the gaming machine advantageous for a player who is easy to win a hit ball, or a right for the player to be in an advantageous state. Or to generate.

[0004] When a big hit occurs, for example, a big winning opening is opened a predetermined number of times, and the state shifts to a big hit game state in which a hit ball is easy to win. Then, in each open period, when a predetermined number (for example, 10) of winning prizes is won, the winning prize opening is closed. The number of opening of the special winning opening is fixed to a predetermined number (for example, 16 rounds). An opening time (for example, 29.5 seconds) is determined for each opening, and if the opening time elapses even if the number of winnings does not reach a predetermined number, the winning opening is closed. If the predetermined condition (for example, winning in the V zone provided in the special winning opening) is not satisfied at the time when the special winning opening is closed, the big hit gaming state ends.

[0005] In addition, among the combinations of display modes other than the "big hit" combination, at a stage where some of the display results of the plurality of variable display portions have not been derived and displayed yet, the display results have already been derived and displayed. The state in which the display mode of the variable display unit that satisfies the display condition that is a combination of the specific display modes is called “reach”. If the display result of the identification information variably displayed on the variable display unit does not satisfy the condition of “reach”, the result is “out” and the variable display state ends. A player plays a game while enjoying how to generate a big hit.

When a game ball wins a winning opening provided on the game board, a predetermined number of award balls are paid out. Since the progress of the game is controlled by the game control means mounted on the main board, the number of winning balls based on the winning is determined by the game control means,
Sent to the prize ball control board.

[0007]

When the power supply to the game machine is stopped, the driving voltage (for example, +5 V) for driving each control means such as the game control means gradually decreases. Each control unit generally includes a microcomputer, but the voltage at which each control unit becomes inoperable is different due to variations in elements and the like. When transmitting a command from the game control means to each control means, from the viewpoint of preventing unauthorized signal input to a game control board on which the game control means is mounted, it is configured not to take a response from each control means. I have. Then, for example, even though the game control means has transmitted the command immediately before the power supply to the gaming machine is stopped, the control means on the side receiving the command may have already become inoperable. In this case, the game control means recognizes that the command has been transmitted, but the control means on the side receiving the command has not received the command. In that case, in general, the driving voltage is lost, the game control means and other control means do not operate, and thereafter, when the power is turned on again, the game is reset, so that there is often no problem. However, although there is no control problem, if an unexpected power failure occurs before the prize ball payout based on the winning is completed,
An unpaid prize ball is generated and disadvantageous to the player.

In order to prevent a disadvantage to the player, the prize ball control means stores the number of prize balls designated by the game control means in a backup RAM, and saves the number when the power is restored after the power is turned off. Even if it is configured to continue the prize ball payout based on the number of the prize balls being set, the prize ball control is performed even though the game control means has issued a predetermined number of prize ball payouts immediately before the power is turned off. It is possible that the means has not received the instruction. In this case, even if the prize ball control means resumes the prize ball payout based on the memory after the power is restored, a smaller number of prize ball payouts than the number of prize balls that should be paid out are performed. That is, a disadvantage is given to the player.

[0009] Therefore, the present invention provides a game system in which, when an unexpected power failure such as a power failure occurs, necessary data is saved, and when the power is restored, the game can be resumed from the power-off state. It is an object of the present invention to provide a gaming machine which always reliably and reliably transfers commands between a control means and a prize ball control means and which does not disadvantage a player.

[0010]

A gaming machine according to the present invention comprises:
A gaming machine in which a game area is provided on a gaming board, and a predetermined number of game balls are paid out as prize balls from a payout device in accordance with a prize of a game ball to a prize area provided in the game area, A game control means for controlling the progress of the game, a prize detecting means capable of detecting that a prize has been won in each prize area, a ball payout apparatus for paying out game balls by driving an electric drive source, and a ball payout apparatus. Prize ball control means for driving and paying out prize balls, and power supply voltage monitoring means for monitoring a voltage drop of a power supply supplied to the gaming machine, wherein the game control means includes a microcomputer for game control, The means includes a microcomputer for controlling the prize ball, the prize ball control means includes a non-volatile storage means whose storage content changes according to the progress of the control, and at least a part of the volatile storage means is provided by a backup power supply. Te is capable backup even at power-off of the game machine, a microcomputer for game control,
A prize ball command capable of specifying the number of prize balls to be paid out in accordance with the detection signal of the prize detection unit is transmitted to the prize ball control unit, and the output signal of the power supply voltage monitoring unit is introduced to the maskable interrupt terminal to supply the power supply voltage. A predetermined game control power-off process is performed by interruption processing based on the detection of the predetermined amount of voltage drop by the monitoring means, and the output signal of the power supply voltage monitoring means is output to the prize ball control means during transmission of the prize ball command. Mask the interruption by
The prize ball control microcomputer receives the prize ball command from the game control means, sets a command receiving flag during the command reception processing, and based on the power supply voltage monitoring means detecting a predetermined amount of voltage drop. A predetermined prize ball control power-off process is performed, and in the power-off process, if the command receiving flag is set, the command receiving process is continued.

In the gaming machine, a detection signal indicating that a payout has been made from the ball payout device is input to the game control means and the prize ball control means. You may be comprised so that counting confirmation of the number of ball dispensed may be performed.

The award ball control means may include a number of award ball storage means for recognizing the number of award balls, and the award ball number storage means may be configured to store the total number of award balls.

[0013] The award ball number storage means may be configured to store the total number of award balls in the backed-up volatile storage means.

At least a part of the volatile storage means included in the game control means can be backed up by the backup power supply even when the power of the game machine is turned off, and is used for restoring the game state when the power supply of the game machine is restored. It may be configured such that necessary game state storage can be held.

The power supply voltage monitoring means outputs a signal to an interrupt terminal of the game control microcomputer and the prize ball control microcomputer when detecting a predetermined amount of voltage drop, and The ball controlling microcomputer may be configured to execute a power-off process in an interrupt process based on a signal input to the interrupt terminal.

A signal from the power supply monitoring means is also input to an input port provided in the game control means and the prize ball control means. Alternatively, it may be configured to monitor whether or not the power supply voltage has recovered by monitoring the input state of the input port, and to return to the original gaming state when the power supply voltage recovers.

The input port in the game control means is, for example, a port in an input section provided in the game machine for inputting a detection switch whose detection is used for controlling the game machine.

A power supply board for generating each voltage used in the gaming machine control board for controlling the gaming machine provided for the game is provided separately from the gaming machine control board. And a backup power supply for backing up the power of the volatile storage means in the device control board.

At least the game control microcomputer sets a flag indicating that the power-off processing has been performed, performs a data recovery processing if the flag is set at the time of recovery, and initializes the data if the flag is not set. It may be configured to perform a setting process.

The data recovery process is configured to include at least a process of resetting a flag indicating that the process at the time of power-off has been performed and a process of reading out a game state storage for restoring the game state. You may.

[0021]

An embodiment of the present invention will be described below with reference to the drawings. First, the overall configuration of a pachinko gaming machine, which is an example of a gaming machine, will be described. 1 is a front view of the pachinko gaming machine 1 as viewed from the front, FIG. 2 is an overall rear view showing the internal structure of the pachinko gaming machine 1, and FIG. 3 is a rear view of the pachinko gaming machine 1 as viewed from the back. Here, a pachinko gaming machine is shown as an example of a gaming machine, but the present invention is not limited to a pachinko gaming machine, and may be, for example, a coin gaming machine. Further, the present invention can be applied to an image-type gaming machine or a slot machine.

As shown in FIG. 1, the pachinko gaming machine 1
It has a glass door frame 2 formed in a frame shape. On the lower surface of the glass door frame 2, there is a hit ball supply tray 3. Below the hitting ball supply tray 3, a surplus ball receiving tray 4 for storing prize balls overflowing from the hitting ball supply tray 3 and a hitting operation handle (operation knob) 5 for firing a hitting ball are provided. Behind the glass door frame 2,
The game board 6 is detachably attached. A game area 7 is provided on the front of the game board 6.

In the vicinity of the center of the game area 7, a variable display section 9 for variably displaying a plurality of types of symbols and a 7-segment L
A variable display device 8 including a variable display 10 using an ED is provided. In this embodiment, the variable display section 9 has three symbol display areas of “left”, “middle”, and “right”. On the side of the variable display device 8, a passing gate 11 for guiding a hit ball is provided. The hit ball that has passed through the passing gate 11 is guided to the starting winning opening 14 via the ball exit 13. In a passage between the passage gate 11 and the ball outlet 13, there is a gate switch 12 for detecting a hit ball that has passed through the passage gate 11. In addition, the winning ball that entered the starting winning port 14 is
It is guided to the back of the game board 6 and is detected by the starting port switch 17. In addition, a variable winning ball device 15 that performs opening and closing operations is provided below the starting winning port 14. The variable winning ball device 15 is opened by the solenoid 16.

Below the variable winning ball device 15, there is provided an opening / closing plate 20 which is opened by a solenoid 21 in a specific game state (big hit state). In this embodiment, the opening and closing plate 20 serves as a means for opening and closing the special winning opening. The winning ball that enters one (V zone) of the winning balls guided from the opening / closing plate 20 to the back of the game board 6 is detected by the V count switch 22. The winning ball from the opening / closing plate 20 is detected by the count switch 23. Variable display device 8
A start winning prize storage display 18 having four display sections for displaying the number of winning balls entering the starting winning prize port 14 is provided below. In this example, the start winning prize storage display 18 increases the number of lit display units by one each time there is a starting prize, with the upper limit being four. Then, each time the variable display of the variable display unit 9 is started, the number of the lit display units is reduced by one.

The gaming board 6 is provided with a plurality of winning ports 19 and 24, and the winning of the game balls to the winning ports 19 and 24 is detected by the winning port switches 19a and 24a. At the left and right sides of the game area 7, there are provided decorative lamps 25 which are displayed blinking during the game, and at the lower part there is an out port 26 for absorbing hit balls which have not won. In addition, two speakers 27 that emit sound effects are provided at upper left and right sides outside the game area 7. A gaming effect LED 2 is provided on the outer periphery of the gaming area 7.
8a and gaming effect lamps 28b and 28c are provided.

In this example, one of the speakers 27
Is provided with a prize ball lamp 51 which is lit when a prize ball is paid out, and a ball out lamp 52 which is lit when a supply ball is out is provided near the other speaker 27. Further, FIG. 1 also shows a card unit 50 that is installed adjacent to the pachinko gaming table 1 and enables lending of balls by inserting a prepaid card.

The card unit 50 has a usable indicator lamp 151 for indicating whether or not the card is usable. If there is a fraction (a number less than 100 yen) in the balance information recorded in the card, the fraction is displayed. Fraction display switch 1 for displaying on a frequency display LED provided near hit ball supply tray 3
52, a connecting stand direction indicator 15 indicating which side of the pachinko gaming machine 1 the card unit 50 corresponds to
3. Card insertion indicator 154 indicating that a card has been inserted into card unit 50, card insertion slot 155 into which a card as a recording medium is inserted, and a card reader provided on the back of card insertion slot 155 A card unit lock 156 is provided to release the card unit 50 when checking the mechanism of the writer.

The hitting ball fired from the hitting ball launching device enters the game area 7 through the hitting ball rail, and thereafter, enters the game area 7
Come down. When a hit ball is detected by the gate switch 12 through the passage gate 11, the display number of the variable display 10 is changed continuously. Further, when a hit ball enters the starting winning opening 14 and is detected by the starting opening switch 17, the symbol in the variable display section 9 starts rotating if the symbol can be changed. If it is not possible to start changing the symbol, the start winning memory is increased by one.

The rotation of the image in the variable display section 9 stops when a certain time has elapsed. If the combination of images at the time of stop is a combination of big hit symbols, the game shifts to a big hit game state. That is, the opening / closing plate 20 is opened until a predetermined time elapses or until a predetermined number (for example, 10) of hit balls is won. Then, when a hit ball wins in the specific winning area while the opening and closing plate 20 is opened and is detected by the V count switch 22, a continuation right is generated and the opening and closing plate 20 is opened again. Generation of the continuation right is permitted a predetermined number of times (for example, 15 rounds).

If the combination of images in the variable display section 9 at the time of stoppage is a combination of big hit symbols with probability fluctuation, the probability of the next big hit increases. That is, a high probability state, which is more advantageous for the player, is obtained. Also, when the stop symbol on the variable display 10 is a predetermined symbol (hit symbol), the variable winning ball device 15 is opened for a predetermined time. Further, in the high probability state, the probability that the stop symbol on the variable display 10 hits the symbol is increased, and the opening time and the number of times the variable winning ball device 15 is opened are increased.

Next, the structure of the back surface of the pachinko gaming machine 1 will be described with reference to FIG. On the back of the variable display device 8, as shown in FIG. 2, a prize ball tank 38 is provided above the mechanism plate 36, and when the pachinko gaming machine 1 is installed on the gaming machine installation island, a prize ball is provided from above. Premium ball tank 3
8 is supplied. The prize ball in the prize ball tank 38 reaches the ball payout device through the guide gutter 39.

On the mechanism plate 36, a variable display control unit 29 for controlling the variable display section 9 via the relay board 30, and a game control board (main board) covered with a board case 32 and mounted with a game control microcomputer and the like. ) 31, a relay board 33 for relaying a signal between the variable display control unit 29 and the game control board 31, and a prize ball control board on which a prize ball control microcomputer for controlling the payout of prize balls is mounted. 37 are installed. Further, a ball is hit on the lower part of the mechanism plate 36 by using the rotating force of the motor in the game area 7.
Ball launching device 34 that launches on a game effect lamp / LE
D28a, 28b, 28c, a prize ball lamp 51 and a lamp control board 35 for sending signals to the ball out lamp 52 are provided.

FIG. 3 is a rear view of the gaming board of the pachinko gaming machine 1 as viewed from the rear. The ball that passed through the induction gutter 39
As shown in FIG. 3, the ball cut detectors 187a, 187
b, and reaches the ball dispensing device 97 via the ball supply gutters 186a and 186b. The prize ball paid out from the ball payout device 97 is supplied to the hit ball supply tray 3 provided on the front surface of the pachinko gaming machine 1 through the communication port 45. On the side of the communication port 45, an excess ball passage 46 communicating with the excess ball tray 4 provided on the front of the pachinko gaming machine 1 is formed. A large number of prize balls based on the prize are paid out, and the ball supply tray 3 becomes full. Finally, after the prize balls reach the communication port 45, further prize balls are paid out. It is led to the ball tray 4. When the prize ball is further paid out, the sensing lever 47 is set to the full switch 4.
By pressing 8, the full tank switch 48 is turned on. In this state, the rotation of the stepping motor in the ball discharging device 97 stops, the operation of the ball discharging device 97 stops, and the driving of the hitting ball firing device 34 also stops as necessary. In addition,
In this embodiment, a ball payout device 97 in which game balls are paid out by rotation of a stepping motor is illustrated as a ball payout device that pays out game balls by driving an electric drive source. A ball payout device having a structure of sending out a ball may be used, or a ball payout device having a structure in which a stopper is removed by driving an electric drive source and payout is performed by the weight of the game ball may be used.

Signals from the winning opening switches 19a and 24a, the starting opening switch 17 and the V count switch 22 are sent to the main board 31 in order to control the winning ball payout.
When the starting port switch 17 is turned on, the CPU 56 of the main board 31 knows that a winning corresponding to the payout of six winning balls has occurred. Further, when the count switch 23 is turned on, it is known that a winning corresponding to the payout of 15 prize balls has occurred. Then, when the winning opening switch is turned on, it is known that a winning corresponding to the payout of 10 prize balls has occurred. In this embodiment, for example, a game ball that has won the winning opening 24 is detected by the winning opening switch 24 a provided in the winning ball flow path from the winning opening 24, and the game ball that has won the winning opening 19 is detected. Is
It is detected by a winning opening switch 19a provided in a winning ball flow path from the winning opening 19.

FIG. 4 is a block diagram showing an example of a circuit configuration of the main board 31. FIG. 4 also shows the prize ball control board 37, the lamp control board 35, the sound control board 70, the emission control board 91, and the display control board 80. On the main board 31, a basic circuit 53 for controlling the pachinko gaming machine 1 according to a program, a gate switch 12,
A switch circuit 58 that supplies signals from the starting port switch 17, the V count switch 22, the count switch 23, and the winning port switches 19a and 24a to the basic circuit 53;
A solenoid circuit 59 that drives a solenoid 16 that opens and closes the variable winning ball device 15 and a solenoid 21 that opens and closes the opening and closing plate 20 according to a command from the basic circuit 53, and turns on and off the start storage indicator 18 and a 7-segment LED. , And a lamp / LED circuit 60 for driving the decorative lamp 25.

According to the data supplied from the basic circuit 53, jackpot information indicating the occurrence of a jackpot, effective start information indicating the number of start winning balls used to start image display on the variable display section 9, and probability fluctuation have occurred. And an information output circuit 64 that outputs probability change information or the like indicating the fact to a host computer such as a hall management computer.

The basic circuit 53 includes a ROM 54 for storing a game control program and the like, a RAM 55 used as a work memory, a CPU 56 for performing a control operation according to the control program, and an I / O port unit 57. In this embodiment, the ROM 54 and the RAM 55 are
6 is built in. That is, the CPU 56 is a one-chip microcomputer. The one-chip microcomputer only needs to include at least the RAM 55, and the ROM 54 and the I / O port unit 57 may be externally provided.

Further, the main board 31 has an initial reset circuit 65 for resetting the basic circuit 53 when the power is turned on.
And an address decode circuit 67 that decodes an address signal provided from the basic circuit 53 and outputs a signal for selecting one of the I / O ports in the I / O port unit 57. Although there is switch information input from the ball dispensing device 97 to the main board 31, FIG.
Then they are omitted.

A hit ball launching device that hits and launches a game ball is driven by a drive motor 94 controlled by a circuit on a launch control board 91. Then, the driving force of the driving motor 94 is adjusted according to the operation amount of the operation knob 5. That is, the circuit on the firing control board 91 is controlled so that the hit ball is fired at a speed corresponding to the operation amount of the operation knob 5.

FIG. 5 is a block diagram showing components related to the prize ball, such as the components of the prize ball control board 37 and the ball payout device 97. As shown in FIG. 5, the detection signal from the full tank switch 48 is transmitted to the main board 3 via the relay board 71.
1 is input to the I / O port 57. Full tank switch 4
Reference numeral 8 denotes a switch that detects whether the surplus ball tray 4 is full.

The detection signals from the cut-out detection switch 167 and the cut-out switch 187 (187a, 187b) are transmitted to the main board 3 via the relay board 72 and the relay board 71.
1 is input to the I / O port 57. The out-of-ball detection switch 167 is a switch for detecting a shortage of replenishment balls in the prize ball tank 38, and the out-of-ball switch 187 is a switch for detecting the presence or absence of a prize ball in the prize ball passage.

The CPU 56 of the main board 31 indicates that the detection signal from the out-of-ball detection switch 167 or the out-of-ball switch 187 indicates the out-of-ball state, or the detection signal from the full switch 48 indicates the full state. If it is, a prize ball control command for instructing ball lending is sent. When receiving the award ball control command instructing the ball lending prohibition, the award ball control CPU 371 of the award ball control board 37 stops the ball lending process.

Further, the detection signal from the prize ball count switch 301A is also input to the I / O port 57 of the main board 31 via the relay board 72 and the relay board 71. A drive signal from the I / O port 57 of the main board 31 to the winning ball discharging solenoid 127 is supplied to the winning ball discharging solenoid 127 via the relay board 71. The prize ball count switch 301A is provided in the prize ball mechanism portion of the ball payout device 97, and detects an actually paid prize ball.

When there is a prize, the output ports (ports G, H) 577, 578 of the main board 31 are provided on the prize ball control board 37.
, A prize ball control command indicating the number of prize balls is input. The output port 577 outputs 8-bit data, and the output port 578 outputs a 1-bit strobe signal (INT signal). The award ball control command indicating the number of award balls is input to the I / O port 372a via the input buffer circuit 373. The CPU 371 for controlling the prize ball includes an I / O port 37.
A prize ball control command is input via 2a, and the ball payout device 97 is driven according to the prize ball control command to perform a prize ball payout. In this embodiment, the CPU 37 for controlling the prize ball
Reference numeral 1 denotes a one-chip microcomputer having at least a RAM.

Each buffer in the input buffer circuit 373 can pass a signal only in the direction from the main board 31 to the prize ball control board 37. Therefore, there is no room for a signal to be transmitted from the award ball control board 37 side to the main board 31 side. Even if the circuit in the prize ball control board 37 is tampered with, the signal output by the tampering is not transmitted to the main board 31 side. Note that a noise filter may be provided on the input side of the input buffer circuit 373.

On the main board 31, a buffer circuit 68 is provided outside the output ports 577 and 578 for outputting award ball control commands. According to such a configuration, since a signal input from the outside to the inside of the main board 31 is blocked, a signal line to which a signal may be given from the prize ball control board 37 to the main board 31 is more reliably formed. Can be eliminated.

The prize ball controlling CPU 371 outputs a lending number signal indicating the lending number to the terminal board 160 and a buzzer driving signal to the buzzer board 75 via the output port 372g. A buzzer is mounted on the buzzer board 75. Further, an error signal is output to the error display LED 374 via the output port 372e.

Further, the input port 3 of the prize ball control board 37
The detection signal of the prize ball count switch 301A and the detection signal of the ball lending count switch 301B are input to 72b via the relay board 72. The ball lending count switch 301B detects a game ball actually lent. The drive signal from the prize ball control board 37 to the payout motor 289 is output from the payout motor 2 in the prize ball mechanism portion of the ball payout device 97 via the output port 372c and the relay board 72.
It is told to 89.

The card unit 50 has a microcomputer for controlling the card unit. Also,
The card unit 50 is provided with a fraction display switch 152, a connection board direction indicator 153, a card insertion indicator lamp 154, and a card insertion slot 155 (see FIG. 1). The balance display board 74 is connected to a frequency display LED, a ball lending switch, and a return switch provided near the hit ball supply tray 3.

From the balance display board 74 to the card unit 50
In response to the player's operation, a ball lending switch signal and a return switch signal are provided via the prize ball control board 37. In addition, the balance display board 74 is provided from the card unit 50.
, A card balance display signal indicating the balance of the prepaid card and a ball lending possible display signal are given via the prize ball control board 37. Between the card unit 50 and the prize ball control board 37, a unit operation signal (BRDY signal), a ball lending request signal (BRQ signal), a ball lending completion signal (EXS signal)
A pachinko machine operation signal (PRDY signal) is exchanged via the I / O port 372f.

When the power of the pachinko gaming machine 1 is turned on,
The prize ball control CPU 371 of the prize ball control board 37 outputs a PRDY signal to the card unit 50. When the card is accepted in the card unit 50 and the ball lending switch is operated to input a ball lending switch signal, the microcomputer for controlling the card unit outputs a BRDY signal to the prize ball control board 37. When a predetermined delay time elapses from this point, the microcomputer for controlling the card unit outputs a BRQ signal to the prize ball control board 37. The CPU 37 for controlling the prize ball on the prize ball control board 37
1 drives the payout motor 289 and pays out a predetermined number of lending balls to the player. Then, when the payout is completed, the prize ball controlling CPU 371 outputs an EXS signal to the card unit 50.

As described above, all signals from the card unit 50 are input to the prize ball control board 37. Therefore, regarding the ball lending control, the card unit 5
No signal is input from 0 to the main board 31, and there is no room for a signal to be incorrectly input from the card unit 50 side to the basic circuit 53 of the main board 31. The main board 31 and the prize ball control board 37 are provided with a solenoid and a driver circuit for driving a motor or a lamp, but those circuits are omitted in FIG.

In this embodiment, at least the main substrate 3
A part of the RAM included in the CPU 56 and the CPU 371 for controlling the prize ball is backed up by a backup power supply. In other words, even if the power supply to the gaming machine is stopped, the backup RAM can retain the stored contents by the backup power supply. And each CPU:
When a drop in the power supply voltage is detected, a predetermined process is performed, and then a power-off wait state is set.

FIG. 6 is a block diagram showing an example of a configuration around the CPU 56 for power supply monitoring and power supply backup. As shown in FIG. 6, the power supply monitoring IC 902
The occurrence of power interruption is detected by introducing a 30V voltage and monitoring the + 30V voltage. Specifically, when the voltage of +30 V becomes equal to or lower than a predetermined value (for example, 80% of +30 V), it is determined that the power is cut off and an interrupt signal is given to the CPU 56. In the CPU 56, this interrupt is input to a maskable interrupt terminal (external interrupt terminal: INT terminal). The signal input to the INT terminal is also input to the input port 570. Therefore, the CPU 56
In the interrupt processing (INT processing) based on the signal input to the INT terminal, the power-off state can be confirmed by confirming the level of the input port.

The input port is input to a vacant bit of the input port for inputting output signals of various switches provided in the gaming machine. Further, when another interrupt factor is also input to the external interrupt terminal, the signal input to the input port recognizes that the interrupt has occurred when the power is turned off.

Depending on the type of CPU used, different names (for example, IRQ1 and IRQ
2), the signal terminal interrupted by an external signal corresponds to the INT terminal here regardless of the name.

The predetermined value for the power supply monitoring IC 902 to detect the power cut-off is lower than the normal voltage.
Is a voltage that can operate for a while. Further, since the power supply monitoring IC 902 is configured to monitor a voltage higher than the voltage required by the CPU 56 (+5 V in this example) and immediately after conversion from AC to DC, the CPU 56 is required. It is possible to extend the monitoring range with respect to the voltage. Therefore, more precise monitoring can be performed. Further, when +30 V is used as the monitoring voltage, the voltage supplied to various switches of the gaming machine is +1.
Since it is 2 V, prevention of erroneous switch-on detection at the moment of a power interruption can be expected. That is, by monitoring the voltage of the +30 V power supply, it is possible to detect a decrease in the voltage of +12 V generated after the generation of +30 V before the voltage starts to drop. Therefore, when the voltage of the + 12V power supply decreases, the switch output comes to the on state. However, if the + 30V power supply voltage that drops faster than + 12V is monitored and the power cutoff is recognized, the power supply is turned on before the switch output turns on. It is possible to enter a state of waiting for restoration and to enter a state where the switch output is not detected.

While power is not being supplied from the + 5V power supply, at least a part of the RAM is backed up by a backup power supply supplied from a power supply board, and its contents are preserved even when the power supply to the gaming machine is cut off. And +
When the 5V power is restored, a reset signal is issued from the initial reset circuit 65, and the CPU 56 returns to the normal operation state. At that time, since the necessary data is backed up, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

FIG. 7 is a block diagram showing an example of the configuration of the power supply board 910. The power supply board 910 includes the main board 31, the display control board 80, the audio control board 70, and the lamp control board 3.
5 and installed independently of the control board such as the prize ball control board 37, and generates a voltage used by each control board and mechanical components in the gaming machine. In this example, AC24V, DC + 30
V, + 21V DC, + 12V DC and + 5V DC. Also, a capacitor 91 serving as a backup power supply
6 is charged from DC + 5V, that is, a power supply line for driving ICs and the like on each substrate.

The transformer 911 converts an AC voltage from an AC power supply to 24V. AC 24V voltage is applied to connector 9
15 is output. Further, the rectifier circuit 912 includes an AC24
A DC voltage of +30 V is generated from V and output to the DC-DC converter 913 and the connector 915. DC-D
The C converter 913 has + 21V, + 12V and + 5V.
V is generated and output to the connector 915. Connector 91
Reference numeral 5 is connected to, for example, a relay board, from which power of a voltage required for each control board and mechanical components is supplied.

+5 V from DC-DC converter 913
The line branches to form a backup + 5V line. A large-capacity capacitor 916 is connected between the backup + 5V line and the ground level. The capacitor 916 serves as a backup power supply for the backup RAM of each control board when the power supply to the gaming machine is cut off. Also, a diode 91 for preventing backflow is provided between the + 5V line and the backup + 5V line.
7 is inserted.

As a backup power supply, a battery that can be charged from a +5 V power supply may be used. In the case of using a battery, a rechargeable battery is used which runs out of capacity when power is not supplied from a + 5V power supply for a predetermined time.

Next, the operation of the gaming machine will be described. FIG.
Is a flowchart showing a game control process of the CPU 56 on the main board 31. FIG. 8A shows a main process executed by the CPU 56, and FIG. 8B shows an interrupt process. When the power-on reset is released, the CPU 56
First, in order to make the clock monitor control operable, the built-in clock monitor register is set to the clock monitor enable state (step S1). The clock monitor control is a control for automatically generating a reset inside the CPU 56 when detecting a drop or stop of an input clock signal. Next, the CPU 56
Performs an initialization process (step S2). In the initialization process, a timer setting process is performed so that the timer is interrupted after a predetermined period (for example, after 2 ms). Thereafter, the process of updating the display random number such as the random number for determining the type of the stop symbol is repeatedly executed (step S17).

The processing shown in FIG.
Triggered by an internal timer interrupt. In the interrupt processing, the CPU 56 firstly sets a predetermined period (for example, 2 ms).
After that, a timer setting process is performed so that the timer is again interrupted (step S20).

Next, after performing processing for setting a display control command sent to the display control board 80 to a predetermined area of the RAM 55 (display control data setting processing: step S
4) A process for outputting a display control command is performed (display control data output process: step S5).

Next, processing for outputting the contents of the storage area for various output data to each output port is performed (data output processing: step S6). Further, an output data setting process for setting output data such as jackpot information, start information, and probability variation information output to the hall management computer in the storage area is performed (step S8). Further, various abnormality diagnosis processes are performed by a self-diagnosis function provided inside the pachinko gaming machine 1, and an alarm is issued if necessary according to the result (error process: step S9).

Next, a process for updating each counter indicating a random number for determination such as a random number for big hit determination used in game control is performed (step S10).

Next, the CPU 56 performs a special symbol process (step S11). In the special symbol process control, a corresponding process is selected and executed according to a special symbol process flag for controlling the pachinko gaming machine 1 in a predetermined order according to a gaming state. Then, the value of the special symbol process flag is updated during each processing according to the gaming state. Further, a normal symbol process is performed (step S12). In normal symbol processing, 7 segments L
A corresponding process is selected and executed according to a normal symbol process flag for controlling the variable display 10 by the ED in a predetermined order. Then, the value of the normal symbol process flag is updated during each process according to the gaming state.

Further, the CPU 56 includes a switch circuit 58
, The state of the gate sensor 12, the starting port sensor 17, and the count sensor 23 are input, and it is determined whether or not there is a prize for each prize port or prize device (switch processing: step S13). The CPU 56 further performs a process of updating a display random number such as a random number for determining the type of stop symbol (step S15).

The CPU 56 performs signal processing with the award ball control board 37 (step S16). That is,
When a predetermined condition is satisfied, a prize ball control command is output to the prize ball control board 37. The prize ball control CPU mounted on the prize ball control board 37 drives the ball payout device 97 according to the prize ball control command.

FIG. 9 is a flowchart showing the switch processing in step S22. In the switch processing, C
The PU 56 first detects whether or not the gate switch 12 has been turned on (Step S120). Next, it is detected whether the starting port switch 17 is turned on (step S1).
40). Further, it is detected whether or not the count switch 23 has been turned on (step S160). Further, it is detected whether or not the V count switch 22 has been turned on (step S).
180). Then, it is detected whether or not the winning opening switches 19a, 24a are turned on (steps S200, S22).
0).

Hereinafter, the processing related to the prize ball payout control in the switch processing will be described in detail. FIG. 10 is a flowchart showing a startup port switch check process (step S120) for detecting whether or not the startup port switch 17 is turned on. In the starting port switch check process,
The CPU 56 checks whether or not the starting port switch 17 indicates the ON state (step S141). If it indicates the ON state, it is checked whether or not the starting port switch on counter has reached the maximum value (step S142). If it has reached the maximum value, the starting port switch error flag is set (step S149).

The starting port switch on counter is a counter for counting the number of times that the ON state of the starting port switch 17 is detected. The maximum value is a value for determining that a disconnection error (the ON state continues for a long time) or the like when the counter value advances to that value. That is,
When the count value advances to the maximum value, it means that the ON state has been continued for a period corresponding to the maximum value, and it is determined that an abnormality has occurred in the starting port switch 17. The starting port switch error flag is referred to in the error processing of the main processing (step S9).

If the starting port switch-on counter has not reached the maximum value, the CPU 56 increments the starting port switch-on counter by 1 (step S144). And
The value of the starting port switch-on counter is checked (step S145), and if the value is 2, it is determined that a game ball has won the starting winning port 14.

If it is determined that a game ball has won the start winning port 14, the CPU 56 increments the value of the six counters by +1.
(Step S145). The values of the six counters are referred to in the winning ball signal processing (step S16) of the main processing. In the winning ball signal processing, when the value of the starting mouth winning ball memory counter is not 0, a command indicating the number of six winning balls is transmitted to the winning ball control board 37 and the value of the six counter is decremented by one. .

Further, the CPU 56 checks whether or not the start winning prize memory has reached the maximum value (4 in this example) (step S146), and if it has not reached the maximum value, extracts and extracts the jackpot determination random number. Save the value (step S14)
7). The stored random numbers for jackpot determination are used in the special symbol processing. In addition, the number of start winning prizes is incremented by one (step S148).

If it is determined in step S141 that the starting port switch 17 is not on, the CPU 56
Clears the starting port switch ON counter (step S150) and clears the starting port switch error flag (step S151). Note that the process shown in FIG. 10 is started once every 2 ms, so that if the switch-on state continues for 4 ms, it is determined that the switch has been turned on.

FIG. 11 is a flowchart showing a count switch check process (step S160) for detecting whether or not the count switch 23 is turned on. In the count switch check processing, the CPU 56 checks whether or not the count switch 23 indicates an ON state (step S161). If the ON state is indicated, it is checked whether or not the count switch ON counter has reached the maximum value (step S162), and if it has reached the maximum value, a count switch error flag is set (step S167).

If the count switch ON counter has not reached the maximum value, the CPU 56 increments the count switch ON counter by one (step S163). Then, the value of the count switch on counter is checked (step S164), and if the value is 2, it is determined that the gaming ball has won the special winning opening.

If the CPU 56 determines that the game ball has won the special winning opening, the CPU 56 increments the special winning opening winning number counter by +
At the same time as 1 (step S165), the value of the 15 counter is incremented by 1 (step S166). The value of the special winning opening winning number counter is referred to in the special symbol process processing. In the special symbol process processing, for example, when the value of the special winning opening winning number counter reaches 10, it is determined that one round of the big hit game has been completed. The value of the fifteen counters is referred to in the winning ball signal processing (step S16) of the main processing. In the winning ball signal processing, if the value of the 15 counters is not 0, a command indicating the number of 15 winning balls is transmitted to the winning ball control board 37 and the value of the 15 counters is decremented by one.

If it is determined in step S161 that the count switch 23 is not on, the CPU 5
No. 6 clears the count switch ON counter (step S168) and clears the count switch error flag (step S169).

FIG. 12 is a flowchart showing a winning port switch 19a check process (step S200) for detecting whether or not the winning port switch 19a is turned on. In the winning opening switch 19a check process, the CPU 56
Checks whether the winning opening switch 19a indicates the ON state (step S201). If the ON state is indicated, it is checked whether or not the winning opening switch 19a ON counter has reached the maximum value (step S202), and if it has reached the maximum value, the winning opening switch 19a error flag is set (step S206). ).

If the winning opening switch 19a on-counter has not reached the maximum value, the CPU 56 increments the winning opening switch 19a on-counter by one (step S20).
3). Then, the value of the on-counter of the winning opening switch 19a is checked (step S204). If the value is 2, it is determined that the gaming ball has won the winning opening 19 detected by the winning opening switch 19a.

If it is determined that a game ball has won the winning opening 19, the CPU 56 increments the value of the ten counters by one (step S205). The values of the ten counters are referred to in the winning ball signal processing (step S16) of the main processing. In the winning ball signal processing, if the value of the ten counters is not 0, a command indicating the number of ten winning balls is transmitted to the winning ball control board 37, and the value of the ten counters is subtracted from-.
Do one.

If it is confirmed in step S201 that the winning opening switch 19a is not on, the CPU 5
6 clears the winning opening switch 19a on-counter (step S207) and sets the winning opening switch 19a.
The error flag is cleared (Step S208).

FIG. 13 is a flowchart showing a winning opening switch 24a check process (step S220) for detecting whether or not the winning opening switch 24a is turned on. In the check process of the winning opening switch 24a, the CPU 56
Confirms whether or not the winning opening switch 24a indicates the ON state (step S221). If the ON state is indicated, it is confirmed whether or not the winning opening switch 24a ON counter has reached the maximum value (step S222), and if it has reached the maximum value, the winning opening switch 24a error flag is set (step S226). ).

If the winning opening switch 24a on-counter has not reached the maximum value, the CPU 56 increments the winning opening switch 24a on-counter by one (step S22).
3). Then, the value of the on-counter of the winning opening switch 24a is checked (step S224). If the value is 2, it is determined that the game ball has won the winning opening 24 detected by the winning opening switch 24a. The value of the ten counters is incremented by one (step S225).

If it is determined in step S221 that the winning opening switch 24a is not on, the CPU 5
6 clears the on-counter of the winning opening switch 24a (step S227) and sets the winning opening switch 24a.
The error flag is cleared (step S228).

FIG. 14 is a flowchart showing a prize ball command output process in the data output process (step S6) of the main process. In the prize ball command output processing, the CPU 56 first sets an interrupt mask (step S360). By setting the interrupt mask, even if a maskable interrupt occurs, its reception is waited for. In this embodiment, the power-off process is executed as a maskable interrupt process. Therefore, even if a signal indicating a decrease in the power supply voltage is input during the award ball command output processing, the power-off processing is not immediately started. The power-off processing is waited until the interrupt mask is released. Since the interrupt mask is released when the prize ball command output process ends, after all,
Even if a signal indicating a drop in the power supply voltage is input during the award ball command output processing, the award ball control command transmission processing is completed.

Next, the CPU 56 checks whether or not the value of the 15 counters is 0 (step S361). 0
Otherwise, the payout number instruction (1
(Five commands) are output to the output port 577 (step S362). Then, the INT signal is turned on (step S363). Next, after a delay time of 5 μs (step S364), the INT signal is turned off (step S365). Then, the value of the 15 counters is decremented by one (step S366). Further, the payout command number accumulation value is incremented by +15 (step S367). The payout command number cumulative value indicates the cumulative value of the payout number instructed to the prize ball control board 37, and the CPU 56 checks whether or not the prize ball is completed using the payout command number cumulative value.

If the value of the 15 counter is 0, the CPU
56 checks whether the value of the ten counters is 0 (step S371). If it is not 0, a payout number instruction (10) command, which is a winning ball control command, is output to the output port 577 (step S372). And IN
The T signal is turned on (step S373). Next, after a delay time of 5 μs (step S37)
4), the INT signal is turned off (step S37)
5). Then, the value of the ten counters is decremented by one (step S376). Further, the payout command number accumulation value is incremented by +10 (step S377).

If the value of the ten counters is 0, the CPU
56 checks whether the value of the six counters is 0 (step S381). If it is not 0, the payout number instruction (six) command which is a prize ball control command is output to the output port
77 (step S382). And INT
The signal is turned on (step S383). Then
After a delay time of 5 μs (step S38)
4), the INT signal is turned off (step S38)
5). Then, the value of the six counters is decremented by one (step S386). Further, the payout command number accumulation value is increased by 6 (step S387).

Here, the fifteen winning ball payout instructions have priority over the ten and six winning ball payout instructions, and the ten winning ball payout instructions have priority over six winning ball payout instructions. Alternatively, a command indicating the number of corresponding prize balls may be transmitted to the prize ball control means in the order in which the prize is generated.

FIG. 15 shows the main board 31 to the prize ball control board 3.
7 is an explanatory diagram showing an example of a bit configuration of a prize ball control command transmitted to No. 7; FIG. As shown in FIG. 15, the upper 4 bits in 1 byte are used as a control designation unit, and the lower 4 bits are used as an area indicating the number of award balls.

As shown in FIG. 16, if the bits 7, 6, 5, and 4 are "0, 1, 0, 0" in the control designation section, it indicates that the command is a payout number designation command. ,
"0, 1" indicates a payout designation command.
The payout number designation command is sent to the prize ball control board 37 immediately after the CPU 56 of the main board 31 detects a winning.

Bits 7, 6, 5, and 4 are "1, 0, 0,
The command “0” is sent from the main board 31 when the cutout detection switch 167 or the cutout switch 187 is turned on (when the cutout state flag is turned on). Also, bits 7, 6, 5, and 4 are "1, 0,
The firing stop designation command of “0, 1”
Is transmitted from the main board 31 when is full and the full switch 48 is turned on (when the full state flag is turned on).

The award ball control command is output from the main board 31 to the award ball control board 37 as 1-byte (8 bits: award ball control commands D7 to D0) data. The winning ball control commands D7 to D0 are output in positive logic. When the award ball control commands D7 to D0 are output, a negative logic award ball control INT signal is output.

As shown in FIG. 5, the award ball control command is transmitted through the output port 577. Then, in this embodiment, as shown in FIG. 17, when the prize ball control commands D7 to D0 are output from the main board 31, the prize ball control INT signal becomes low level for 5 μs or more. The award ball control INT signal is connected to an interrupt terminal of the award ball control CPU 371 on the award ball control board 37. Therefore, when there is an interrupt, the award ball control CPU 371 can recognize that the award ball control commands D7 to D0 have been transmitted from the main board 31, and perform the award ball control command receiving process in the interrupt process.

The command configuration shown in FIG. 15 is an example, and another configuration may be used. For example, the upper and lower bits in one byte may be reversed from the configuration shown in FIG.

FIGS. 18 and 19 are flowcharts showing an example of the winning ball signal processing executed by the CPU 56. As described above, the winning ball signal processing is executed once every 2 ms.

In the winning ball signal processing, the CPU 56
First, it is determined whether or not a prize ball is being paid out (step S2).
61). If the prize ball is already being paid out, the flow shifts to step S241. If the prize ball is not being paid out, it is checked whether or not the payout command number accumulated value is not 0 (step S26).
2). As described above, the payout command number cumulative value becomes a value other than 0 when the payout number instruction command is transmitted to the game control board 37.

If the cumulative number of payout commands is not 0,
While turning on the prize ball flag (step S26)
3) Start the monitoring timer (step S26)
3).

In this embodiment, when detecting a winning, the game control means notifies the prize ball control means of the detection as soon as possible. The prize ball control means stores the notification from the game control means, and performs the prize ball payout control in parallel with the ball lending control based on the storage. Even in parallel, only one control can be performed at a time, so the prize ball payout control is executed with priority. However, when the ball lending control is started, it is more efficient to continue the ball lending control until the payout of the unit number is completed. That is, even if the award ball payout control is prioritized, the award ball payout control cannot be started for a predetermined period after the ball lending control is started. Therefore, the game control means sets a monitoring timer according to a period having a margin in such a period (a period required for controlling the lending of a predetermined number of balls), and starts award ball payout even if the set time is exceeded. If not, a prize ball error will occur.

At the step S241, the CPU 56
Waits for the prize ball count switch to turn on. When detecting that the winning ball count switch is turned on, the monitoring timer described above is stopped (step S242). Then, it waits for the prize ball count switch to be turned off (step S243), and when turned off, decrements the payout command cumulative number by one (step S24).
4). Then, the timer T1 is started (step S24).
5).

The paid out prize balls pass through the prize ball count switch 301A one by one. By detecting the on / off state of the prize ball count switch 301A, the passing of the ball is reliably detected. Then, when ball passing is detected, it is determined that there is one winning ball, and the payout command cumulative number is decremented by one.

The timer T1 is controlled by the award ball count switch 30.
Each time the 1A output is turned on after being turned on, it is started or restarted. If the award ball count switch 301A is not turned on in step S241, it is checked whether or not the monitoring timer is operating (step S246). If the monitoring timer is operating, the CPU 56 checks whether the monitoring timer has timed out (step S247). If the monitoring timer has timed out, it means that the prize ball payout has not been started within a predetermined time.
A predetermined error display is performed (step S257).

If the monitoring timer is inactive or in operation and has not timed out, the CPU 56
It is checked whether the timer T1 is operating (step S24).
8). If the timer T1 is operating, the CPU 56 checks whether the timer T1 has timed out (step S250). If the timeout has not occurred, the process ends.

The value of the timer T1 (time from activation to time-out) is a payout cycle (a period from when the prize ball count switch is turned on to when it is turned on next time) when payout is normally performed. It is set longer. Therefore, when the payout is normally performed, the next prize ball count switch is turned on (step S242) before the timer T1 times out, except for the last payout. That is, when the payout is normally performed, the timer T1 times out only after the last payout is performed. In this embodiment, a continuous payout (a prize ball payout for a certain prize and a prize ball payout for the next prize is performed continuously) is performed. In some cases, an interval time is provided between prize ball payouts in the continuous payout. In such a case, the value of the timer T1 is set to be longer than the interval time. That is, even when continuous payout with an interval time is performed,
Again, it times out only after the last payout has been made.

When the timer T1 times out in step S250, the CPU 56 checks whether or not the payout command number accumulation value is 0 (step S25).
1). If the value is 0, the award ball payout flag is turned off and the process is terminated (step S252).

If the cumulative number of payout commands has not become 0 when the timer T1 times out, the CPU 56
Shifts to error display (step S257).

As described above, the CPU 56 counts the number of game balls actually paid out based on the output of the prize ball count switch 301A. Then, it is confirmed whether or not the number of prize balls paid out to the prize ball control means has been paid out. As will be described later, the award ball control means also counts the number of game balls actually paid out based on the output of the award ball count switch 301A. That is, since the number of game balls is counted by both the game control means and the prize ball control board, the reliability of the prize ball control can be improved.

FIG. 20 is a flowchart showing the INT process of the CPU 56. As described above, the power monitoring I
When the C 902 detects a drop in the power supply voltage, the CPU 56 is externally interrupted. Also, as shown in FIG. 6, the output of the power supply monitoring IC 902 is introduced to the input port.

In the INT process based on the decrease in the power supply voltage, the CPU 56 first transfers the contents of the register to the backup RAM (step S31). Then, IN
The T flag is set (step S32). The INT flag is an internal flag indicating that an interrupt has occurred due to a drop in power supply voltage. The INT flag is set in the backup RAM area. The CPU 56 further includes:
RAM access is disabled (step S33),
The level of the input port to which the output of the power monitoring IC 902 is introduced is continuously monitored (step S34). In this state, the power supply voltage further decreases and finally the CPU
The operation of 56 stops.

However, when the level of the input port has returned to the normal level, the CPU 56 enables the RAM access (step S35), and stores the register value stored in the backup RAM into the original register. It is returned (step S36). Then, the INT flag is reset (step S37), and the process returns to the interrupted address.

As described above, upon detecting that the power supply voltage has returned to normal, the CPU 56 returns the register to the original state and returns to the interrupted address. Therefore, control can be returned to a normal state even when noise or the like is put on the external interrupt line (INT line) or in the case of a momentary power failure.

As described above, the prize ball control board 37
When the prize ball control command is being sent to the player, the interrupt processing is not started because the interrupt mask is set. Then, when the transmission of the award ball control command is completed and the interrupt mask is released, the interrupt which has been suspended occurs and the INT processing is started.

FIG. 21 is a flowchart showing an example of the initialization process (step S2) in the main process shown in FIG. When the power supply to the gaming machine is restarted, an initial reset signal is input from the initial reset circuit 65 to the CPU 56. The CPU 56 starts the main process in response to the initial reset signal. In the system check process, first, the CPU 56 checks whether or not the INT flag is set (step S42).

At this time, if it is necessary to set the RAM access permission state, that is, if the RAM access permission state is not automatically set when a reset is applied, the CPU 56 sets the RAM access permission state. .

If the INT flag is not set,
Clear all registers and RAM area (step S
46), necessary initial values are set (step S47).
Then, a power-on screen display command transmission request is set (step S48), the stack pointer is initialized (step S49), and the initialization processing ends.

When the power-on screen display command transmission request is set, the power-on screen display command is transmitted to the display control board 80 by, for example, the display control data output process (step S5) shown in FIG. Is done. When the display control CPU 101 of the display control board 80 receives the power-on screen display command, the display control CPU 101
Next, a screen that is determined in advance as a screen displayed when the power is turned on is displayed.

When it is confirmed in step S42 that the INT flag has been set, the CPU 56 restores the register value stored in the backup RAM to the original register (step S43). Then, the INT flag is reset (step S44), and an error screen display command transmission request is set (step S45).

When an error screen display command transmission request is set, an error screen display command is transmitted to the display control board 80 by, for example, display control data output processing (step S5). Upon receiving the power-on screen display command, the display control CPU 101 of the display control board 80 displays a predetermined error screen on the variable display unit 9.

Then, the CPU 56 jumps to the value of the stack area indicated by the stack pointer as a jump destination. Since the stack pointer is one of the registers, the stack pointer has been restored to the value at the time of power-off by the processing in step S43. Also, in this embodiment,
The stack area is formed in the backup RAM area. That is, it is preserved even when the power is turned off. Therefore, the control state returns to the state when the power was turned off.

For example, it is assumed that the display control CPU 101 of the display control board 80 is performing symbol variation display on the variable display section 9 when the power is turned off. Then, when the power is restored, the display control CPU 101 receives the error screen display command, and displays an error screen on the variable display unit 9. On the other hand, the CPU 56 of the main board 31 returns to the state when the power is turned off, that is, the gaming state in which the special symbol is changing. Then, when the gaming state in which the special symbol is changed ends, a command indicating a symbol stop or a command indicating a big hit display is transmitted. At this stage, the display control CPU 101 can stop the error display and continue the subsequent display control.

As described above, the CPU 56 returns to I
If the NT flag is set, a data recovery process is performed, and if the INT flag is not set, a normal initialization process (steps S46 and S47) is performed. And
In the data restoration process, a restoration process of the saved register and a reset process of the INT flag are performed. Also,
Since the return to the return address stored in the stack area in the RAM area where the power is backed up is returned, the game control means can return to the game state when the power is turned off.

FIG. 22 is a block diagram showing an example of the configuration around the CPU 371 for controlling the prize ball for monitoring and backing up the power supply. As shown in FIG. 22, the power supply monitoring IC 932 detects the occurrence of power interruption by introducing a +30 V voltage and monitoring the +30 V voltage. Specifically, the voltage of +30 V is a predetermined value (for example, 80 of +30 V).
%), It is determined that the power is cut off, and an interrupt signal is given to the CPU 371 for controlling the prize ball. C for prize ball control
In the PU 371, this interrupt is input to a non-maskable interrupt (NMI) terminal. The signal input to the NMI terminal is also input to the input port. Therefore, in the NMI processing, the CPU 371 for controlling the prize ball can confirm the power-off state by confirming the level of the input port.

The predetermined value for the power supply monitoring IC 932 to detect the power-off is lower than the normal voltage, but is a voltage at which the prize ball control CPU 371 can operate for a while.
The power supply monitoring IC 932 is connected to the CPU 37 for controlling the prize ball.
1 is configured to monitor a voltage higher than the required voltage (+5 V in this example).
The monitoring range can be extended for the voltage required by the PU 371. Therefore, more precise monitoring can be performed.

While power is not supplied from the + 5V power supply, at least a part of the built-in RAM of the prize ball control CPU 371 is backed up by connecting a backup power supply supplied from a power supply board to a backup terminal, and The contents are preserved even if the power supply to is turned off. Then, when the +5 V power supply is restored, a reset signal is issued from the initial reset circuit 935, so that the award ball control CPU 371 returns to the normal operation state. At that time, since the necessary data is backed up, it is possible to return to the gaming state at the time of the occurrence of the power failure when recovering from a power failure or the like.

FIG. 23 is a flowchart showing the main processing of the award ball control CPU 371. In the main processing,
The winning ball control CPU 371 first performs an initial value setting process such as clearing the RAM area (step S701).
If data is set in the RAM area (backup RAM area) of the built-in RAM where the power is backed up, those areas are not cleared. After that, in this embodiment, the CPU 371 for controlling the prize ball.
Performs prize ball payout control by an interrupt process by a timer interrupt generated every predetermined period (for example, 2 ms) (step S70).
2). In the timer interruption process, as shown in FIG. 24, the prize ball control CPU 371 executes a prize ball payout control process (step S711).

FIG. 25 is an explanatory diagram showing an example of use of a RAM built in the CPU 371 for controlling a prize ball. In this example,
A total number storage (for example, 2 bytes) is formed in the backup RAM area. The total number is stored in the main board 31
Stores the total number of payouts instructed from the side.

FIGS. 26 to 31 show the CPU 37 for controlling the prize ball.
It is a flowchart which shows the prize ball payout control processing which 1 performs. In this embodiment, the award ball payout control process is configured to be executed by a timer interrupt process.
Instead of such a configuration, it may be configured to be executed by a normal process (not an interrupt process).

In the award ball payout control process, the award ball control C
The PU 371 checks whether it is currently in an error state (step S481). If an error occurs, error processing is performed. If it is not in the error state, it is checked whether or not the prize ball is being played (or the correction is being paid out) (step S48).
2). If the ball is not being awarded, it is checked whether or not a ball lending process is being performed (step S483). If you are lending a ball,
The process proceeds to lending a ball.

If no balls are being lent, it is checked whether the value of the total number storage and correction number counter is 0 (step S484). If they are 0, that is, if it is not necessary to pay out the prize balls, it is checked whether the BRQ signal, which is a ball lending request signal from the card unit 50 as an external device of the gaming machine, is on. (Step S491).

If the BRQ signal is on, a process for starting ball lending is performed (step S492), and the process shifts to a ball lending process. Preferably, a counter for ball lending control is also formed in the backup RAM area.

If it is determined in step S484 that the values of the total number storage and correction number counters are not all zero, the processing of step S500 is performed.

In step S500, if the corrected payout flag is ON, that is, if it is determined that the corrected payout is to be performed, the process proceeds to step S507. If the corrected payout flag is not on, the prize ball control CPU 371 turns on the prize ball processing flag (step S503), and turns on the payout motor 289 (step S503).
507). Then, the processing shifts to a prize ball payout processing.

The processing after step S532 shown in FIG. 28 is processing during payout of award balls. In the processing during the prize ball payout, first, a state check is performed (step S53).
2). The prize ball control CPU 371 checks whether the prize ball payout is normally performed by monitoring the payout motor position sensor and the prize ball count switch 301A. The state check is a process of determining whether the payout motor position sensor is currently monitored for ON or the payout motor position sensor is monitored for OFF.

In this embodiment, the following timer is used for monitoring the payout motor position sensor and the prize ball count switch 301A. (1) Timer T11: For monitoring the payout motor position sensor on (2) Timer T12: For monitoring the payoff motor position sensor off (3) Timer T13: For monitoring on the award ball count switch 301A (4) Timer T14: Award For monitoring off of ball count switch 301A

After the payout number is confirmed by the payout motor position sensor, the prize ball count switch 301A
There is a delay time required for several game balls to flow down until the actual payout ball is detected, and the following timer is used to wait for that time. (5) Timer T15: Waiting for the time from when the last payout ball is confirmed by the payout motor position sensor to when the ball passes through the prize ball count switch 301A.

Here, a state check is performed by confirming that these timers are operating. In step S532, when the timer T11 is in operation, the wait motor position sensor is turned on (step S53).
534), and when the timer T12 is operating, the wait motor position sensor is turned off (step S
542). When the timer 15 is operating, the timer 15 waits for a timeout (step S57).
Go to 3). When none of the timers is operating, the timer T11 is started (step S53).
3).

In step S534, the prize ball control C
The PU 371 waits for the payout motor position sensor to turn on. If the timer T11 times out before turning on, the process proceeds to error processing (steps S535 and S536).
When the payout motor position sensor is turned on, the timer T11 is stopped (step S537), and the timer T12 is started (step S541). After that, the CPU 37 for controlling the prize ball
1 waits for the delivery motor position sensor to be turned off (step S542). If the timer T12 times out before turning off, the processing shifts to error processing (step S543,
S545). Note that while the timers T11 and T12 have not timed out, the winning ball count switch check subroutine is executed (step S547).

When the payout motor position sensor is turned off, the timer T12 is stopped (step S546). If the correction payout is not being performed (step S549), the payout counter is incremented by +1.
(Step S550), and the total number storage is
1 (step S551). Then, when the value of the total number storage becomes 0 (step S552), step S5
It moves to 71. If the corrected payout is being performed, the value of the corrected number counter is decremented by 1 (step S560). When the value of the corrected number counter becomes 0 (step S561), the process proceeds to step S571.

In step S571, the payout motor 289
Is stopped. Further, the timer T15 is started (Step S572). After that, it waits for the timeout of the timer T15 (step S573). During the time-out, the award ball count switch check subroutine is executed (step S576).

When the timer T15 times out, if the corrected payout is not being performed (step S574), the value of the payout counter is compared with the value of the prize ball counter (step S5).
75).

The prize ball counter is incremented each time the prize ball count switch 301A located below the payout motor position sensor is turned on once in the prize ball count switch check subroutine. When the ball payout is performed normally when the timer T15 times out, the value of the prize ball number counter matches the number of times the payout motor position sensor is turned on. For example, when n prize balls have been played, when the number of times the payout motor position sensor is turned on becomes n, the value of the total number memory becomes 0 in step S552, and thereafter, when the time of T15 elapses, the prize ball number counter Should be n.

If the judgment results in step S575 do not match, the prize ball shortage number (planned prize ball number−prize ball number counter value)
Is set in the payout number counter (step S583), the payout motor 289 is turned on (step S584), and the corrected payout flag is turned on (step S585). Thereafter, a notification (for example, a buzzer notification) indicating that the correction payout has been started is performed for, for example, 20 seconds (step S586). This notification is performed for the purpose of notifying the gaming shop clerk that there may be an abnormality in the prize ball device, and also indicating the possibility of the failure or removal (illegal) of the prize ball count switch 301A. It should be noted that the prize ball shortage number is stored as the scheduled correction number.

If the corrected payout has been made, it is checked whether or not the value of the prize ball number counter matches the expected number of corrections (step S581). If not, the flow proceeds to step S586. If they match, the corrected payout flag is reset (step S582), and the process ends.

If the judgment results in the step S575 are coincident, the award ball processing flag is reset (step S587), and the process is terminated.

As described above, the CPU 371 for controlling the prize ball.
Recognizes whether or not the prize ball is completed based on the value of the total stored number, and when completed, confirms the number of detections by the prize ball count switch 301A after a lapse of a predetermined time, and determines the number of game balls that have passed the prize ball count switch 301A If the number is less than the expected number of payouts, the correction payout process is started. In addition, the value of the total storage number is, when a payout number instruction command is received in a command receiving process described later,
The specified number is added.

The total number of storages is in the backup RAM.
Since it is formed in the area, it is stored even if the power is cut off due to a power failure or the like. Therefore, upon recovery from a power failure or the like, the prize ball control CPU 371 can continue the prize ball payout control based on the stored data. For example, upon recovery from a power failure, the CPU 371 for controlling the prize ball can detect the total storage number is set, and restart the prize ball payout process.

Furthermore, if a correction number counter and the like are also formed in the backup RAM area, even if a power failure or the like occurs during the correction dispensing process, the CPU 3 for controlling the prize ball when recovering from the power failure or the like.
71 can continue the correction payout control based on the stored data.

FIG. 31 is a flowchart showing the award ball count switch check subroutine. In the prize ball count switch check, first, a state check is performed (step S511). In step S511, when the timer T13 is operating, the on-wait processing of the winning ball count switch 301A (step S51)
When the process proceeds to 3) and the timer T14 is operating,
The process proceeds to an off wait process for the award ball count switch 301A (step S518). When none of the timers is operating, the timer T13 is started (step S512).

Then, it waits until the award ball count switch 301A is turned on (step S513). If the timer T13 times out before the output of the winning ball count switch 301A is turned on, the process shifts to error processing (step S).
514, S515).

When the output of the prize ball count switch 301A is turned on, the timer T13 is stopped (step S13).
516), and start the timer T14 (step S51).
7). Then, it waits for the award ball count switch 301A to be turned off (step S518). If the timer T14 times out before the award ball count switch 301A is turned off, the process shifts to error processing (steps S519, S5).
20). If the prize ball count switch 301A is turned off before the timer T14 times out, the timer T1
4 is stopped (step S521). Then, the value of the award ball number counter is incremented by 1 (step S522).

In this embodiment, when a prize ball instruction is received from the game control means, the number of prize balls is added to the total number storage, and the payout control is performed using the value of the total number storage. In response to a prize ball instruction from the game control means, the number of prize balls may be stored in a number counter provided corresponding to the prize ball.

FIG. 32 is a flowchart showing a prize ball control command receiving process by the interrupt process. The award ball control INT signal from the main board 31 is input to the interrupt terminal of the award ball control CPU 371. Therefore, when the award ball control INT signal from the main board 31 is turned on, the award ball control CP
U371 is interrupted, and the reception processing of the award ball control command shown in FIG. 32 is started.

In the receiving process of the award ball control command, the award ball control CPU 371 first sets a command receiving flag (step S851). Then, one-byte data is read from the input port assigned to the input of the award ball control command data (step S85).
2). If the read data is the payout number instruction command (step S853), the number specified by the payout number instruction command is added to the total number storage (step S85).
5). Otherwise, a communication end flag is set (step S854). In this example, the communication end flag is a flag indicating that a command other than the payout number instruction command has been received.

As described above, the CPU 371 for controlling the prize ball mounted on the prize ball control board 37 is the CPU 5 of the main board 31.
The number of award balls included in the payout number instruction command sent from 6 is stored in the backup RAM area (total number storage). Then, the prize ball controlling CPU 371 resets the command receiving flag (step S856).

FIG. 33 is a flowchart showing the NMI interrupt processing executed by the CPU 371 for controlling a prize ball. FIG.
When the power supply monitoring IC 932 shown in FIG. 2 detects a decrease in the power supply voltage, an NMI interrupt occurs, and the NMI interrupt processing is started. Therefore, in the NMI interrupt process, the process at the time of power failure is executed. In the power-off processing, the CPU for controlling the prize ball
371 first checks whether the command receiving flag is set (step S801). The command receiving flag is set when a winning ball control command from the main board 31 is being received. If the command receiving flag is set, the CPU 371 for controlling the prize ball
Returns to the command receiving process, and the command receiving process is continued.

More specifically, the CPU 371 for controlling the prize ball,
The data of the stack area (the uppermost 2 bytes of the stack area) indicated by the stack pointer is saved in a register or the like (step S811). When an NMI interrupt occurs, the register value and the value of the program counter at the time of occurrence of the interrupt are stored in the stack area. For example, the value of the program counter is stored in the top two bytes of the stack area.
That is, the two most significant bytes indicate the address of the program that was being executed when the interrupt occurred.

Further, the award ball control CPU 371 sets the start address of the NMI interrupt process in the uppermost two bytes of the stack area (step S812). Then, jump to the address saved in step S811. That is, the address saved in step S811 is set in the program counter.

If the command reception flag is set by the above processing, the processing being executed when the NMI interrupt occurs, that is, the processing during reception of the award ball control command (FIG. 33 in this embodiment) The processing returns to the command reception interrupt processing shown in FIG. When the command reception interrupt processing is completed and the RETI instruction is executed, the processing returns to the return address stored in the stack area. Step S8
Since the return address is set to the start address of the NMI interrupt process by the process of 12, the NMI interrupt process is executed again.

In this embodiment, the return address is set to the highest address of the stack area when an interrupt occurs. However, the return address is set to another area in the stack area depending on the type of CPU used. It may be done. In that case, steps S811, S81
The process 2 is executed for the return address storage area in the stack area.

If the command receiving flag is not set in step S801, that is, if the prize ball control command is not being received, the CPU 371 for controlling the prize ball.
Disables the RAM access (step S80).
2), continue to monitor the level of the input port to which the output of the power monitoring IC 932 is introduced (step S80)
3).

When the level of the input port returns to the normal level, the award ball control CPU 371 sets the RAM access to a permitted state (step S804), and sets the NMI
The flag is reset (step S805), and the process returns to the address where the NMI interrupt has occurred.

As described above, the CPU 371 for controlling the prize ball
When it is detected that the power supply voltage has returned to normal, the state of the register is returned to the original state, and the address returns to the address where the NMI interrupt was interrupted. Therefore, control can be returned to a normal state even when noise or the like is present on the NMI line or when there is a momentary power failure. After the processing of steps S811, S812 is executed and the command reception interrupt processing is performed, NM
When returning to the I interrupt processing, the NMI interrupt processing R
The return destination by the execution of the ETI does not return to the command reception interrupt processing, but returns to the previous state (the address where the command reception interrupt processing was applied).

As described above, if the prize ball control command is being received, the power-off process is not performed immediately but the power-off process is performed after the reception of the prize ball control command is completed. Therefore, it is possible to reliably receive the winning ball control command sent from the main board 31 without dropping it. Then, since the value of the total number storage formed in the backup RAM area is updated based on the received command, when the prize ball payout control is restarted upon returning from the power-off, the value based on the accurate stored value is used. Prize ball payout control can be performed.

FIG. 34 is a flowchart showing a part of the initialization processing executed by the CPU 371 for controlling the prize ball when the power is turned on. When the power is turned on or the power is restored, the award ball control CPU 371 first checks whether or not the value of the total number storage formed in the backup RAM area is 0 (step S901). If it is 0, it means that there were no unpaid prize balls at the time of the previous power-off, so that normal initialization processing is performed. That is,
Clear the register and all RAM areas (step S
903), the stack pointer is initialized (step S904).

If the value of the total number storage is not 0, an address is designated to clear the register and the non-backup RAM area (step S905). Then, setting for restarting the prize ball is performed. For example, a flag during processing of a prize ball is set (step S906). If the backup RAM area is an area irrespective of the number of prize balls, those addresses may be designated and cleared.

As described above, the CPU 371 for controlling the prize ball
When the power is turned on, it is possible to determine whether to perform the normal initial setting process or to restore the state during the prize ball only by checking the data in the backup RAM area. In other words, the prize ball processing can be restarted for the unpaid prize balls by a simple judgment.

In the process shown in FIG. 34, the prize ball control C
The PU 371 confirms the data in the backup RAM area when the power is turned on, but such determination need not be performed. That is, as shown in FIG.
Only the RAM area not backed up by the power supply is designated and cleared (step S910). In addition,
Here, the register is also cleared. When such initialization processing is performed, the register is not saved when the power is turned off.

FIG. 36 shows the power monitoring I when the prize ball control CPU 371 is performing the prize ball control command receiving process.
FIG. 9 is a timing chart showing a control state when C 932 detects a voltage drop. As shown in FIG. 36, when a drop in the power supply voltage is detected during the award ball control command receiving process (low active in this example), the NMI interrupt process is started. However, since the command receiving flag is set, the control returns to the award ball control command receiving process. When the award ball control command receiving process is completed, NM
An I interrupt process is executed.

In each of the above embodiments, the main substrate 3
1 CPU 56 and prize ball control C of prize ball control board 37
Although the processing at the time of power interruption due to the interruption of the PU 371 has been described, the other boards (the display control board 80, the audio control board 70
And the CPU mounted on the lamp control board 35)
Alternatively, the power-off process may be performed by interruption. that time,
The signal indicating the voltage drop may be connected to a maskable external interrupt terminal or may be connected to an NMI terminal.

As in the case of the RAMs of the game control means and the prize ball control means, the RAMs of the voice control means, the lamp control means and the display control means may have a portion to be backed up.

[0175]

As described above, according to the present invention, the gaming machine can be divided by the game control microcomputer by the output signal of the power supply voltage monitoring means during transmission of the prize ball command to the prize ball control means. The prize ball control microcomputer sets the command receiving flag during the prize ball command receiving process from the game control means, and in the power-off process, if the command receiving flag is set. Since the command receiving process is configured to be continued, there is an effect that a command is always reliably transferred between the game control means and the prize ball control means so that a disadvantage is not given to the player.

A detection signal indicating that a payout has been made from the ball payout device is input to the game control means and the prize ball control means,
When the game control means and the prize ball control means are each configured to perform the count confirmation of the number of prize ball payouts based on the detection signal, the prize ball payout confirmation is performed by the two control means. Reliability can be improved.

When the prize ball control means includes prize ball number storage means for recognizing the number of prize balls, the prize ball number storage means is configured to store the total number of prize balls. The required amount of the volatile storage means in the means is reduced, and the capacity of the volatile storage means can be suppressed.

When the number of award balls storage means is configured to store the total number of award balls in the volatile storage means that is backed up, the size of the backup RAM area is reduced, and the capacity of the backup power supply is reduced. Can be suppressed.

At least a portion of the volatile storage means of the game control means can be backed up by the backup power supply even when the power of the game machine is turned off, and is used to restore the game state when the power supply of the game machine is restored. If the configuration is such that the required game state memory can be held, the power-off process and the data restoration process do not need to be performed even in a situation in which power interruptions occur repeatedly. Even if an instantaneous interruption or the like occurs, there is an effect that the processing efficiency is not reduced and the progress of the game is not hindered.

When the power supply voltage monitoring means detects a predetermined amount of voltage drop, it outputs a signal to the interrupt terminals of the game control microcomputer and the prize ball control microcomputer, and the game control microcomputer and the prize If the ball control microcomputer is configured to execute the power-down processing in the interrupt processing based on the input of the signal to the interrupt terminal, the power-down processing is performed by the processing having a higher priority. Can start quickly.

A signal from the power supply monitoring means is also input to an input port provided in the game control means and the prize ball control means, so that the game control microcomputer and the prize ball control microcomputer perform processing during power-off. If the power supply voltage is recovered by monitoring the input state of the input port, and if the power supply voltage is recovered, the game returns to the original game state, By directly monitoring the output, it is possible to reliably monitor whether or not the power supply voltage has recovered.

When the input port is a port in the input section for inputting a switch provided in the gaming machine, the input port section can be effectively used.

When the power supply board is provided with a backup power supply for backing up the power of the RAM in each control board on which the control means is mounted, it is not necessary to provide a backup power supply for each control board, and the cost of the gaming machine is reduced. Can be reduced.

At least the game control microcomputer sets a flag indicating that the power-off processing has been performed. If the flag is set at the time of return, the microcomputer performs data recovery processing. If the flag has not been set, the microcomputer returns to the initial state. When configured to perform the setting process, it is possible to determine whether or not to perform the data recovery process according to the on / off of a flag indicating that the process at the time of power-off has been performed, and the stored data can be determined. There is an effect that the power can be reliably used after the power is restored.

In the case where the data restoration process is configured to include a process of resetting a flag indicating that the process at the time of power-off has been performed and a process of reading a game state storage for restoring the game state, Can surely return the control state to the state at the time of power-off by reading the game state memory, and can prevent disadvantages to the player.

[Brief description of the drawings]

FIG. 1 is a front view of a pachinko gaming machine viewed from the front.

FIG. 2 is a front view of the gaming board of the pachinko gaming machine as viewed from the front.

FIG. 3 is a rear view of the pachinko gaming machine as viewed from the rear.

FIG. 4 is a block diagram showing a circuit configuration example of a game control board (main board).

FIG. 5 is a block diagram illustrating a circuit configuration example of a winning ball control board.

[Fig. 6] C for power supply monitoring and power supply backup
FIG. 3 is a block diagram illustrating a configuration example around a PU.

FIG. 7 is a block diagram illustrating a configuration example of a power supply board.

FIG. 8 is a flowchart showing the operation of the basic circuit on the main board.

FIG. 9 is a flowchart showing a switch process.

FIG. 10 is a flowchart showing a starting port switch check process.

FIG. 11 is a flowchart showing a count switch check process.

FIG. 12 is a flowchart showing a winning opening switch 19a check process.

FIG. 13 is a flowchart showing a winning opening switch 24a check process.

FIG. 14 is a flowchart showing a prize ball command transmission process.

FIG. 15 is an explanatory diagram showing a configuration example of a winning ball control command.

FIG. 16 is an explanatory diagram showing a bit configuration of a winning ball control command.

FIG. 17 is a timing chart showing how the award ball control command data is output.

FIG. 18 is a flowchart showing processing related to prize ball control of the game control means.

FIG. 19 is a flowchart showing processing related to prize ball control by the game control means.

FIG. 20 is a flowchart illustrating an interrupt process of a CPU.

FIG. 21 is a flowchart illustrating an example of an initialization process.

FIG. 22 is a block diagram showing an example of a configuration around a CPU for controlling a prize ball for monitoring and backing up a power supply.

FIG. 23 is a flowchart showing a main process executed by a winning ball control CPU.

FIG. 24 is a flowchart showing a 2 ms timer interrupt process of the winning ball control CPU.

FIG. 25 is an explanatory diagram showing an example of a configuration of a RAM in the winning ball control means.

FIG. 26 is a flowchart showing a prize ball control process of a prize ball control CPU.

FIG. 27 is a flowchart showing a prize ball control process of a prize ball control CPU.

FIG. 28 is a flowchart showing a prize ball control process of a prize ball control CPU.

FIG. 29 is a flowchart showing a prize ball control process of a prize ball control CPU.

FIG. 30 is a flowchart showing a prize ball control process of a prize ball control CPU.

FIG. 31 is a flowchart showing a winning ball count switch check subroutine.

FIG. 32 is a flowchart showing a command receiving process of the winning ball control CPU.

FIG. 33 is a flowchart showing an NMI interrupt process of a winning ball control CPU.

FIG. 34 is a flowchart illustrating an example of initialization processing of a winning ball control CPU.

FIG. 35 is a flowchart showing another example of the initialization processing of the winning ball control CPU.

FIG. 36 is a timing chart showing an example of control when a voltage drop is detected during the processing for receiving a prize ball control command.

[Explanation of symbols]

 1 Pachinko gaming machine 31 Main board 37 Prize ball control board 53 Basic circuit 56 CPU 371 CPU for prize ball control 901 CPU 902, 932 Power supply monitoring IC 910 Power supply board 916 Capacitor

[Procedure amendment]

[Submission Date] September 16, 1999 (1999.9.1)
6)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claim 1

[Correction method] Change

[Correction contents]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0010

[Correction method] Change

[Correction contents]

[0010]

A gaming machine according to the present invention comprises:
A gaming machine in which a game area is provided on a gaming board, and a predetermined number of game balls are paid out as prize balls from a payout device in accordance with a prize of a game ball to a prize area provided in the game area, A game control means for controlling the progress of the game, a prize detecting means capable of detecting that a prize has been won in each prize area, a ball payout apparatus for paying out game balls by driving an electric drive source, and a ball payout apparatus. Prize ball control means for driving and paying out prize balls, and power supply voltage monitoring means for monitoring a voltage drop of a power supply supplied to the gaming machine, wherein the game control means includes a microcomputer for game control, The means includes a microcomputer for controlling a prize ball, and the prize ball control means includes a volatile memory in which a memory content changes according to the progress of the control.
Means, and at least a part of the volatile storage means can be backed up by a backup power supply even when the power of the gaming machine is turned off, and the microcomputer for gaming control pays out the number of prize balls to be paid out in response to the detection signal of the winning detection means. Is transmitted to the prize ball control means, the output signal of the power supply voltage monitoring means is introduced to the maskable interrupt terminal, and the power supply voltage monitoring means detects that a predetermined amount of voltage drop has been detected. A predetermined game control power supply interruption process is performed by the interruption process, and while the prize ball command is being transmitted to the prize ball control unit, the interruption by the output signal of the power supply voltage monitoring unit is masked. Receiving a prize ball command from the game control means, and setting a command receiving flag during the command reception processing, so that the power supply voltage monitoring means The based to detecting performs processing upon predetermined prize balls control power-off, in power-off time process is characterized in that the command reception flag is to continue the command reception process if it is set.

Claims (11)

[Claims] 1. A game in which a game area is provided on a game board, and a predetermined number of game balls are paid out as prize balls from a payout device in accordance with a prize of a game ball in a prize area provided in the game area. A game control means for controlling the progress of the game, a prize detecting means capable of detecting that there is a prize in each prize area, and a ball payout device for paying out game balls by driving an electric drive source Prize ball control means for driving a ball payout device to pay out a prize ball, and power supply voltage monitoring means for monitoring a voltage drop of a power supply supplied to the gaming machine, wherein the game control means is a microcomputer for game control. The prize ball control means includes a prize ball control microcomputer, the prize ball control means includes a nonvolatile storage means whose storage content changes in accordance with the progress of control, and at least one of the volatile storage means. The unit can be backed up even when the power of the gaming machine is turned off by a backup power supply, and the gaming control microcomputer sends a prize ball command capable of specifying the number of prize balls to be paid out according to a detection signal of the winning detection means. The game signal is transmitted to the prize ball control means, the output signal of the power supply voltage monitoring means is introduced to the maskable interrupt terminal, and the predetermined game control is performed by the interruption processing based on the detection of the predetermined amount of voltage drop by the power supply voltage monitoring means. The power-off process is performed, and while the prize-ball command is being sent to the prize-ball control means, the interrupt by the output signal of the power supply voltage monitoring means is masked. And the command receiving flag is set during the command receiving process, and the power supply voltage monitoring means detects a predetermined amount of voltage drop. Performs processing upon predetermined prize balls control power-off in particular based, at power-off time of processing, the gaming machine characterized by continuing the command reception process if set command received flag. 2. A detection signal indicating that a payout has been made from the ball payout device is input to a game control means and a prize ball control means, and the game control means and the prize ball control means each receive a prize according to the detection signal. Claim 1 for checking the number of balls paid out
The gaming machine described. 3. The gaming machine according to claim 1, wherein the prize ball control means includes a prize ball number storage means for recognizing the number of prize balls, and the prize ball number storage means stores the total number of prize balls. . 4. The gaming machine according to claim 3, wherein the number-of-prize-ball storage means stores the total number of prize balls in the volatile storage means backed up. 5. At least a part of the volatile storage means included in the game control means can be backed up by the backup power supply even when the power of the game machine is turned off, and restore the game state when the power supply of the game machine is restored. 5. The gaming machine according to claim 1, wherein a gaming state memory required for the game can be held. 6. The power supply voltage monitoring means outputs a signal to interrupt terminals of the game control microcomputer and the prize ball control microcomputer when detecting a predetermined amount of voltage drop, and 6. The gaming machine according to claim 1, wherein the computer and the prize ball controlling microcomputer execute power-off processing in an interruption process based on a signal input to the interruption terminal. 7. A signal from the power supply monitoring means is also input to an input port provided in the game control means and the prize ball control means, and the microcomputer for controlling the game and the microcomputer for controlling the prize ball control when the power is turned off. 7. The gaming machine according to claim 6, wherein during the processing, whether or not the power supply voltage has recovered is monitored by monitoring the input state of the input port, and when the power supply voltage recovers, the gaming machine returns to the original gaming state. 8. The gaming machine according to claim 6, wherein the input port in the gaming control means is a port in an input section provided in the gaming machine and inputting a detection switch whose detection is used for controlling the gaming machine. . 9. A power supply board for generating each voltage used in a gaming machine control board for controlling a gaming machine provided for a game is provided separately from the gaming machine control board in the gaming machine. 9. The gaming machine according to claim 1, wherein the power supply board includes a backup power supply for backing up a power supply of the volatile storage unit in the gaming machine control board. 10. At least the game control microcomputer sets a flag indicating that power-off processing has been performed, and if the flag has been set at the time of recovery, performs data recovery processing and if the flag has not been set. The gaming machine according to claim 1, wherein the gaming machine performs an initial setting process. 11. The data restoring process includes at least a process of resetting a flag indicating that the process at the time of power-off has been performed and a process of reading a game state storage for restoring the game state. The gaming machine described.