JP2000500619A - 金属電子パッケージ用の接地リング - Google Patents

金属電子パッケージ用の接地リング

Info

Publication number
JP2000500619A
JP2000500619A JP9519824A JP51982497A JP2000500619A JP 2000500619 A JP2000500619 A JP 2000500619A JP 9519824 A JP9519824 A JP 9519824A JP 51982497 A JP51982497 A JP 51982497A JP 2000500619 A JP2000500619 A JP 2000500619A
Authority
JP
Japan
Prior art keywords
side wall
annular channel
cavity
metal substrate
depth
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9519824A
Other languages
English (en)
Japanese (ja)
Inventor
ホフマン，ポール，アール．
リーブハード，マーカス，ケイ．
Original Assignee
オリン コーポレイション
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US08/749,259 external-priority patent/US5764484A/en
Application filed by オリン コーポレイション filed Critical オリン コーポレイション
Publication of JP2000500619A publication Critical patent/JP2000500619A/ja
Pending legal-status Critical Current

Links

Classifications

    • H10W76/12—
    • H10W90/701—
    • H10W70/68—
    • H10W70/6875—
    • H10W72/00—
    • H10W74/114—
    • H10W70/682—
    • H10W72/075—
    • H10W72/07554—
    • H10W72/547—
    • H10W72/5522—
    • H10W72/5524—
    • H10W72/5525—
    • H10W72/884—
    • H10W74/00—
    • H10W90/734—
    • H10W90/754—

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
JP9519824A 1995-11-20 1996-11-18 金属電子パッケージ用の接地リング Pending JP2000500619A (ja)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US737495P 1995-11-20 1995-11-20
US60/007,374 1995-11-20
US08/749,259 US5764484A (en) 1996-11-15 1996-11-15 Ground ring for a metal electronic package
PCT/US1996/018479 WO1997019470A1 (en) 1995-11-20 1996-11-18 Ground ring for metal electronic package

Publications (1)

Publication Number Publication Date
JP2000500619A true JP2000500619A (ja) 2000-01-18

Family

ID=26676905

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9519824A Pending JP2000500619A (ja) 1995-11-20 1996-11-18 金属電子パッケージ用の接地リング

Country Status (5)

Country Link
EP (1) EP0956589A1 (esLanguage)
JP (1) JP2000500619A (esLanguage)
KR (1) KR19990071466A (esLanguage)
TW (1) TW434870B (esLanguage)
WO (1) WO1997019470A1 (esLanguage)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018006408A (ja) * 2016-06-28 2018-01-11 株式会社ジェイデバイス 半導体パッケージ及びその製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3819431A (en) * 1971-10-05 1974-06-25 Kulite Semiconductor Products Method of making transducers employing integral protective coatings and supports
JPS58169943A (ja) * 1982-03-29 1983-10-06 Fujitsu Ltd 半導体装置
US4939316A (en) * 1988-10-05 1990-07-03 Olin Corporation Aluminum alloy semiconductor packages
US5023398A (en) * 1988-10-05 1991-06-11 Olin Corporation Aluminum alloy semiconductor packages
JP2598129B2 (ja) * 1989-05-18 1997-04-09 三菱電機株式会社 半導体装置
JPH0423441A (ja) * 1990-05-18 1992-01-27 Fujitsu Ltd セラミックパッケージ半導体装置およびその製造方法
US6262477B1 (en) * 1993-03-19 2001-07-17 Advanced Interconnect Technologies Ball grid array electronic package
US5353195A (en) * 1993-07-09 1994-10-04 General Electric Company Integral power and ground structure for multi-chip modules
DE59403626D1 (de) * 1993-09-29 1997-09-11 Siemens Nv Verfahren zur Herstellung einer zwei- oder mehrlagigen Verdrahtung und danach hergestellte zwei- oder mehrlagige Verdrahtung
US5629835A (en) * 1994-07-19 1997-05-13 Olin Corporation Metal ball grid array package with improved thermal conductivity

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2018006408A (ja) * 2016-06-28 2018-01-11 株式会社ジェイデバイス 半導体パッケージ及びその製造方法

Also Published As

Publication number Publication date
WO1997019470A1 (en) 1997-05-29
EP0956589A4 (esLanguage) 1999-11-17
EP0956589A1 (en) 1999-11-17
TW434870B (en) 2001-05-16
KR19990071466A (ko) 1999-09-27

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