JP2000183220A - Manufacture of semiconductor device and manufacture device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To make productivity of a semiconductor device of a structure satisfac tory, wherein a stress applied to external electrodes can be relaxed, and the yield of the device, by a method wherein a semiconductor chip is superposed on a substrate, a through-hole is formed at a prescribed position on the sub strate, and a conductor consisting of a plating is formed in the through-hole. SOLUTION: The width between the bonded surface of a semiconductor chip 1 to a bonding agent 13 and a printed board 110 is about 350 to 650 μm, the thickness between the bonded surface of the chip 1 to the bonding agent 13 and a solder resist 17 is about 50 to 350 μm, and the thickness between the resist 17 and the board 110 is about 300 μm. Of these widths and thicknesses, since most of the width between the bonded surface of the chip 1 to the bonding agent 13 and the resist 17 is occupied by a substrate 12, the thickness between the bonded surface of the chip 1 to the bonding agent 13 and the resist 17 can be considered roughly equal to that of the substrate 12. From the above, since the generation of a breakage and a cleavage in the connection part of the substrate 12 with the chip 1 can be prevented, the productivity of a semiconductor device can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a semiconductor manufacturing method and a semiconductor device. In particular, the present invention relates to a method for manufacturing a semiconductor device suitable for high-density mounting and a semiconductor device.

[Prior art]

[0002] New forms of semiconductor packages are being developed one after another in order to meet the demands for higher functionality, smaller size, lighter weight and higher speed of electronic equipment. For example, the miniaturization and thinning of a semiconductor device by increasing the degree of integration of a semiconductor chip has led to a reduction in the size and weight of the electronic device described above.

In order to realize high integration of a semiconductor chip, the number of pins of the semiconductor chip has been increased. With the increase in the number of pins of the semiconductor chip, a wireless bonding (wireless bob) is required to connect the semiconductor chip to the leads.
nding) method has come to be used. The wireless bonding method is a bonding method in which an electrode pad of a semiconductor chip and a wiring lead or a wiring external electrode are overlapped and joined, and is also called gang bonding. As one of the wireless bonding methods, TAB (tape)
There is an automated bonding method.

In the TAB method, a large number of wirings are made by overlapping conductor wiring leads repeatedly formed on a tape-shaped substrate and corresponding portions of electrodes of a semiconductor chip and joining them by appropriate means. In particular, a method in which an electrode pad of a semiconductor chip and a portion corresponding to an inner lead of a substrate are overlapped and then bonded by thermocompression bonding or thermocompression bonding with ultrasonic waves is used as inner lead bonding (inner lead bonding).
bonding). This inner lead bonding is disclosed in, for example, JP-A-8-102466.

FIG. 9 shows an example of a conventional method of manufacturing a semiconductor device using the above-described inner lead bonding. First, as shown in FIG. 9A, in manufacturing this semiconductor device, a substrate 72 made of a polyimide-based organic insulating film having a thickness of about several tens of μm is used. This substrate 72
Adhesive 73 is applied to one principal surface of the. Further, a through hole 71 is provided in the substrate 72, and
In addition, a conductive material such as u is filled in the through hole 71 and a wiring 74 is formed on the surface of the substrate 72 on which the adhesive 73 is not applied so as to be in contact with the conductor 741. Become. The end of the through hole 71 on which the adhesive 73 is applied is plated with, for example, copper and gold.

Next, as shown in FIG. 9 (b), the substrate 72 is accurately positioned and set on the semiconductor chip 1, and is heated and pressed for several seconds, so that the substrate 72 and the semiconductor chip 1 are separated. And glue. Semiconductor chip 1
Although the electrode pad 10 is disposed on the outer peripheral edge of the chip, it may be disposed in the active region. Electrode pad 10
Is generally used as a metal forming aluminum.

Next, as shown in FIG. 9 (c), the substrate 72 and the semiconductor chip 1 are subjected to inner lead bonding by thermocompression combined with ultrasonic waves using a bonding tool 76. In this case, bonding by thermocompression only using thermocompression bonding requires considerably high temperature conditions. By this joining, aluminum constituting the electrode pads 10 of the semiconductor chip 1 and copper constituting the substrate 72 are alloyed, and the joining portion becomes stronger.

Next, as shown in FIG. 9D, a solder resist 77 having a predetermined pattern is formed on the surface of the substrate 72 opposite to the side to which the semiconductor chip 1 is adhered, and then, as shown in FIG. As shown in e), a portion of the substrate 72 where the resist is not applied (a portion where an external electrode is to be mounted in a later step) is plated with copper or copper + gold. Further, as shown in FIG. 9F, a solder bump 79 as an external electrode is mounted on the portion where the plating 78 has been applied in the previous step. Further, as shown in FIG. 9 (g), after cutting the outer shape (not shown), the printed board 710 made of glass epoxy resin or the like and the solder bump 79 are bonded, and finally, the printed board 710 and the solder bump 79 are connected. As shown in FIG. 9H, a reinforcing resin 714 is injected between the printed board 710 and the substrate 72 and then heated and hardened to secure the connection strength. The semiconductor device was manufactured by the above steps.

As another example of a conventional method for manufacturing a semiconductor device, FIG. 10 shows a conventional method for manufacturing a semiconductor device disclosed in Japanese Patent Application Laid-Open No. 10-150116. First, FIG.
In the conventional method of manufacturing a semiconductor device shown in FIG. 0, a polyimide organic insulating substrate 82 is used in manufacturing this semiconductor device as shown in FIG. . In the conventional method for manufacturing a semiconductor device shown in FIG. 10, the substrate 82 has a copper foil 841 deposited on one main surface. Unnecessary portions of the copper foil 841 on the substrate 82 are removed by etching, and FIG.
As shown in FIG. 7, a wiring 84 is formed.

Next, as shown in FIG.
A through-hole 81 is formed from the surface opposite to the wiring forming surface 2 by using a carbon dioxide gas laser. At this time, the resin residue 83 may not be sufficiently removed due to bubbles remaining in the through hole 81. Therefore, as shown in FIG. 10D, the resin residue 83 in the through hole 81 is removed. .

Next, as shown in FIG.
3 is plated 88 with copper or the like on the exposed surface. Further, FIG.
As shown in (f), after mounting the semiconductor chip 1 on the substrate 82, the semiconductor chip 1 is sealed with a sealing material 85. Further, as shown in FIG. 10G, solder bumps 89 as external electrodes are provided in the through holes 81. Finally, after cutting the outer shape (not shown), as shown in FIG. 10 (h), a printed board 810 made of glass epoxy resin or the like and the solder bump 89 are bonded to obtain a semiconductor device.

[0012]

However, the conventional semiconductor device and the method for manufacturing the semiconductor device shown in FIGS. 9 and 10 have the following problems. The conventional semiconductor device obtained by the method shown in FIG.
It goes through various heating and cooling processes until it is completed as a final product. For example, in the step shown in FIG. 9G, the connection between the solder bump 79 and the printed board 710 is set to about 2 seconds.
Perform at 40 ° C. A BT (bias / temperature) test for applying a voltage and heating the semiconductor device is performed at about 125 ° C. for 24 hours. Further, in order to confirm the reliability of the connection between the chip electrode 10 and the plating 75 provided on the conductor 741 and the connection between the solder bump 79 and the printed board 710 of the semiconductor device, Perform a temperature cycle test. In this temperature cycle test,
The semiconductor device is placed in an environment where the temperature changes within a range of −50 to + 150 ° C., and this temperature change process is repeated for several hundred cycles to investigate the occurrence of breakage and tearing of the connection portion, and to evaluate the reliability of the connection portion. Check the sex.

On the other hand, the expansion coefficients of the respective parts constituting the semiconductor device are different from each other. For example, semiconductor chip 1, substrate 7
2, when the printed board 710 is a Si chip, a polyimide-based organic insulating film, and a glass epoxy resin, respectively, the expansion coefficient of each is 3 ppm / ° C., 16 to
20 ppm / ° C, 16 to 50 ppm / ° C. Thus, the semiconductor chip 1, the substrate 72, and the printed board 71
0 have different coefficients of thermal expansion, the chip electrodes 1 of the semiconductor device are subjected to the above-mentioned heating / cooling steps.
0 and the connection between the plating 75 provided on the conductor 741 and the connection between the solder bump 79, which is an external electrode, and the printed board 710, respectively. Due to the difference in the coefficient of thermal expansion between the printed circuit board 710 and the printed circuit board 710, stress is applied to these connection portions due to the difference in the coefficient of thermal expansion, and breakage and cleavage occur. In particular, solder bumps 79 as external electrodes are formed by solder resist 77, plating 7
8, and the printed board 710, etc., are in contact with materials having different coefficients of expansion. Therefore, due to the difference in the coefficient of thermal expansion, the stress applied to the connection portion between the solder bump 79 and the printed board 710 is large. Cleavage easily occurs.
As one means for preventing the rupture / cleavage phenomenon, by increasing the distance between the printed board 710 and the semiconductor chip 1, the expansion of the semiconductor chip 1, the board 72, and the printed board 710 is prevented. There is a method of alleviating the stress at the connection portion by allowing the connection surface in the direction perpendicular to the connection surface of the substrate 72 and the printed board 710 to be connected. For example, by increasing the thickness of the substrate 72, the distance between the printed board 710 and the semiconductor chip 1 can be increased, and the stress at the connection portion can be reduced.

On the other hand, the manufacturing process of the conventional semiconductor device shown in FIG. 9 includes a bonding process as shown in FIG. 9C. In this bonding process,
After bonding the chip electrode 10 and the substrate 72, the chip electrode 10 is mechanically opened from the substrate 72 side by using a bonding tool 76 and thermocompression combined with ultrasonic waves.

However, as described above, if the thickness of the substrate 72 is reduced in order to reduce the stress at the connection, the ultrasonic connection energy by the bonding tool 76 reaches the connection in the bonding step. A phenomenon occurs in which the material is absorbed by the material around the connection portion, and the connection failure occurs without being transmitted to the chip electrode 10 or the plating 75 as the connection portion. Furthermore, since ultrasonic bonding thermocompression bonding is used in the bonding, as described above, other parts (the substrate 72 and the conductor 741) other than the connection parts are damaged as a result of absorbing the bonding energy. For this reason, there has been a problem that the bonding force around the damaged connection portion is weakened and the stress cannot be sufficiently reduced.

As described above, in the manufacturing process of the conventional semiconductor device shown in FIG. 9, the thickness of the substrate 72 is suppressed to a certain thickness or less in order to avoid a connection failure of the connection part due to the bonding process. There is a need. On the other hand, the substrate 7
When the thickness of the printed circuit board 2 is reduced, the stress applied to the connection portion cannot be reduced.
There has been a problem that the productivity of the semiconductor device is reduced due to a decrease in connection reliability and a decrease in yield due to a problem that breakage and tearing occur at a connection portion with the zero.

In addition to the above, in the manufacturing process of the conventional semiconductor device shown in FIG. 9, as shown in FIG. 9 (h), in order to secure the connection strength between the printed board 710 and the solder bumps 79, the printing is performed. The method includes a step of injecting a reinforcing resin 714 between the plate 710 and the substrate 72 and then heating and curing the resin. A semiconductor chip 1 such as a semiconductor chip or a wiring of a semiconductor device obtained by a manufacturing process including this heating process and a printed board 710
When a defect occurs in the portion sandwiched between the printed circuit boards 710
Since the reinforcing resin 714 is injected and sealed between the substrate and the substrate 72, and the defective portion cannot be repaired, there arises a problem that maintainability is low.

On the other hand, in the conventional method of manufacturing a semiconductor device shown in FIG. 10, a through hole 83 is formed in a substrate 82 by using a laser, and then the substrate 82 and the semiconductor chip 1 are bonded. That is, as shown in FIG. 10F, after mounting the semiconductor chip 1 on the substrate 82, the semiconductor chip 1 is sealed with the sealing material 85. In general, a thermosetting resin is often used for the sealing material 85, and therefore, the bonding process between the semiconductor chip 1 and the sealing material 85 includes a heating process.
Further, in this case, the bonding between the substrate 82 and the semiconductor chip 1 is performed by heating using a positioning mark or the like provided on the substrate 82 and the semiconductor chip 1 for positioning.
However, as described above, the conventional method of manufacturing a semiconductor device shown in FIG. 10 includes a heating step when bonding the substrate 82 and the semiconductor chip 1. In this case, since the coefficient of thermal expansion of the semiconductor chip 1 and the coefficient of thermal expansion of the substrate 82 are different, the semiconductor chip 1 and the substrate 8
2 thermally expand at different rates. For this reason, a deviation occurs between the semiconductor chip 1 and the substrate 82 during the alignment, and the substrate 82 and the semiconductor chip 1 cannot be bonded at a correct position. As described above, if the substrate 82 and the semiconductor chip 1 are not bonded at the correct positions, the connection area decreases, and the connection resistance increases.
Since the bonding force at the connection between the solder bump 89, which is an external electrode, and the printed board 810 is weakened, the connection is liable to break or split. For this reason, there has been a problem that the yield of semiconductor devices is low and productivity is reduced.

The present invention has been made in view of the above problems in the prior art. An object of the present invention is to provide a method of manufacturing a semiconductor device having good productivity and a semiconductor device which can be obtained as a device having a good yield. Also,
An object of the present invention is to provide a method of manufacturing a semiconductor device and a semiconductor device capable of relaxing stress applied to an external electrode. It is a further object of the present invention to provide a method of manufacturing a semiconductor device and a semiconductor device capable of improving maintainability.

[0020]

According to a first aspect of the present invention, which is provided to solve the above problems, a substrate and a semiconductor chip are overlapped with each other, a through hole is formed at a predetermined position of the substrate, and plating is performed. A method of manufacturing a semiconductor device, comprising forming a conductor comprising

According to the method of manufacturing a semiconductor device of the first aspect of the present invention having the above structure, after a substrate and a semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate, and a conductor made of plating is formed. By forming in the through hole,
Since the thickness of the substrate can be made sufficiently large, the space between the printed board and the semiconductor chip can be set sufficiently wide, so that the connection between the substrate and the chip electrode provided on the semiconductor chip can be made. Such stress can be reduced. In a bonding process generally used in a conventional semiconductor device manufacturing process, not only a portion to be connected but also other portions around a connection portion such as a wiring, a conductor, a substrate, etc., and energy at the time of bonding is propagated. Due to the effect of mechanical bonding by a bonding tool that is sometimes used, there has been a problem that the other parts are damaged and as a result, the bonding force around the connection part is reduced. However, according to the method of manufacturing a semiconductor device of the first invention of the present application, since the bonding step is unnecessary, the substrate is connected to the chip electrodes provided on the semiconductor chip without affecting the other parts. Therefore, the stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip, which has been conventionally performed, can be reduced. As described above, it is possible to prevent the occurrence of breakage and tearing at the connection portion, so that the productivity of the semiconductor device can be improved. Further, according to the method of manufacturing a semiconductor device of the first invention of the present application having the above configuration, the inside of a portion between a semiconductor chip such as a semiconductor chip or a wiring and a printed board can be repaired, thereby improving maintainability. Can be achieved.

In the second invention of the present application, after the substrate and the semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate corresponding to the chip electrode provided on the semiconductor chip, and the substrate is formed by plating. A method of manufacturing a semiconductor device, wherein a conductor is formed in the through hole.

According to the method of manufacturing a semiconductor device of the second aspect of the present invention having the above configuration, after the substrate and the semiconductor chip are overlapped, the semiconductor device is placed at a predetermined position on the substrate corresponding to the chip electrode provided on the semiconductor chip. By forming a through hole and forming a conductor made of plating in the through hole, the thickness of the substrate can be made sufficiently large, so that the space between the printed board and the semiconductor chip is set sufficiently wide. Therefore, the stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip can be reduced.
In a bonding process generally used in a conventional semiconductor device manufacturing process, not only a portion to be connected but also other portions around a connection portion such as a wiring, a conductor, a substrate, etc., and energy at the time of bonding is propagated. Due to the effect of mechanical bonding by a bonding tool that is sometimes used, there has been a problem that the other parts are damaged and as a result, the bonding force around the connection part is reduced. However, according to the method of manufacturing a semiconductor device of the second invention of the present application, since the bonding step is unnecessary, the substrate is connected to the chip electrodes provided on the semiconductor chip without affecting the other portions. Because you can
The stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip, which has been conventionally performed, can be reduced. As described above, it is possible to prevent the occurrence of breakage and tearing at the connection portion, so that the productivity of the semiconductor device can be improved. Further, according to the method of manufacturing a semiconductor device of the second invention of the present application having the above configuration, the inside of a portion between a semiconductor chip such as a semiconductor chip or a wiring and a printed board can be repaired, thereby improving maintainability. Can be achieved.

Further, the method of manufacturing a semiconductor device according to the third invention of the present application is the method of manufacturing a semiconductor device of the first or second invention of the present application, wherein the wiring formed by plating is formed on the substrate. It is characterized by being formed integrally with a conductor.

In a conventional method of manufacturing a semiconductor device,
Since the connection with the semiconductor chip was performed using a substrate on which a wiring pattern was previously formed, even if the semiconductor wafer was formed using the same semiconductor chip and substrate,
In order to produce a semiconductor wafer having a different wiring pattern, a connection with a semiconductor chip must be performed for each substrate having a different wiring pattern, and a subsequent manufacturing process must be performed for each substrate having a different wiring pattern. However, according to the method of manufacturing a semiconductor device of the third invention of the present application having the above-described configuration, the substrate and the semiconductor chip are bonded by forming a wiring made of plating integrally with the conductor on the substrate. Later, wiring can be formed on the substrate, so that a semiconductor wafer having various wiring patterns can be formed from a combination of the same semiconductor chip and the substrate, thereby greatly shortening the semiconductor device manufacturing process. can do. As described above, a semiconductor device can be manufactured at low cost. In the conventional method of manufacturing a semiconductor device, a substrate is used in which a conductor is formed in a through hole and then a wiring pattern is formed on the substrate so as to be in contact with the conductor. In this substrate, since the conductor and the wiring are separately formed, when the wiring is formed with impurities adhered on the conductor, the connection at the connection portion is weakened, and cracks and tears are likely to occur. However, according to the method of manufacturing a semiconductor device of the third invention of the present application having the above-described configuration, the wiring made of plating is formed integrally with the conductor on the substrate, so that cracks are formed between the conductor and the wiring. Since no cleavage occurs, a semiconductor device with high connection reliability can be obtained.

Further, the fourth invention of the present application is directed to a method of forming a through hole at a predetermined position on a substrate after superimposing a substrate and a semiconductor chip, a step of filling a resin between the semiconductor chips, Forming a conductor made of plating in the through-hole.

According to the method of manufacturing a semiconductor device of the fourth aspect of the present invention having the above structure, after the substrate and the semiconductor chip are overlaid, a step of forming a through hole at a predetermined position of the substrate is performed. And a step of forming a conductor made of plating in the through-hole, so that the thickness of the substrate can be sufficiently increased, so that the printed board and the semiconductor chip Can be set sufficiently wide, so that the stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip can be reduced. In a bonding process generally used in a conventional semiconductor device manufacturing process, not only a portion to be connected but also other portions around a connection portion such as a wiring, a conductor, a substrate, etc., and energy at the time of bonding is propagated. Due to the effect of mechanical bonding by a bonding tool that is sometimes used, there has been a problem that the other parts are damaged and as a result, the bonding force around the connection part is reduced. However, according to the method of manufacturing a semiconductor device of the fourth invention of the present application, since the bonding step is unnecessary, the substrate and the chip electrode can be connected without affecting the other portions. The stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip can be sufficiently reduced. As described above, it is possible to prevent the occurrence of breakage and tearing at the connection portion, so that the productivity of the semiconductor device can be improved. Further, according to the method of manufacturing a semiconductor device of the fourth invention of the present application, a semiconductor device having a fan-out structure in which external electrodes are provided outside a semiconductor chip can be easily obtained. In addition, since the inside of the portion between the semiconductor chip and the printed board, such as a semiconductor chip or wiring, can be repaired, maintainability can be improved.

The fifth invention of the present application is also directed to a method of forming a through hole at a predetermined position on a substrate after superimposing a substrate and a semiconductor chip, a step of filling a resin between the semiconductor chips, Forming a conductor made of plating in the through-hole and integrally forming a wiring made of plating on the substrate.

According to the method of manufacturing a semiconductor device of the fifth aspect of the present invention having the above structure, after the substrate and the semiconductor chip are overlaid, a step of forming a through hole at a predetermined position of the substrate is performed. And a step of forming a conductor made of plating in the through hole and integrally forming a wiring made of plating on the substrate, thereby reducing the thickness of the substrate. Since the thickness can be made sufficiently large, the space between the printed board and the semiconductor chip can be set sufficiently wide, so that the stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip can be reduced. be able to. In a bonding process generally used in a conventional semiconductor device manufacturing process, not only a portion to be connected but also other portions around a connection portion such as a wiring, a conductor, a substrate, etc., and energy at the time of bonding is propagated. Due to the effect of mechanical bonding by a bonding tool that is sometimes used, there has been a problem that the other parts are damaged and as a result, the bonding force around the connection part is reduced. However, according to the method for manufacturing a semiconductor device of the fifth invention of the present application, since the bonding step is unnecessary, the substrate and the chip electrode can be connected without affecting the other parts. The stress applied to the connection between the substrate and the chip electrode provided on the semiconductor chip can be sufficiently reduced. As described above, since the occurrence of breakage and tearing at the connection portion can be prevented, the productivity of the semiconductor device can be improved. Further, in the conventional method of manufacturing a semiconductor device, since connection with a semiconductor chip is performed using a substrate on which a wiring pattern is previously formed, a semiconductor wafer formed using the same semiconductor chip and substrate is used. Even so, in order to produce a semiconductor wafer having a different wiring pattern, connection with a semiconductor chip must be performed for each substrate having a different wiring pattern, and a subsequent manufacturing process must be performed for each substrate having a different wiring pattern. did not become. However, according to the method for manufacturing a semiconductor device of the fifth invention of the present application having the above configuration, the substrate and the semiconductor chip are bonded by forming the wiring made of plating integrally with the conductor on the substrate. Later, wiring can be formed on the substrate, so that a semiconductor wafer having various wiring patterns can be formed from a combination of the same semiconductor chip and the substrate, thereby greatly shortening the semiconductor device manufacturing process. can do. As described above, a semiconductor device can be manufactured at low cost.
In addition, in a conventional method of manufacturing a semiconductor device, a substrate is used in which a conductor is formed in a through hole and then a wiring pattern is formed on the substrate so as to be in contact with the conductor.
In this board, conductor and wiring are formed separately,
When the wiring was formed with impurities attached to the conductor, the connection at the connection portion was weakened, and cracks and tears were likely to occur. However, according to the method of manufacturing a semiconductor device of the fifth aspect of the present invention having the above-described configuration, a wiring made of plating is formed integrally with the conductor on the substrate, so that a crack or gap is formed between the conductor and the wiring. Since no cleavage occurs, a semiconductor device with high connection reliability can be obtained. Further, since the inside of a portion sandwiched between the semiconductor chip such as a semiconductor chip and a wiring and the printed board can be repaired, maintainability can be improved.

In a sixth aspect of the present invention, there is provided a semiconductor chip having a chip electrode, a through hole provided at a predetermined position, which is adhered to a surface of the semiconductor chip, and plating is provided in the through hole. A substrate on which a conductor is formed, wherein the width of the opening of the through hole on the side of the external electrode is larger than the width of the opening of the through hole on the side of the semiconductor chip. is there.

According to the semiconductor device of the sixth aspect of the present invention having the above structure, a semiconductor chip having chip electrodes and a through hole provided at a predetermined position are adhered to the surface of the semiconductor chip. A substrate in which a conductor by plating is formed in the through-hole, wherein the width of the opening of the through-hole on the external electrode side is larger than the width of the opening of the through-hole on the semiconductor chip side. Since the area of the connection between the conductor and the external electrode can be increased, the connection resistance can be reduced and the coupling strength of the connection can be increased. Thus, the occurrence of breakage or splitting at the connection portion can be prevented, so that a semiconductor device having a good yield can be obtained. Further, since the inside of a portion sandwiched between the semiconductor chip such as a semiconductor chip and a wiring and the printed board can be repaired, a semiconductor device with high maintainability can be obtained.

In a seventh aspect of the present invention, there is provided a semiconductor chip having a chip electrode, wherein a through hole is provided at a predetermined position corresponding to the chip electrode, the through hole being provided at a predetermined position corresponding to the chip electrode. A substrate on which a conductor is formed by wiring by plating, wherein the width of the opening of the through-hole on the external electrode side is larger than the width of the opening of the through-hole on the semiconductor chip side. Semiconductor device.

According to the semiconductor device of the seventh aspect of the present invention having the above configuration, a semiconductor chip having chip electrodes is passed through a predetermined position corresponding to the chip electrodes, the semiconductor chip being bonded to the surface of the semiconductor chip. And a substrate on which the conductor is provided with wiring by plating. The width of the opening of the through-hole on the external electrode side is the width of the opening of the through-hole on the semiconductor chip side. By being larger, the area of the connection between the conductor and the external electrode can be increased, so that the connection resistance can be reduced and
The connection strength of the connection portion can be increased. This allows
Since the occurrence of breakage or cleavage at the connection portion can be prevented, a semiconductor device having a good yield can be obtained. Further, since the inside of a portion sandwiched between the semiconductor chip such as a semiconductor chip and a wiring and the printed board can be repaired, a semiconductor device with high maintainability can be obtained.

The semiconductor device according to the eighth aspect of the present invention includes:
A semiconductor device according to the sixth or seventh invention of the present application, wherein the substrate has a thickness of 50 μm to 350 μm.

According to the semiconductor device of the eighth aspect of the present invention having the above structure, since the thickness of the substrate is 50 μm to 350 μm, the distance between the substrate and the printed board is increased, and Can be sufficiently reduced. Thus, the occurrence of breakage or splitting at the connection portion can be prevented, so that a semiconductor device having a good yield can be obtained.

The semiconductor device according to the ninth invention of the present application is
A semiconductor device according to any one of the sixth to eighth aspects of the present invention, wherein a wiring integrated with the conductor is provided on a substrate.

A conventional semiconductor device has been manufactured using a substrate in which a conductor is formed in a through-hole and then a wiring pattern is formed on the substrate so as to be in contact with the conductor. In this substrate, since the conductor and the wiring are separately formed, when the wiring is formed with impurities adhered on the conductor, the connection at the connection portion is weakened, and cracks and tears are likely to occur. However, according to the semiconductor device of the ninth invention of the present application having the above configuration, since the wiring made of plating is formed integrally with the conductor on the substrate, cracks and tears occur between the conductor and the wiring. Because there is no
A semiconductor device with high connection reliability can be obtained.

The semiconductor device according to the tenth aspect of the present invention is the semiconductor device according to any one of the sixth to ninth aspects of the present invention, wherein the diameter of the through hole is smaller than the width of the chip electrode. Is also set to be large.

According to the semiconductor device of the tenth aspect of the present invention having the above structure, the diameter of the through hole is set to be larger than the width of the chip electrode, so that the strength of the connection portion can be increased, The resistance applied to the connection part can be reduced.

In the semiconductor device according to the eleventh aspect of the present invention, after the substrate and the semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate, and a conductor made of plating is formed in the through hole. And after mounting the external electrode on the conductor,
A semiconductor device obtained by bonding the external electrodes to a printed board, wherein the peel strength between the external electrodes and the printed board is 14 to 18 kgf / cm. .

According to the semiconductor device of the eleventh aspect of the present invention having the above structure, after the substrate and the semiconductor chip are overlapped with each other, a through hole is formed at a predetermined position on the substrate, and the conductor made of plating is passed through the through hole. And mounting the external electrode on the conductor and bonding the external electrode to a printed board, wherein the peel strength between the external electrode and the printed board is 14 to 18 kgf / cm. Accordingly, the stress applied to the connection between the substrate and the printed board can be sufficiently reduced, so that the occurrence of breakage and tearing at the connection can be prevented. Thus, a semiconductor device having a good yield can be obtained.

In the semiconductor device according to the twelfth aspect of the present invention, after the substrate and the semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate, and a conductor made of plating is formed in the through hole. A semiconductor device, wherein the substrate has a thickness of 50 μm to 350 μm.

According to the semiconductor device of the twelfth aspect of the present invention having the above structure, after the substrate and the semiconductor chip are overlapped with each other, a through hole is formed at a predetermined position on the substrate, and the conductor made of plating is passed through the through hole. A semiconductor device obtained by forming the substrate in a substrate, wherein the substrate has a thickness of 50 μm to 350 μm
Accordingly, the distance between the substrate and the printed board increases, and the stress applied to the connection between the substrate and the printed board can be sufficiently reduced. Thus, the occurrence of breakage or splitting at the connection portion can be prevented, so that a semiconductor device having a good yield can be obtained.

[0044]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a method for manufacturing a semiconductor device and a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings, but the following embodiment is merely an example according to the present invention. . (First Embodiment) FIG. 1 is a view showing a manufacturing process of a semiconductor device according to an embodiment of the present invention. FIG. 2 is a diagram showing a semiconductor device according to an embodiment of the present invention. FIG.
FIG. 2 is a diagram showing a semiconductor device according to an example of the present embodiment. FIG. 4 is a diagram illustrating a semiconductor device according to an example of the present embodiment.

The semiconductor device according to the embodiment of the present invention
BGA (Ball Grid Array) or C
It is incorporated in a package such as SP (Chip Size Package), and has a fan-out (Fan-out) in which external electrodes are arranged outside the semiconductor chip surface.
out) structure. In addition, as shown in FIG. 1, the semiconductor device according to the embodiment of the present invention may be configured such that a wiring lead of a conductor repeatedly formed on a tape-shaped substrate and a corresponding portion of an electrode of a semiconductor chip are overlapped. It is manufactured by the TAB method in which a large number of wires are joined by means of means. More specifically, after the electrode pads of the semiconductor chip and the corresponding portions of the inner leads of the substrate are overlapped, thermocompression bonding or ultrasonic wave is used. Inner lead bonding (inner lead bo) bonded by thermocompression bonding
nding) method.

Next, a manufacturing process of the semiconductor device according to the present embodiment will be described with reference to FIG. First, FIG.
As shown in FIG. 1, a substrate 12 is used in manufacturing this semiconductor device. An adhesive 13 is applied to one main surface of the substrate 12. Further, the thickness of the substrate 12 is 50 to
Preferably, the thickness is 350 μm.
More preferably, it is 0 to 100 μm. By setting the thickness of the substrate 12 in this way, the thickness between the substrate 12 and the printed board 110 can be increased, and thus the connection between the substrate 12 and the printed board 110 and the external electrodes described below. The stress applied to the connection between the solder bump 19 and the printed board 110 can be reduced. The substrate 12 is made of an organic resin such as a polyimide resin or an epoxy resin.

Next, as shown in FIG. 1B, the surface of the substrate 12 on which the adhesive 13 is applied and the surface of the semiconductor chip 1 on which the chip electrodes 10 are formed are bonded under heating. Thereafter, as shown in FIG. 1C, a resin is buried between the semiconductor chips 1. Here, an oxide film (SiO2) or the like is generally provided on the surface of the semiconductor chip 1 on which the chip electrodes 10 are provided, in order to protect the semiconductor chip 1, but for simplification, FIG. The description is omitted. Note that the step of embedding the resin 16 between the semiconductor chips 1 is not performed at this time, but a later step described later (see FIG. 1F).
May be performed after performing the above. Further, the substrate 12 is located at a position corresponding to the chip electrode 10 of the semiconductor chip 1 on the substrate 12.
The through hole 11 is formed in the substrate 12 by irradiating a laser beam from the side. In the present embodiment, a UV-YAG (Ultraviolet-Yttr) is used as a laser.
ium Argon Garium). The diameter of the through hole 11 is set to about 10 to 50 μm, and the width of the opening of the through hole 11 on the external electrode (solder bump 19) side is larger than the width of the opening of the through hole on the semiconductor chip side. The shape of the through hole 11 is set to be large.

Next, as shown in FIG.
After a Cu layer 15 having a thickness of about 1 μm is formed as a conductor by sputtering, the Cu layer 15 is subjected to electrolytic plating with a thickness of 10 to 15 μm using Cu to form a wiring 1
4 is formed. The wiring 14 made of plating is
By being formed integrally with the Cu layer 15 as a conductor on the semiconductor device 2, a semiconductor device with high connection reliability can be obtained.

Next, as shown in FIG.
A resist 111 having a predetermined pattern is applied thereon. Further, after exposing and developing the resist 111, pattern etching of Cu on the wiring 14 where the resist 111 is not formed is performed, and then a solder resist 17 is applied. Next, after exposing and developing the solder resist 17, an unexposed portion of the solder resist 17 is removed to form a wiring 1.
An opening 112 is provided at a predetermined position on the upper surface 4. Further, plating 18 is applied in the opening 112 (see FIG. 1F).
In the present embodiment, electroless plating such as Au is used as the plating 18 to a thickness of about 0.1 μm. However, the plating 18 is not limited to the electroless plating. May be used.

Next, as shown in FIG. 1G, a solder bump 19 as an external electrode is mounted on the opening 112 and the solder bump 19 and the opening 112 are connected. An outer shape cutting (dicing) is performed on a portion (here, AA 'plane). Finally, as shown in FIG. 2, the semiconductor device according to the present embodiment is obtained by mounting on a printed board 110.

As shown in FIG. 2, the semiconductor device according to the present embodiment obtained by the process shown in FIG. 1 has a width from the bonding surface between semiconductor chip 1 and adhesive 13 to printed board 110 of about 350. 650 μm, of which the thickness from the bonding surface between the semiconductor chip 1 and the adhesive 13 to the solder resist 17 is about 50 to 350 μm, and the thickness from the solder resist 17 to the printed board 110 is about 3
00 μm. Among them, the semiconductor chip 1 and the adhesive 1
Since the substrate 12 occupies most of the width from the bonding surface to the solder resist 17 to the solder resist 17, the semiconductor chip 1
It can be said that the thickness from the joint surface between the substrate and the adhesive 13 to the solder resist 17 is substantially equal to the substrate 12. Therefore, the thickness of the substrate 12 provided in the semiconductor device according to the present embodiment is preferably 50 to 350 μm, and more preferably 50 to 100 μm in consideration of economy. In the semiconductor device according to the present embodiment, the thickness of the substrate 12 is set to about 50
By setting the thickness to 350 μm, the stress applied to the semiconductor chip 1 and the stress applied to the connection portion between the semiconductor chip 11 and the substrate 12 can be sufficiently reduced.

Further, the semiconductor device according to the present embodiment
The wiring 14 made of plating is formed integrally with the Cu layer 15 as a conductor on the substrate 12,
A semiconductor device with high connection reliability can be obtained.

In the semiconductor device according to the present embodiment shown in FIG. 2, the solder bumps 19 connected to the printed board 110 are pulled in the direction of arrow B, and
As a result of measuring the peel strength at the connection between the solder bump 19 and the solder bump 19 as an external electrode, the peel strength at the connection between the solder bump 19 and the printed board was 14 to 18 k.
gf / cm. On the other hand, the peel strength of the connection portion in the semiconductor device obtained by the conventional manufacturing process shown in FIG. 8 was 12 to 16 kgf / cm. Therefore,
The semiconductor device according to the present embodiment has higher peel strength than a semiconductor device obtained by a conventional process, and thus it is recognized that the residual strain is reduced. As described above, in the semiconductor device according to the present embodiment, it can be said that the strength of the connection between the solder bump 19 and the printed board 110 is improved.

In the present embodiment, the opening 1
12 is provided on the wiring 14 on the substrate 12 and the opening 11
2, the solder bumps 19 are provided. However, as in the semiconductor device shown in FIG.
A structure in which 12 is provided on the wiring 14 provided in the through hole 11 may be adopted. Alternatively, as in the semiconductor device shown in FIG. 4, an opening 312 is provided on the plating provided in the through hole in the same manner as in the semiconductor device shown in FIG. 3, and the diameter of the through hole 31 is made larger than the width of the chip electrode 10. By setting it large, the stress applied to the connection between the semiconductor chip 1 and the substrate 12 can be reduced, and the resistance of the chip electrode 10 can be reduced. FIGS. 3 and 4 show protective films 213 and 31 which are not shown in FIGS. 1 and 2.
3 is shown.

Next, a method of manufacturing a semiconductor device and a semiconductor device according to another embodiment of the present invention will be described with reference to the drawings. (Second Embodiment) FIG. 5 is a view showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. FIG. 6 is a diagram showing a semiconductor device according to an embodiment of the present invention. FIG.
FIG. 7 is a plan view showing one manufacturing step of the semiconductor device according to the embodiment of the present invention. FIG. 8 is a plan view showing one manufacturing step of the semiconductor device according to the embodiment of the present invention.

As shown in FIGS. 5 and 6, the semiconductor device according to this embodiment has a BGA (Ball Grid).
Array) or CSP (Chip Size)
Package), and has a fan-in structure in which external electrodes are arranged inside the semiconductor chip surface. That is, the method of manufacturing the semiconductor device according to the present embodiment is different from the method of manufacturing the semiconductor device according to the first embodiment of the present invention shown in FIG. 1 in that the resin 16 is filled between the semiconductor chips 1. Except for not including the step (the step shown in FIG. 1B), the method is almost the same as the method of manufacturing the semiconductor device according to the first embodiment. Further, in the present embodiment, FIG.
FIG. 7 shows a plan view of the semiconductor wafer 0 in which the through holes 11 are formed on the substrate 12 shown in FIG. The through holes 11 can be formed in the substrate 12 on the semiconductor wafer 0 at a rate of about 20,000 / min.
In the outer shape cutting (dicing) step in FIG. 1 (g), a scratch is made on the surface of the semiconductor wafer 0 according to the direction of the arrow of the cut surface 61 and the cut surface 62 using a diamond cutter or the like, thereby obtaining a semiconductor device shown in FIG. As shown in (1), the semiconductor wafer 0 is divided into individual dies from the cut surface 61 and the cut surface 62. According to the above steps, according to the method of manufacturing a semiconductor device of the present embodiment, as shown in FIG. 6, a semiconductor device having a fan-in structure in which resin 16 is not filled between semiconductor chips 1 can be obtained. it can.

[0057]

As described above, according to the method of manufacturing a semiconductor device according to the present invention, after the substrate and the semiconductor chip are overlapped, a through hole is formed at a predetermined position on the substrate, and the conductor made of plating is formed. By forming in the through hole, the thickness of the substrate can be made sufficiently large, and the space between the printed board and the semiconductor chip can be set sufficiently wide, so that the substrate and the semiconductor chip are provided. The stress applied to the connected portion with the chip electrode can be reduced. As described above, it is possible to prevent the occurrence of breakage and tearing at the connection portion, so that the productivity of the semiconductor device can be improved. Further, since the inside of a portion sandwiched between the semiconductor chip such as a semiconductor chip and a wiring and the printed board can be repaired, a semiconductor device with high maintainability can be obtained.

According to the semiconductor device of the present invention,
A semiconductor chip having a chip electrode, and bonded to a surface of the semiconductor chip, a through hole is provided at a predetermined position,
A substrate on which a conductor formed by plating is formed in the through-hole, and the width of the opening on the external electrode side of the through-hole is
When the width of the through hole is larger than the width of the opening on the semiconductor chip side, the area of the connection portion between the conductor and the external electrode can be increased, so that the connection resistance can be reduced and the connection strength of the connection portion Can be increased. Thus, the occurrence of breakage or splitting at the connection portion can be prevented, so that a semiconductor device having a good yield can be obtained. Further, since the inside of a portion sandwiched between the semiconductor chip such as a semiconductor chip and a wiring and the printed board can be repaired, a semiconductor device with high maintainability can be obtained.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a manufacturing process of a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a semiconductor device according to a first embodiment of the present invention.

FIG. 3 is a diagram illustrating a semiconductor device according to an example of the first embodiment.

FIG. 4 is a diagram showing a semiconductor device according to an example of the first embodiment of the present invention.

FIG. 5 is a diagram illustrating a manufacturing process of a semiconductor device according to a second embodiment of the present invention.

FIG. 6 is a diagram illustrating a semiconductor device according to a second embodiment of the present invention.

FIG. 7 is a plan view showing one manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 8 is a plan view showing one manufacturing step of the semiconductor device according to the second embodiment of the present invention.

FIG. 9 is a diagram illustrating an example of a conventional method for manufacturing a semiconductor device.

FIG. 10 is a diagram illustrating an example of a conventional method for manufacturing a semiconductor device.

[Explanation of symbols]

 0 Semiconductor wafer 1 Semiconductor chip 10 Chip electrode 11, 21, 31, 71, 81 Through hole 12, 72, 82 Substrate 13, 73 Adhesive 14, 74, 84 Wiring 15 Cu layer 16 Resin 17, 77 Solder resist 18, 78 , 88 Plating 19, 79, 89 Solder bumps 110, 710, 810 Printed board 111 Resist 112, 212, 312 Opening 213, 313 Protective film 61, 62 Cut surface 714 Reinforcement resin 741 Conductor 75 Plating 76 Bonding tool 83 Resin residue 841 Copper foil 85 Sealant

Claims (12)

[Claims] 1. A method of manufacturing a semiconductor device, comprising: after laminating a substrate and a semiconductor chip, forming a through hole at a predetermined position on the substrate, and forming a conductor made of plating in the through hole. . 2. After the substrate and the semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate corresponding to a chip electrode provided on the semiconductor chip, and a conductor made of plating is formed in the through hole. A method of manufacturing a semiconductor device. 3. The method of manufacturing a semiconductor device according to claim 1, wherein a wiring made of plating is formed on said substrate integrally with said conductor. 4. A step of forming a through hole at a predetermined position on the substrate after the substrate and the semiconductor chip are superimposed, a step of filling a resin between the semiconductor chips, and a conductor made of plating in the through hole. Forming a semiconductor device. 5. A step of forming a through hole at a predetermined position on a substrate after superimposing a substrate and a semiconductor chip, a step of filling a resin between the semiconductor chips, and a conductor formed of plating in the through hole. And forming a wiring formed by plating on the substrate in an integrated manner. 6. A semiconductor chip having chip electrodes,
A substrate having a through-hole adhered to a surface of the semiconductor chip, a through-hole provided at a predetermined position, and a conductor formed by plating formed in the through-hole; and an opening of the through-hole on an external electrode side. Wherein the width of the through hole is larger than the width of the opening of the through hole on the semiconductor chip side. 7. A semiconductor chip having chip electrodes,
A substrate provided with a through hole adhered to the surface of the semiconductor chip, provided with a through hole at a predetermined position corresponding to the chip electrode, and having a wiring formed by plating on the conductor; The width of the opening on the side of the semiconductor chip is larger than the width of the opening of the through hole on the side of the semiconductor chip. 8. The semiconductor device according to claim 6, wherein the thickness of the substrate is 50 μm to 350 μm. 9. The semiconductor device according to claim 6, wherein a wiring integrated with the conductor is provided on the substrate. 10. The semiconductor device according to claim 6, wherein the diameter of the through hole is set to be larger than the width of the chip electrode. 11. After the substrate and the semiconductor chip are overlaid, a through hole is formed at a predetermined position on the substrate, a conductor made of plating is formed in the through hole, and an external electrode is mounted on the conductor. A semiconductor device obtained by adhering the external electrode to a printed board, wherein the peel strength between the external electrode and the printed board is 14 to 18 kgf / cm. 12. A semiconductor device obtained by superposing a substrate and a semiconductor chip, forming a through hole at a predetermined position on the substrate, and forming a conductor made of plating in the through hole. A semiconductor device, wherein the thickness of the substrate is 50 μm to 350 μm.