JP2000058786A - 半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法 - Google Patents

半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法

Info

Publication number
JP2000058786A
JP2000058786A JP10226790A JP22679098A JP2000058786A JP 2000058786 A JP2000058786 A JP 2000058786A JP 10226790 A JP10226790 A JP 10226790A JP 22679098 A JP22679098 A JP 22679098A JP 2000058786 A JP2000058786 A JP 2000058786A
Authority
JP
Japan
Prior art keywords
film
photoresist film
groove
semiconductor device
forming
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10226790A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000058786A5 (enExample
Inventor
Koji Matsubara
浩司 松原
Shuji Nakao
修治 中尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10226790A priority Critical patent/JP2000058786A/ja
Priority to US09/292,371 priority patent/US6306699B1/en
Publication of JP2000058786A publication Critical patent/JP2000058786A/ja
Priority to US09/819,988 priority patent/US6501118B2/en
Publication of JP2000058786A5 publication Critical patent/JP2000058786A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/01—Manufacture or treatment
    • H10D1/041—Manufacture or treatment of capacitors having no potential barriers
    • H10D1/042—Manufacture or treatment of capacitors having no potential barriers using deposition processes to form electrode extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/60—Capacitors
    • H10D1/68—Capacitors having no potential barriers
    • H10D1/692—Electrodes
    • H10D1/711—Electrodes having non-planar surfaces, e.g. formed by texturisation
    • H10D1/716—Electrodes having non-planar surfaces, e.g. formed by texturisation having vertical extensions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/02—Manufacture or treatment for one transistor one-capacitor [1T-1C] memory cells
    • H10B12/03—Making the capacitor or connections thereto
    • H10B12/033—Making the capacitor or connections thereto the capacitor extending over the transistor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line

Landscapes

  • Semiconductor Memories (AREA)
  • Drying Of Semiconductors (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
JP10226790A 1998-08-11 1998-08-11 半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法 Pending JP2000058786A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10226790A JP2000058786A (ja) 1998-08-11 1998-08-11 半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法
US09/292,371 US6306699B1 (en) 1998-08-11 1999-04-15 Semiconductor device having conducting material film formed in trench, manufacturing method thereof and method of forming resist pattern used therein
US09/819,988 US6501118B2 (en) 1998-08-11 2001-03-29 Semiconductor device having conducting material film formed in trench, manufacturing method thereof and method of forming resist pattern used therein

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10226790A JP2000058786A (ja) 1998-08-11 1998-08-11 半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法

Publications (2)

Publication Number Publication Date
JP2000058786A true JP2000058786A (ja) 2000-02-25
JP2000058786A5 JP2000058786A5 (enExample) 2005-10-27

Family

ID=16850667

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10226790A Pending JP2000058786A (ja) 1998-08-11 1998-08-11 半導体装置と半導体装置の製造方法およびそれに用いるレジストパターン形成方法

Country Status (2)

Country Link
US (2) US6306699B1 (enExample)
JP (1) JP2000058786A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002110961A (ja) * 2000-09-26 2002-04-12 New Japan Radio Co Ltd 電荷結合素子の製造方法
JP2008091793A (ja) * 2006-10-04 2008-04-17 Tohoku Univ 露光方法及び露光装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7009240B1 (en) 2000-06-21 2006-03-07 Micron Technology, Inc. Structures and methods for enhancing capacitors in integrated circuits
KR100390918B1 (ko) * 2001-08-30 2003-07-12 주식회사 하이닉스반도체 반도체 메모리 소자의 제조방법
US6720608B2 (en) * 2002-05-22 2004-04-13 United Microelectronics Corp. Metal-insulator-metal capacitor structure
US6815753B2 (en) * 2002-08-29 2004-11-09 Micron Technology, Inc. Semiconductor capacitor structure and method to form same
US6853024B1 (en) * 2003-10-03 2005-02-08 Taiwan Semiconductor Manufacturing Company, Ltd. Self-aligned MIM capacitor process for embedded DRAM
DE102004041679B4 (de) * 2004-08-20 2009-03-12 Qimonda Ag Verfahren zur lithgraphischen Herstellung einer Struktur in einer strahlungsempfindlichen Schicht und ein strukturiertes Halbleitersubstrat mit Oberflächenstruktur
US7863663B2 (en) * 2006-04-07 2011-01-04 Micron Technology, Inc. Hybrid electrical contact
US20070279231A1 (en) * 2006-06-05 2007-12-06 Hong Kong University Of Science And Technology Asymmetric rfid tag antenna

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH081905B2 (ja) 1988-01-29 1996-01-10 松下電器産業株式会社 自己整合パターン形成方法
KR920000708B1 (ko) 1988-07-22 1992-01-20 현대전자산업 주식회사 포토레지스트 에치백 기술을 이용한 트렌치 캐패시터 형성방법
JPH0341764A (ja) 1989-07-10 1991-02-22 Toshiba Corp 半導体メモリ装置およびその製造方法
US5498889A (en) * 1993-11-29 1996-03-12 Motorola, Inc. Semiconductor device having increased capacitance and method for making the same
JP2830845B2 (ja) * 1996-06-26 1998-12-02 日本電気株式会社 半導体記憶装置
US6156640A (en) * 1998-07-14 2000-12-05 United Microelectronics Corp. Damascene process with anti-reflection coating

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002110961A (ja) * 2000-09-26 2002-04-12 New Japan Radio Co Ltd 電荷結合素子の製造方法
JP2008091793A (ja) * 2006-10-04 2008-04-17 Tohoku Univ 露光方法及び露光装置

Also Published As

Publication number Publication date
US6306699B1 (en) 2001-10-23
US6501118B2 (en) 2002-12-31
US20010010378A1 (en) 2001-08-02

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