JP2000021754A5 - - Google Patents

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Publication number
JP2000021754A5
JP2000021754A5 JP1998201334A JP20133498A JP2000021754A5 JP 2000021754 A5 JP2000021754 A5 JP 2000021754A5 JP 1998201334 A JP1998201334 A JP 1998201334A JP 20133498 A JP20133498 A JP 20133498A JP 2000021754 A5 JP2000021754 A5 JP 2000021754A5
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JP
Japan
Prior art keywords
reticle
alignment
wafer
marks
exchanged
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JP1998201334A
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JP2000021754A (ja
JP3984710B2 (ja
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Priority to JP20133498A priority Critical patent/JP3984710B2/ja
Priority claimed from JP20133498A external-priority patent/JP3984710B2/ja
Publication of JP2000021754A publication Critical patent/JP2000021754A/ja
Publication of JP2000021754A5 publication Critical patent/JP2000021754A5/ja
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Publication of JP3984710B2 publication Critical patent/JP3984710B2/ja
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Expired - Fee Related legal-status Critical Current

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Description

レチクル３はパターンが異なるレチクル（第２マスク）１３と交換可能となっており、レチクル３とレチクル１３とを交換してウエハ７上の同一領域を多重露光（二重露光）している。２は照明系であり、超高圧水銀灯やエキシマレーザ等からの露光光でレチクル３（１３）を照明している。８はレチクルアライメント検出系であり、例えば図２，図３に示すようなレチクルアライメントマーク２２（３２）を検出してそのアライメント信号を中央処理系６に入力している。
これによって後述するようにウエハ面上に微細パターン（回路パターン）を形成している。このときの２重露光プロセスにおいて図２，図３に示すレチクル３又は／及び１３に設けたアライメントマーク２２又は／及び３２をウエハ（感光基板）７上に投影露光してアライメントマーク（ＡＡマーク）を形成している。
JP20133498A 1998-06-30 1998-06-30 露光方法及び露光装置 Expired - Fee Related JP3984710B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20133498A JP3984710B2 (ja) 1998-06-30 1998-06-30 露光方法及び露光装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20133498A JP3984710B2 (ja) 1998-06-30 1998-06-30 露光方法及び露光装置

Publications (3)

Publication Number Publication Date
JP2000021754A JP2000021754A (ja) 2000-01-21
JP2000021754A5 true JP2000021754A5 (ja) 2005-04-14
JP3984710B2 JP3984710B2 (ja) 2007-10-03

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Family Applications (1)

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JP20133498A Expired - Fee Related JP3984710B2 (ja) 1998-06-30 1998-06-30 露光方法及び露光装置

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JP (1) JP3984710B2 (ja)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW541605B (en) * 2000-07-07 2003-07-11 Hitachi Ltd Fabrication method of semiconductor integrated circuit device
US7687209B2 (en) 2006-03-21 2010-03-30 Asml Netherlands B.V. Lithographic apparatus and device manufacturing method with double exposure overlay control
NL2003762A (en) * 2008-11-18 2010-05-20 Asml Netherlands Bv Lithographic apparatus and device manufacturing method.
US9087982B2 (en) 2013-11-18 2015-07-21 Tdk Corporation Manufacturing method for pattern multilayer body and mask set
EP3237973B1 (en) * 2014-12-22 2019-08-21 Eulitha A.G. Method for printing colour images

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