JP2000013206A - クロックモニタ回路及び同期式半導体メモリ装置 - Google Patents
クロックモニタ回路及び同期式半導体メモリ装置Info
- Publication number
- JP2000013206A JP2000013206A JP10273615A JP27361598A JP2000013206A JP 2000013206 A JP2000013206 A JP 2000013206A JP 10273615 A JP10273615 A JP 10273615A JP 27361598 A JP27361598 A JP 27361598A JP 2000013206 A JP2000013206 A JP 2000013206A
- Authority
- JP
- Japan
- Prior art keywords
- clock signal
- delay
- level
- signal
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/225—Clock input buffers
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
- G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management
- G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/19—Monitoring patterns of pulse trains
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/22—Control and timing of internal memory operations
- G11C2207/2227—Standby or low power modes
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Manipulation Of Pulses (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR98-19831 | 1998-05-29 | ||
| KR1019980019831A KR100286099B1 (ko) | 1998-05-29 | 1998-05-29 | 클럭모니터회로및이를이용한동기식반도체메모리장치 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000013206A true JP2000013206A (ja) | 2000-01-14 |
| JP2000013206A5 JP2000013206A5 (https=) | 2005-10-27 |
Family
ID=19537913
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10273615A Pending JP2000013206A (ja) | 1998-05-29 | 1998-09-28 | クロックモニタ回路及び同期式半導体メモリ装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6307412B1 (https=) |
| JP (1) | JP2000013206A (https=) |
| KR (1) | KR100286099B1 (https=) |
| TW (1) | TW420905B (https=) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009519620A (ja) * | 2005-10-31 | 2009-05-14 | クゥアルコム・インコーポレイテッド | 電子デバイスのための適応電圧スケーリング |
| US10587253B1 (en) | 2018-11-29 | 2020-03-10 | Qualcomm Incorporated | Ring oscillator-based programmable delay line |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6552578B1 (en) | 2002-06-10 | 2003-04-22 | Pericom Semiconductor Corp. | Power down circuit detecting duty cycle of input signal |
| EP1538752A1 (en) * | 2003-11-28 | 2005-06-08 | Freescale Semiconductor, Inc. | Clock pulse generator apparatus with reduced jitter clock phase |
| KR100917619B1 (ko) | 2007-11-09 | 2009-09-17 | 주식회사 하이닉스반도체 | 반도체 소자와 그의 구동 방법 |
| EP2387823B1 (en) * | 2009-01-15 | 2020-09-09 | Linear Technology Corporation | Pulse-width modulation (pwm) with independently adjustable duty cycle and frequency using two adjustable delays |
| US10453414B2 (en) * | 2017-08-16 | 2019-10-22 | Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd | GOA circuit and LCD device |
| KR102833955B1 (ko) | 2020-01-10 | 2025-07-15 | 삼성전자주식회사 | 호스트 장치로부터의 레퍼런스 클럭에 기반하여 전력 상태를 변경하도록 구성되는 스토리지 장치 및 그 동작 방법 |
| CN112466357A (zh) * | 2020-12-07 | 2021-03-09 | 普冉半导体(上海)股份有限公司 | 存储器数据读取系统 |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62173692A (ja) * | 1986-01-28 | 1987-07-30 | Fujitsu Ltd | 半導体集積回路 |
| US4988901A (en) * | 1988-04-15 | 1991-01-29 | Sharp Kabushiki Kaisha | Pulse detecting device for detecting and outputting a pulse signal related to the slower frequency input pulse |
| KR920005672Y1 (ko) * | 1990-04-17 | 1992-08-18 | 삼성전자 주식회사 | 숄더노이즈 제거회로 |
| US5184032A (en) * | 1991-04-25 | 1993-02-02 | Texas Instruments Incorporated | Glitch reduction in integrated circuits, systems and methods |
| US5146110A (en) * | 1991-05-22 | 1992-09-08 | Samsung Electronics Co., Ltd. | Semiconductor memory with substrate voltage generating circuit for removing unwanted substrate current during precharge cycle memory mode of operation |
| KR950004855B1 (ko) * | 1992-10-30 | 1995-05-15 | 현대전자산업 주식회사 | 반도체 메모리 소자의 어드레스 전이 검출 회로 |
| US6078193A (en) * | 1998-04-06 | 2000-06-20 | Graychip, Inc. | Apparatus and method for providing a static mode for dynamic logic circuits |
-
1998
- 1998-05-29 KR KR1019980019831A patent/KR100286099B1/ko not_active Expired - Fee Related
- 1998-09-28 JP JP10273615A patent/JP2000013206A/ja active Pending
- 1998-11-19 TW TW087119178A patent/TW420905B/zh not_active IP Right Cessation
-
1999
- 1999-06-01 US US09/323,590 patent/US6307412B1/en not_active Expired - Lifetime
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009519620A (ja) * | 2005-10-31 | 2009-05-14 | クゥアルコム・インコーポレイテッド | 電子デバイスのための適応電圧スケーリング |
| US10587253B1 (en) | 2018-11-29 | 2020-03-10 | Qualcomm Incorporated | Ring oscillator-based programmable delay line |
Also Published As
| Publication number | Publication date |
|---|---|
| KR19990086718A (ko) | 1999-12-15 |
| KR100286099B1 (ko) | 2001-04-16 |
| US6307412B1 (en) | 2001-10-23 |
| TW420905B (en) | 2001-02-01 |
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