JP2000012687A - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法

Info

Publication number
JP2000012687A
JP2000012687A JP10176166A JP17616698A JP2000012687A JP 2000012687 A JP2000012687 A JP 2000012687A JP 10176166 A JP10176166 A JP 10176166A JP 17616698 A JP17616698 A JP 17616698A JP 2000012687 A JP2000012687 A JP 2000012687A
Authority
JP
Japan
Prior art keywords
silicon
oxide film
semiconductor substrate
film
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10176166A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000012687A5 (enExample
Inventor
Masakazu Okada
昌和 岡田
Keiichi Higashiya
恵市 東谷
Hikari Kawashima
光 川島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10176166A priority Critical patent/JP2000012687A/ja
Priority to US09/208,477 priority patent/US6531737B2/en
Priority to DE19907070A priority patent/DE19907070C2/de
Priority to KR1019990005989A priority patent/KR100328536B1/ko
Publication of JP2000012687A publication Critical patent/JP2000012687A/ja
Publication of JP2000012687A5 publication Critical patent/JP2000012687A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76831Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes)
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body (electrodes) consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Element Separation (AREA)
JP10176166A 1998-06-23 1998-06-23 半導体装置及びその製造方法 Pending JP2000012687A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP10176166A JP2000012687A (ja) 1998-06-23 1998-06-23 半導体装置及びその製造方法
US09/208,477 US6531737B2 (en) 1998-06-23 1998-12-10 Semiconductor device having an improved interlayer contact and manufacturing method thereof
DE19907070A DE19907070C2 (de) 1998-06-23 1999-02-19 Halbleiterkontakt und zugehöriges Herstellungsverfahren
KR1019990005989A KR100328536B1 (ko) 1998-06-23 1999-02-23 향상된 층간 콘택을 가지는 반도체 디바이스

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10176166A JP2000012687A (ja) 1998-06-23 1998-06-23 半導体装置及びその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2008257553A Division JP2009065176A (ja) 2008-10-02 2008-10-02 半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
JP2000012687A true JP2000012687A (ja) 2000-01-14
JP2000012687A5 JP2000012687A5 (enExample) 2005-10-20

Family

ID=16008827

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10176166A Pending JP2000012687A (ja) 1998-06-23 1998-06-23 半導体装置及びその製造方法

Country Status (4)

Country Link
US (1) US6531737B2 (enExample)
JP (1) JP2000012687A (enExample)
KR (1) KR100328536B1 (enExample)
DE (1) DE19907070C2 (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020002007A (ko) * 2000-06-29 2002-01-09 박종섭 반도체 소자의 콘택홀 형성방법
JP2002134705A (ja) * 2000-10-25 2002-05-10 Sony Corp 半導体装置
JP2003037115A (ja) * 2001-07-25 2003-02-07 Nec Corp 半導体装置の製造方法
KR100743957B1 (ko) * 2004-03-19 2007-07-30 가부시키가이샤 리코 용기 수납 장치, 이송 장치, 화상 형성 장치 및 용기 고정방법

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6335249B1 (en) * 2000-02-07 2002-01-01 Taiwan Semiconductor Manufacturing Company Salicide field effect transistors with improved borderless contact structures and a method of fabrication
US7049667B2 (en) 2002-09-27 2006-05-23 Hrl Laboratories, Llc Conductive channel pseudo block process and circuit to inhibit reverse engineering
US6979606B2 (en) * 2002-11-22 2005-12-27 Hrl Laboratories, Llc Use of silicon block process step to camouflage a false transistor
WO2004055868A2 (en) * 2002-12-13 2004-07-01 Hrl Laboratories, Llc Integrated circuit modification using well implants
US7242063B1 (en) 2004-06-29 2007-07-10 Hrl Laboratories, Llc Symmetric non-intrusive and covert technique to render a transistor permanently non-operable
KR100683852B1 (ko) * 2004-07-02 2007-02-15 삼성전자주식회사 반도체 소자의 마스크롬 소자 및 그 형성 방법
US8168487B2 (en) 2006-09-28 2012-05-01 Hrl Laboratories, Llc Programmable connection and isolation of active regions in an integrated circuit using ambiguous features to confuse a reverse engineer
US8664050B2 (en) * 2012-03-20 2014-03-04 International Business Machines Corporation Structure and method to improve ETSOI MOSFETS with back gate
CN103594417A (zh) * 2012-08-13 2014-02-19 中芯国际集成电路制造(上海)有限公司 互连结构的制作方法
US9029940B2 (en) 2013-01-18 2015-05-12 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell
US9159826B2 (en) 2013-01-18 2015-10-13 Taiwan Semiconductor Manufacturing Company, Ltd. Vertical tunneling field-effect transistor cell and fabricating the same
US10534045B2 (en) * 2017-09-20 2020-01-14 Texas Instruments Incorporated Vertical hall-effect sensor for detecting two-dimensional in-plane magnetic fields

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4566914A (en) 1983-05-13 1986-01-28 Micro Power Systems, Inc. Method of forming localized epitaxy and devices formed therein
SE8603126L (sv) 1985-08-05 1987-02-06 Rca Corp Cmos-integrerad krets och metod att tillverka en sadan
JPS62190847A (ja) 1986-02-18 1987-08-21 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
DE4337355C2 (de) 1993-11-02 1997-08-21 Siemens Ag Verfahren zur Herstellung eines Kontaktlochs zu einem dotierten Bereich
US5492858A (en) * 1994-04-20 1996-02-20 Digital Equipment Corporation Shallow trench isolation process for high aspect ratio trenches
KR0126640B1 (ko) 1994-05-07 1998-04-02 김주용 반도체소자 및 그 제조방법
WO1996024160A2 (en) 1995-01-30 1996-08-08 Philips Electronics N.V. Method of manufacturing a semiconductor device with a semiconductor body with field insulation regions provided with recessed connection conductors
JP3022744B2 (ja) * 1995-02-21 2000-03-21 日本電気株式会社 半導体装置及びその製造方法
US5652176A (en) * 1995-02-24 1997-07-29 Motorola, Inc. Method for providing trench isolation and borderless contact
JPH08277938A (ja) 1995-04-06 1996-10-22 Daihatsu Motor Co Ltd オイルフィラーキャップのシール構造
US5976769A (en) * 1995-07-14 1999-11-02 Texas Instruments Incorporated Intermediate layer lithography
DE19629736C2 (de) 1996-01-26 2000-12-14 Mitsubishi Electric Corp Halbleitereinrichtung mit selbstjustierendem Kontakt und Herstellungsverfahren dafür
US5703391A (en) 1996-06-27 1997-12-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having element isolating insulating film in contact hole
JP2924814B2 (ja) * 1996-09-26 1999-07-26 日本電気株式会社 半導体装置の製造方法
JPH10106973A (ja) 1996-09-27 1998-04-24 Nec Corp 半導体装置およびその製造方法
US6018180A (en) * 1997-12-23 2000-01-25 Advanced Micro Devices, Inc. Transistor formation with LI overetch immunity
US6018184A (en) * 1998-01-22 2000-01-25 Micron Technology, Inc. Semiconductor structure useful in a self-aligned contact having multiple insulation layers of non-uniform thickness

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20020002007A (ko) * 2000-06-29 2002-01-09 박종섭 반도체 소자의 콘택홀 형성방법
JP2002134705A (ja) * 2000-10-25 2002-05-10 Sony Corp 半導体装置
JP2003037115A (ja) * 2001-07-25 2003-02-07 Nec Corp 半導体装置の製造方法
KR100743957B1 (ko) * 2004-03-19 2007-07-30 가부시키가이샤 리코 용기 수납 장치, 이송 장치, 화상 형성 장치 및 용기 고정방법

Also Published As

Publication number Publication date
KR100328536B1 (ko) 2002-03-25
DE19907070C2 (de) 2003-08-21
DE19907070A1 (de) 2000-01-13
KR20000005599A (ko) 2000-01-25
US20010042892A1 (en) 2001-11-22
US6531737B2 (en) 2003-03-11

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