IT964778B - Elemento di memoria a semicondut tore - Google Patents

Elemento di memoria a semicondut tore

Info

Publication number
IT964778B
IT964778B IT6940972A IT6940972A IT964778B IT 964778 B IT964778 B IT 964778B IT 6940972 A IT6940972 A IT 6940972A IT 6940972 A IT6940972 A IT 6940972A IT 964778 B IT964778 B IT 964778B
Authority
IT
Italy
Prior art keywords
semiconductor memory
memory element
semiconductor
memory
Prior art date
Application number
IT6940972A
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Application granted granted Critical
Publication of IT964778B publication Critical patent/IT964778B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/788Field effect transistors with field effect produced by an insulated gate with floating gate
    • H01L29/7881Programmable transistors with only two possible levels of programmation
    • H01L29/7884Programmable transistors with only two possible levels of programmation charging by hot carrier injection
    • H01L29/7886Hot carrier produced by avalanche breakdown of a PN junction, e.g. FAMOS
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/04Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0433Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing a single floating gate transistor and one or more separate select transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/0883Combination of depletion and enhancement field effect transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
IT6940972A 1971-07-28 1972-07-25 Elemento di memoria a semicondut tore IT964778B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB3540071A GB1392599A (en) 1971-07-28 1971-07-28 Semiconductor memory elements

Publications (1)

Publication Number Publication Date
IT964778B true IT964778B (it) 1974-01-31

Family

ID=10377308

Family Applications (1)

Application Number Title Priority Date Filing Date
IT6940972A IT964778B (it) 1971-07-28 1972-07-25 Elemento di memoria a semicondut tore

Country Status (9)

Country Link
US (1) US3952325A (it)
JP (1) JPS523279B1 (it)
AU (1) AU474357B2 (it)
CA (1) CA960365A (it)
DE (1) DE2235533C3 (it)
FR (1) FR2147308B1 (it)
GB (1) GB1392599A (it)
IT (1) IT964778B (it)
NL (1) NL173105C (it)

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DE2812049C2 (de) * 1974-09-20 1982-05-27 Siemens AG, 1000 Berlin und 8000 München n-Kanal-Speicher-FET
US4087795A (en) * 1974-09-20 1978-05-02 Siemens Aktiengesellschaft Memory field effect storage device
DE2638730C2 (de) * 1974-09-20 1982-10-28 Siemens AG, 1000 Berlin und 8000 München n-Kanal-Speicher-FET, Verfahren zum Entladen des Speichergate des n-Kanal-Speicher-FET und Verwendung des n-Kanal-Speicher-FET
DE2445079C3 (de) * 1974-09-20 1981-06-04 Siemens AG, 1000 Berlin und 8000 München Speicher-Feldeffekttransistor
US3987474A (en) * 1975-01-23 1976-10-19 Massachusetts Institute Of Technology Non-volatile charge storage elements and an information storage apparatus employing such elements
DE2560220C2 (de) * 1975-03-25 1982-11-25 Siemens AG, 1000 Berlin und 8000 München n-Kanal-Speicher-FET
US4070667A (en) * 1975-11-03 1978-01-24 General Electric Company Charge transfer analog-to-digital converter
US4070652A (en) * 1975-11-14 1978-01-24 Westinghouse Electric Corporation Acousto-electric signal convolver, correlator and memory
US4080718A (en) * 1976-12-14 1978-03-28 Smc Standard Microsystems Corporation Method of modifying electrical characteristics of MOS devices using ion implantation
US4161039A (en) * 1976-12-15 1979-07-10 Siemens Aktiengesellschaft N-Channel storage FET
US4302764A (en) * 1976-12-30 1981-11-24 International Business Machines Corporation Nondestructive read-out dynamic memory cell
DE2706155A1 (de) * 1977-02-14 1978-08-17 Siemens Ag In integrierter technik hergestellter elektronischer speicher
US4197144A (en) * 1978-09-21 1980-04-08 General Electric Company Method for improving writing of information in memory targets
US4262298A (en) * 1979-09-04 1981-04-14 Burroughs Corporation Ram having a stabilized substrate bias and low-threshold narrow-width transfer gates
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US5243210A (en) * 1987-02-21 1993-09-07 Kabushiki Kaisha Toshiba Semiconductor memory device and manufacturing method thereof
WO1994000881A1 (en) * 1992-06-19 1994-01-06 Lattice Semiconductor Corporation Single polysilicon layer flash e2prom cell
US5359573A (en) * 1992-06-19 1994-10-25 Lattice Semiconductor Corporation Flash E2 PROM array with mingle polysilicon layer memory cell
US5418390A (en) * 1993-03-19 1995-05-23 Lattice Semiconductor Corporation Single polysilicon layer E2 PROM cell
US5539233A (en) * 1993-07-22 1996-07-23 Texas Instruments Incorporated Controlled low collector breakdown voltage vertical transistor for ESD protection circuits
JP3878681B2 (ja) * 1995-06-15 2007-02-07 株式会社ルネサステクノロジ 不揮発性半導体記憶装置
US5777361A (en) * 1996-06-03 1998-07-07 Motorola, Inc. Single gate nonvolatile memory cell and method for accessing the same
US6768165B1 (en) * 1997-08-01 2004-07-27 Saifun Semiconductors Ltd. Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping
US6137722A (en) * 1998-04-01 2000-10-24 National Semiconductor Corporation Memory array having Frohmann-Bentchkowsky EPROM cells with a reduced number of access transistors
US6157574A (en) * 1998-04-01 2000-12-05 National Semiconductor Corporation Erasable frohmann-bentchkowsky memory transistor that stores multiple bits of data
US6137723A (en) * 1998-04-01 2000-10-24 National Semiconductor Corporation Memory device having erasable Frohmann-Bentchkowsky EPROM cells that use a well-to-floating gate coupled voltage during erasure
US6130840A (en) * 1998-04-01 2000-10-10 National Semiconductor Corporation Memory cell having an erasable Frohmann-Bentchkowsky memory transistor
US6141246A (en) * 1998-04-01 2000-10-31 National Semiconductor Corporation Memory device with sense amplifier that sets the voltage drop across the cells of the device
US6137721A (en) * 1998-04-01 2000-10-24 National Semiconductor Corporation Memory device having erasable frohmann-bentchkowsky EPROM cells that use a plate-to-floating gate coupled voltage during erasure
US6081451A (en) * 1998-04-01 2000-06-27 National Semiconductor Corporation Memory device that utilizes single-poly EPROM cells with CMOS compatible programming voltages
US6118691A (en) * 1998-04-01 2000-09-12 National Semiconductor Corporation Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
US6055185A (en) * 1998-04-01 2000-04-25 National Semiconductor Corporation Single-poly EPROM cell with CMOS compatible programming voltages
US6348711B1 (en) * 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
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US6614692B2 (en) * 2001-01-18 2003-09-02 Saifun Semiconductors Ltd. EEPROM array and method for operation thereof
US6584017B2 (en) 2001-04-05 2003-06-24 Saifun Semiconductors Ltd. Method for programming a reference cell
US6700818B2 (en) 2002-01-31 2004-03-02 Saifun Semiconductors Ltd. Method for operating a memory device
US6917544B2 (en) 2002-07-10 2005-07-12 Saifun Semiconductors Ltd. Multiple use memory chip
US7136304B2 (en) 2002-10-29 2006-11-14 Saifun Semiconductor Ltd Method, system and circuit for programming a non-volatile memory array
US7178004B2 (en) 2003-01-31 2007-02-13 Yan Polansky Memory array programming circuit and a method for using the circuit
US7142464B2 (en) 2003-04-29 2006-11-28 Saifun Semiconductors Ltd. Apparatus and methods for multi-level sensing in a memory array
US7123532B2 (en) 2003-09-16 2006-10-17 Saifun Semiconductors Ltd. Operating array cells with matched reference cells
US7484329B2 (en) 2003-11-20 2009-02-03 Seaweed Bio-Technology Inc. Technology for cultivation of Porphyra and other seaweeds in land-based sea water ponds
US7102191B2 (en) * 2004-03-24 2006-09-05 Micron Technologies, Inc. Memory device with high dielectric constant gate dielectrics and metal floating gates
US7317633B2 (en) 2004-07-06 2008-01-08 Saifun Semiconductors Ltd Protection of NROM devices from charge damage
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US7638850B2 (en) 2004-10-14 2009-12-29 Saifun Semiconductors Ltd. Non-volatile memory structure and method of fabrication
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US7221138B2 (en) 2005-09-27 2007-05-22 Saifun Semiconductors Ltd Method and apparatus for measuring charge pump output current
US20070087503A1 (en) * 2005-10-17 2007-04-19 Saifun Semiconductors, Ltd. Improving NROM device characteristics using adjusted gate work function
US20070102789A1 (en) * 2005-11-09 2007-05-10 International Business Machines Corporation Bipolar transistor and back-gated transistor structure and method
US7352627B2 (en) 2006-01-03 2008-04-01 Saifon Semiconductors Ltd. Method, system, and circuit for operating a non-volatile memory array
US7808818B2 (en) 2006-01-12 2010-10-05 Saifun Semiconductors Ltd. Secondary injection for NROM
US8253452B2 (en) 2006-02-21 2012-08-28 Spansion Israel Ltd Circuit and method for powering up an integrated circuit and an integrated circuit utilizing same
US7692961B2 (en) 2006-02-21 2010-04-06 Saifun Semiconductors Ltd. Method, circuit and device for disturb-control of programming nonvolatile memory cells by hot-hole injection (HHI) and by channel hot-electron (CHE) injection
US7760554B2 (en) 2006-02-21 2010-07-20 Saifun Semiconductors Ltd. NROM non-volatile memory and mode of operation
US7638835B2 (en) 2006-02-28 2009-12-29 Saifun Semiconductors Ltd. Double density NROM with nitride strips (DDNS)
US7701779B2 (en) 2006-04-27 2010-04-20 Sajfun Semiconductors Ltd. Method for programming a reference cell
US7605579B2 (en) 2006-09-18 2009-10-20 Saifun Semiconductors Ltd. Measuring and controlling current consumption and output current of charge pumps
US8320191B2 (en) 2007-08-30 2012-11-27 Infineon Technologies Ag Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
JP2013077780A (ja) * 2011-09-30 2013-04-25 Seiko Instruments Inc 半導体記憶装置及び半導体記憶素子
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US3728695A (en) * 1971-10-06 1973-04-17 Intel Corp Random-access floating gate mos memory array

Also Published As

Publication number Publication date
JPS523279B1 (it) 1977-01-27
NL173105B (nl) 1983-07-01
US3952325A (en) 1976-04-20
DE2235533C3 (de) 1978-06-22
NL7210169A (it) 1973-01-30
GB1392599A (en) 1975-04-30
DE2235533A1 (de) 1973-02-08
AU474357B2 (en) 1976-07-22
NL173105C (nl) 1983-12-01
AU4483272A (en) 1974-01-24
DE2235533B2 (de) 1977-10-06
CA960365A (en) 1974-12-31
FR2147308B1 (it) 1976-08-13
FR2147308A1 (it) 1973-03-09

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