IT960176B - Processo prodotto e composizione per la metallizzazione in cavita di unita complete a semicondut tore - Google Patents

Processo prodotto e composizione per la metallizzazione in cavita di unita complete a semicondut tore

Info

Publication number
IT960176B
IT960176B IT26486/72A IT2648672A IT960176B IT 960176 B IT960176 B IT 960176B IT 26486/72 A IT26486/72 A IT 26486/72A IT 2648672 A IT2648672 A IT 2648672A IT 960176 B IT960176 B IT 960176B
Authority
IT
Italy
Prior art keywords
product
composition process
semiconductor units
complete semiconductor
cavity
Prior art date
Application number
IT26486/72A
Other languages
English (en)
Italian (it)
Original Assignee
Du Pont
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Du Pont filed Critical Du Pont
Application granted granted Critical
Publication of IT960176B publication Critical patent/IT960176B/it

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H10W76/15—Containers comprising an insulating or insulated base
    • H10W76/157—Containers comprising an insulating or insulated base having interconnections parallel to the insulating or insulated base
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H10W72/01961—Chemical or physical modification, e.g. by sintering or anodisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.

Landscapes

  • Die Bonding (AREA)
  • Chemically Coating (AREA)
IT26486/72A 1971-11-15 1972-06-30 Processo prodotto e composizione per la metallizzazione in cavita di unita complete a semicondut tore IT960176B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US19858471A 1971-11-15 1971-11-15

Publications (1)

Publication Number Publication Date
IT960176B true IT960176B (it) 1973-11-20

Family

ID=22733982

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26486/72A IT960176B (it) 1971-11-15 1972-06-30 Processo prodotto e composizione per la metallizzazione in cavita di unita complete a semicondut tore

Country Status (5)

Country Link
US (1) US3793064A (https=)
JP (1) JPS4859775A (https=)
DE (1) DE2234461A1 (https=)
FR (1) FR2160360B1 (https=)
IT (1) IT960176B (https=)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1490978A (en) * 1973-12-21 1977-11-09 Marconi Co Ltd Light emitting diode(led)arrays
US3903344A (en) * 1974-02-26 1975-09-02 Rca Corp Adherent solderable cermet conductor
US3914858A (en) * 1974-08-23 1975-10-28 Nitto Electric Ind Co Method of making sealed cavity molded semiconductor devices
US4025716A (en) * 1975-01-30 1977-05-24 Burroughs Corporation Dual in-line package with window frame
JPS5211154A (en) * 1975-07-17 1977-01-27 Shoei Chemical Ind Co Electrode material for wire welding
US4142203A (en) * 1976-12-20 1979-02-27 Avx Corporation Method of assembling a hermetically sealed semiconductor unit
JPS5762539A (en) * 1980-10-01 1982-04-15 Hitachi Ltd Mounting method for semiconductor element
US4399707A (en) * 1981-02-04 1983-08-23 Honeywell, Inc. Stress sensitive semiconductor unit and housing means therefor
JPS5893358A (ja) * 1981-11-30 1983-06-03 Mitsubishi Electric Corp 半導体装置
JPS584957A (ja) * 1982-06-22 1983-01-12 Nec Kyushu Ltd 半導体装置
DE3382727D1 (de) * 1982-06-30 1994-01-27 Fujitsu Ltd Integrierte Halbleiterschaltungsanordnung.
EP0266210B1 (en) * 1986-10-29 1993-02-17 Kabushiki Kaisha Toshiba Electronic apparatus comprising a ceramic substrate
US4860443A (en) * 1987-01-21 1989-08-29 Hughes Aircraft Company Method for connecting leadless chip package
US4993148A (en) * 1987-05-19 1991-02-19 Mitsubishi Denki Kabushiki Kaisha Method of manufacturing a circuit board
US5036584A (en) * 1989-06-13 1991-08-06 Texas Instruments Incorporated Method of manufacture of copper cored enclosures for hybrid circuits
US5089439A (en) * 1990-02-02 1992-02-18 Hughes Aircraft Company Process for attaching large area silicon-backed chips to gold-coated surfaces
US5360942A (en) * 1993-11-16 1994-11-01 Olin Corporation Multi-chip electronic package module utilizing an adhesive sheet
JP3120703B2 (ja) * 1995-08-07 2000-12-25 株式会社村田製作所 導電性ペースト及び積層セラミック電子部品
US6020646A (en) * 1997-12-05 2000-02-01 The Charles Stark Draper Laboratory, Inc. Intergrated circuit die assembly
JP3776907B2 (ja) * 2003-11-21 2006-05-24 ローム株式会社 回路基板
TWI446495B (zh) * 2011-01-19 2014-07-21 旭德科技股份有限公司 封裝載板及其製作方法
US9560781B2 (en) * 2013-07-19 2017-01-31 Materion Corporation Metal cap assembly for optical communications

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3347799A (en) * 1964-07-16 1967-10-17 Du Pont Gold-palladium conductor compositions and conductors made therefrom
BE679454A (https=) * 1965-04-26 1966-09-16
DE1646882B1 (de) * 1965-07-29 1970-11-19 Du Pont Edelmetallmasse zum Aufbrennen auf keramische Traeger
US3385799A (en) * 1965-11-09 1968-05-28 Du Pont Metalizing compositions
US3520054A (en) * 1967-11-13 1970-07-14 Mitronics Inc Method of making multilevel metallized ceramic bodies for semiconductor packages
US3458930A (en) * 1967-12-07 1969-08-05 Zenith Radio Corp Leadless inverted device forming process
US3609105A (en) * 1970-06-08 1971-09-28 Alpha Metals Metalizing material

Also Published As

Publication number Publication date
FR2160360A1 (https=) 1973-06-29
DE2234461A1 (de) 1973-05-24
FR2160360B1 (https=) 1974-10-04
JPS4859775A (https=) 1973-08-22
US3793064A (en) 1974-02-19

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