IT947674B - Tecnica di diffusione epitassiale per la fabbricazione di transisto ri bipolari e transistori fet - Google Patents

Tecnica di diffusione epitassiale per la fabbricazione di transisto ri bipolari e transistori fet

Info

Publication number
IT947674B
IT947674B IT20713/72A IT2071372A IT947674B IT 947674 B IT947674 B IT 947674B IT 20713/72 A IT20713/72 A IT 20713/72A IT 2071372 A IT2071372 A IT 2071372A IT 947674 B IT947674 B IT 947674B
Authority
IT
Italy
Prior art keywords
transistic
bipolar
manufacture
fet transistors
diffusion technique
Prior art date
Application number
IT20713/72A
Other languages
English (en)
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Application granted granted Critical
Publication of IT947674B publication Critical patent/IT947674B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
    • H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
    • H01L27/0623—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type in combination with bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/2205—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities from the substrate during epitaxy, e.g. autodoping; Preventing or using autodoping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74—Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/761—PN junctions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248—Combination of bipolar and field-effect technology
    • H01L21/8249—Bipolar and MOS technology

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Element Separation (AREA)
IT20713/72A 1971-04-28 1972-02-18 Tecnica di diffusione epitassiale per la fabbricazione di transisto ri bipolari e transistori fet IT947674B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US13816171A 1971-04-28 1971-04-28

Publications (1)

Publication Number Publication Date
IT947674B true IT947674B (it) 1973-05-30

Family

ID=22480723

Family Applications (1)

Application Number Title Priority Date Filing Date
IT20713/72A IT947674B (it) 1971-04-28 1972-02-18 Tecnica di diffusione epitassiale per la fabbricazione di transisto ri bipolari e transistori fet

Country Status (12)

Country Link
JP (1) JPS5037507B1 (it)
AU (1) AU459156B2 (it)
CA (1) CA966231A (it)
CH (1) CH536029A (it)
DE (1) DE2219696C3 (it)
ES (2) ES402165A1 (it)
FR (1) FR2134360B1 (it)
GB (1) GB1358612A (it)
IT (1) IT947674B (it)
NL (1) NL7204804A (it)
SE (1) SE384949B (it)
ZA (1) ZA721782B (it)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2608267A1 (de) * 1976-02-28 1977-09-08 Itt Ind Gmbh Deutsche Verfahren zum herstellen einer monolithisch integrierten schaltung
JPS5851561A (ja) * 1981-09-24 1983-03-26 Hitachi Ltd 半導体集積回路装置
JPS58225663A (ja) * 1982-06-23 1983-12-27 Toshiba Corp 半導体装置の製造方法
JPS5955052A (ja) * 1982-09-24 1984-03-29 Hitachi Ltd 半導体集積回路装置の製造方法
JPS59177960A (ja) * 1983-03-28 1984-10-08 Hitachi Ltd 半導体装置およびその製造方法
IT1214808B (it) * 1984-12-20 1990-01-18 Ates Componenti Elettron Tico e semiconduttore processo per la formazione di uno strato sepolto e di una regione di collettore in un dispositivo monoli
US4727046A (en) * 1986-07-16 1988-02-23 Fairchild Semiconductor Corporation Method of fabricating high performance BiCMOS structures having poly emitters and silicided bases
KR890004420B1 (ko) * 1986-11-04 1989-11-03 삼성반도체통신 주식회사 반도체 바이 씨 모오스장치의 제조방법

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3293087A (en) * 1963-03-05 1966-12-20 Fairchild Camera Instr Co Method of making isolated epitaxial field-effect device
US3481801A (en) * 1966-10-10 1969-12-02 Frances Hugle Isolation technique for integrated circuits
US3479233A (en) * 1967-01-16 1969-11-18 Ibm Method for simultaneously forming a buried layer and surface connection in semiconductor devices
US3440503A (en) * 1967-05-31 1969-04-22 Westinghouse Electric Corp Integrated complementary mos-type transistor structure and method of making same
GB1280022A (en) * 1968-08-30 1972-07-05 Mullard Ltd Improvements in and relating to semiconductor devices

Also Published As

Publication number Publication date
GB1358612A (en) 1974-07-03
DE2219696A1 (de) 1972-11-16
AU459156B2 (en) 1975-03-20
FR2134360A1 (it) 1972-12-08
DE2219696C3 (de) 1982-02-18
ES402164A1 (es) 1975-03-01
JPS5037507B1 (it) 1975-12-03
ES402165A1 (es) 1975-03-16
AU4164272A (en) 1973-12-20
SE384949B (sv) 1976-05-24
NL7204804A (it) 1972-10-31
DE2219696B2 (de) 1978-04-06
FR2134360B1 (it) 1974-06-28
ZA721782B (en) 1973-10-31
CA966231A (en) 1975-04-15
CH536029A (de) 1973-04-15

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