CH534431A - Halbleiteranordnung mit integrierten Isolierschicht-Feldeffekttransistoren - Google Patents

Halbleiteranordnung mit integrierten Isolierschicht-Feldeffekttransistoren

Info

Publication number
CH534431A
CH534431A CH1286271A CH1286271A CH534431A CH 534431 A CH534431 A CH 534431A CH 1286271 A CH1286271 A CH 1286271A CH 1286271 A CH1286271 A CH 1286271A CH 534431 A CH534431 A CH 534431A
Authority
CH
Switzerland
Prior art keywords
field effect
effect transistors
semiconductor arrangement
film field
integrated insulated
Prior art date
Application number
CH1286271A
Other languages
English (en)
Inventor
Utz Dr Baitinger
Frantz Hermann
Haug Werner
Rolf Dr Remshardt
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of CH534431A publication Critical patent/CH534431A/de

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0638Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for preventing surface leakage due to surface inversion layer, e.g. with channel stopper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B20/00Read-only memory [ROM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
CH1286271A 1970-09-02 1971-09-01 Halbleiteranordnung mit integrierten Isolierschicht-Feldeffekttransistoren CH534431A (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19702043405 DE2043405A1 (de) 1970-09-02 1970-09-02 Halbleiteranordnung mit monolithisch integrierten Isolierschicht-Feldeffekttransistoren

Publications (1)

Publication Number Publication Date
CH534431A true CH534431A (de) 1973-02-28

Family

ID=5781308

Family Applications (1)

Application Number Title Priority Date Filing Date
CH1286271A CH534431A (de) 1970-09-02 1971-09-01 Halbleiteranordnung mit integrierten Isolierschicht-Feldeffekttransistoren

Country Status (8)

Country Link
AU (1) AU3180371A (de)
BE (1) BE770898A (de)
CH (1) CH534431A (de)
DE (1) DE2043405A1 (de)
ES (1) ES394706A1 (de)
FR (1) FR2105176B1 (de)
GB (1) GB1353366A (de)
NL (1) NL7112058A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2572851B1 (fr) * 1984-11-08 1987-07-31 Matra Harris Semiconducteurs Reseau prediffuse a cellules de base interconnectables

Also Published As

Publication number Publication date
DE2043405A1 (de) 1972-03-16
FR2105176A1 (de) 1972-04-28
BE770898A (fr) 1971-12-16
AU3180371A (en) 1973-02-01
NL7112058A (de) 1972-03-06
ES394706A1 (es) 1975-11-01
FR2105176B1 (de) 1974-10-31
GB1353366A (en) 1974-05-15

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Legal Events

Date Code Title Description
PL Patent ceased